};
/* RISC-RISC semaphore register PCI offet */
#define RISC_REGISTER_BASE_OFFSET 0x7010
-#define RISC_REGISTER_WINDOW_OFFET 0x6
+#define RISC_REGISTER_WINDOW_OFFSET 0x6
/* RISC-RISC semaphore/flag register (risc address 0x7016) */
struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
- *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET);
+ *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET);
}
struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
- WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
+ WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);
}
static void