--- /dev/null
+ area pixman_msvc, code, readonly\r
+\r
+ export pixman_msvc_try_armv6_op\r
+\r
+pixman_msvc_try_armv6_op\r
+ uqadd8 r0,r0,r1\r
+ mov pc,lr\r
+ endp\r
+\r
+ end\r
#ifdef USE_ARM_SIMD
-static inline pixman_bool_t pixman_have_arm_simd(void) { return TRUE; }
+pixman_bool_t pixman_have_arm_simd(void);
#else
#define pixman_have_arm_simd() FALSE
#include "pixman-arm-simd.h"
#include "pixman-combine32.h"
+#if defined(USE_ARM_SIMD) && defined(_MSC_VER)
+/* Needed for EXCEPTION_ILLEGAL_INSTRUCTION */
+#include <windows.h>
+#endif
+
#define FbFullMask(n) ((n) == 32 ? (uint32_t)-1 : ((((uint32_t) 1) << n) - 1))
#undef READ
#endif /* __APPLE__ */
#endif /* USE_VMX */
+#ifdef USE_ARM_SIMD
+pixman_bool_t
+pixman_have_arm_simd (void)
+{
+#ifdef _MSC_VER
+ static pixman_bool_t initialized = FALSE;
+ static pixman_bool_t have_arm_simd = FALSE;
+
+ if (!initialized) {
+ __try {
+ pixman_msvc_try_armv6_op();
+ have_arm_simd = TRUE;
+ } __except(GetExceptionCode() == EXCEPTION_ILLEGAL_INSTRUCTION) {
+ have_arm_simd = FALSE;
+ }
+ initialized = TRUE;
+ }
+
+ return have_arm_simd;
+#else
+ return TRUE;
+#endif
+}
+#endif
+
#ifdef USE_MMX
/* The CPU detection code needs to be in a file not compiled with
* "-mmmx -msse", as gcc would generate CMOV instructions otherwise