imx6sl: synchronise device tree with linux
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>
Sat, 22 Oct 2022 21:59:37 +0000 (23:59 +0200)
committerStefano Babic <sbabic@denx.de>
Mon, 24 Oct 2022 11:43:21 +0000 (13:43 +0200)
Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
arch/arm/dts/imx6sl-evk.dts
arch/arm/dts/imx6sl-pinfunc.h
arch/arm/dts/imx6sl.dtsi
include/dt-bindings/clock/imx6sl-clock.h

index 0a90eea..f16c830 100644 (file)
@@ -1,10 +1,6 @@
-/*
- * Copyright (C) 2013 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+//Copyright (C) 2013 Freescale Semiconductor, Inc.
 
 /dts-v1/;
 
        model = "Freescale i.MX6 SoloLite EVK Board";
        compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
 
-       memory {
+       chosen {
+               stdout-path = &uart1;
+       };
+
+       memory@80000000 {
+               device_type = "memory";
                reg = <0x80000000 0x40000000>;
        };
 
-       backlight {
+       backlight_display: backlight_display {
                compatible = "pwm-backlight";
                pwms = <&pwm1 0 5000000>;
                brightness-levels = <0 4 8 16 32 64 128 255>;
                };
        };
 
-       regulators {
-               compatible = "simple-bus";
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               reg_usb_otg1_vbus: regulator@0 {
-                       compatible = "regulator-fixed";
-                       reg = <0>;
-                       regulator-name = "usb_otg1_vbus";
-                       regulator-min-microvolt = <5000000>;
-                       regulator-max-microvolt = <5000000>;
-                       gpio = <&gpio4 0 0>;
-                       enable-active-high;
-                       vin-supply = <&swbst_reg>;
-               };
+       reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
+               compatible = "regulator-fixed";
+               regulator-name = "usb_otg1_vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               vin-supply = <&swbst_reg>;
+       };
 
-               reg_usb_otg2_vbus: regulator@1 {
-                       compatible = "regulator-fixed";
-                       reg = <1>;
-                       regulator-name = "usb_otg2_vbus";
-                       regulator-min-microvolt = <5000000>;
-                       regulator-max-microvolt = <5000000>;
-                       gpio = <&gpio4 2 0>;
-                       enable-active-high;
-                       vin-supply = <&swbst_reg>;
-               };
+       reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
+               compatible = "regulator-fixed";
+               regulator-name = "usb_otg2_vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               vin-supply = <&swbst_reg>;
+       };
 
-               reg_aud3v: regulator@2 {
-                       compatible = "regulator-fixed";
-                       reg = <2>;
-                       regulator-name = "wm8962-supply-3v15";
-                       regulator-min-microvolt = <3150000>;
-                       regulator-max-microvolt = <3150000>;
-                       regulator-boot-on;
-               };
+       reg_aud3v: regulator-aud3v {
+               compatible = "regulator-fixed";
+               regulator-name = "wm8962-supply-3v15";
+               regulator-min-microvolt = <3150000>;
+               regulator-max-microvolt = <3150000>;
+               regulator-boot-on;
+       };
 
-               reg_aud4v: regulator@3 {
-                       compatible = "regulator-fixed";
-                       reg = <3>;
-                       regulator-name = "wm8962-supply-4v2";
-                       regulator-min-microvolt = <4325000>;
-                       regulator-max-microvolt = <4325000>;
-                       regulator-boot-on;
-               };
+       reg_aud4v: regulator-aud4v {
+               compatible = "regulator-fixed";
+               regulator-name = "wm8962-supply-4v2";
+               regulator-min-microvolt = <4325000>;
+               regulator-max-microvolt = <4325000>;
+               regulator-boot-on;
+       };
 
-               reg_lcd_3v3: regulator@4 {
-                       compatible = "regulator-fixed";
-                       reg = <4>;
-                       regulator-name = "lcd-3v3";
-                       gpio = <&gpio4 3 0>;
-                       enable-active-high;
-               };
+       reg_lcd_3v3: regulator-lcd-3v3 {
+               compatible = "regulator-fixed";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
+               regulator-name = "lcd-3v3";
+               gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       reg_lcd_5v: regulator-lcd-5v {
+               compatible = "regulator-fixed";
+               regulator-name = "lcd-5v0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
        };
 
        sound {
                compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_hp>;
                model = "wm8962-audio";
                ssi-controller = <&ssi2>;
                audio-codec = <&codec>;
                        "IN3R", "AMIC";
                mux-int-port = <2>;
                mux-ext-port = <3>;
+               hp-det-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
+       };
+
+       panel {
+               compatible = "sii,43wvf1g";
+               backlight = <&backlight_display>;
+               dvdd-supply = <&reg_lcd_3v3>;
+               avdd-supply = <&reg_lcd_5v>;
+
+               port {
+                       panel_in: endpoint {
+                               remote-endpoint = <&display_out>;
+                       };
+               };
        };
 };
 
 };
 
 &ecspi1 {
-       cs-gpios = <&gpio4 11 0>;
+       cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_ecspi1>;
        status = "okay";
 
-       flash: m25p80@0 {
+       flash: flash@0 {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "st,m25p32", "jedec,spi-nor";
        pinctrl-0 = <&pinctrl_i2c1>;
        status = "okay";
 
-       pmic: pfuze100@08 {
+       pmic: pfuze100@8 {
                compatible = "fsl,pfuze100";
                reg = <0x08>;
 
                        sw4_reg: sw4 {
                                regulator-min-microvolt = <800000>;
                                regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
                        };
 
                        swbst_reg: swbst {
                        >;
                };
 
+               pinctrl_hp: hpgrp {
+                       fsl,pins = <
+                               MX6SL_PAD_FEC_RX_ER__GPIO4_IO19   0x1b0b0
+                       >;
+               };
+
                pinctrl_i2c1: i2c1grp {
                        fsl,pins = <
                                MX6SL_PAD_I2C1_SCL__I2C1_SCL    0x4001b8b1
                        >;
                };
 
+               pinctrl_reg_lcd_3v3: reglcd3v3grp {
+                       fsl,pins = <
+                               MX6SL_PAD_KEY_ROW5__GPIO4_IO03    0x17059
+                       >;
+               };
+
                pinctrl_uart1: uart1grp {
                        fsl,pins = <
                                MX6SL_PAD_UART1_RXD__UART1_RX_DATA      0x1b0b1
 &lcdif {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_lcd>;
-       lcd-supply = <&reg_lcd_3v3>;
-       display = <&display0>;
        status = "okay";
 
-       display0: display0 {
-               bits-per-pixel = <32>;
-               bus-width = <24>;
-
-               display-timings {
-                       native-mode = <&timing0>;
-                       timing0: timing0 {
-                               clock-frequency = <33500000>;
-                               hactive = <800>;
-                               vactive = <480>;
-                               hback-porch = <89>;
-                               hfront-porch = <164>;
-                               vback-porch = <23>;
-                               vfront-porch = <10>;
-                               hsync-len = <10>;
-                               vsync-len = <10>;
-                               hsync-active = <0>;
-                               vsync-active = <0>;
-                               de-active = <1>;
-                               pixelclk-active = <0>;
-                       };
+       port {
+               display_out: endpoint {
+                       remote-endpoint = <&panel_in>;
                };
        };
 };
 
 &pwm1 {
+       #pwm-cells = <2>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pwm1>;
        status = "okay";
 };
 
+&reg_vdd1p1 {
+       vin-supply = <&sw2_reg>;
+};
+
+&reg_vdd2p5 {
+       vin-supply = <&sw2_reg>;
+};
+
 &snvs_poweroff {
        status = "okay";
 };
index 77b17bc..bcf1606 100644 (file)
@@ -1,10 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Copyright 2013 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
  */
 
 #ifndef __DTS_IMX6SL_PINFUNC_H
index 37e341c..271f4b9 100644 (file)
@@ -1,11 +1,6 @@
-/*
- * Copyright 2013 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2013 Freescale Semiconductor, Inc.
 
 #include <dt-bindings/interrupt-controller/irq.h>
 #include "imx6sl-pinfunc.h"
         * The decompressor and also some bootloaders rely on a
         * pre-existing /chosen node to be available to insert the
         * command line and merge other ATAGS info.
-        * Also for U-Boot there must be a pre-existing /memory node.
         */
        chosen {};
-       memory { device_type = "memory"; reg = <0 0>; };
 
        aliases {
                ethernet0 = &fec;
                gpio2 = &gpio3;
                gpio3 = &gpio4;
                gpio4 = &gpio5;
+               i2c0 = &i2c1;
+               i2c1 = &i2c2;
+               i2c2 = &i2c3;
+               mmc0 = &usdhc1;
+               mmc1 = &usdhc2;
+               mmc2 = &usdhc3;
+               mmc3 = &usdhc4;
                serial0 = &uart1;
                serial1 = &uart2;
                serial2 = &uart3;
@@ -39,6 +39,9 @@
                spi1 = &ecspi2;
                spi2 = &ecspi3;
                spi3 = &ecspi4;
+               usb0 = &usbotg1;
+               usb1 = &usbotg2;
+               usb2 = &usbh;
                usbphy0 = &usbphy1;
                usbphy1 = &usbphy2;
        };
                #address-cells = <1>;
                #size-cells = <0>;
 
-               cpu@0 {
+               cpu0: cpu@0 {
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
                        reg = <0x0>;
                        next-level-cache = <&L2>;
-                       operating-points = <
+                       operating-points =
                                /* kHz    uV */
-                               996000  1275000
-                               792000  1175000
-                               396000  975000
-                       >;
-                       fsl,soc-operating-points = <
-                               /* ARM kHz      SOC-PU uV */
-                               996000          1225000
-                               792000          1175000
-                               396000          1175000
-                       >;
+                               <996000  1275000>,
+                               <792000  1175000>,
+                               <396000  975000>;
+                       fsl,soc-operating-points =
+                               /* ARM kHz      SOC-PU uV */
+                               <996000         1225000>,
+                               <792000         1175000>,
+                               <396000         1175000>;
                        clock-latency = <61036>; /* two CLK32 periods */
+                       #cooling-cells = <2>;
                        clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>,
                                        <&clks IMX6SL_CLK_STEP>, <&clks IMX6SL_CLK_PLL1_SW>,
                                        <&clks IMX6SL_CLK_PLL1_SYS>;
                        arm-supply = <&reg_arm>;
                        pu-supply = <&reg_pu>;
                        soc-supply = <&reg_soc>;
+                       nvmem-cells = <&cpu_speed_grade>;
+                       nvmem-cell-names = "speed_grade";
                };
        };
 
-       intc: interrupt-controller@00a01000 {
-               compatible = "arm,cortex-a9-gic";
-               #interrupt-cells = <3>;
-               interrupt-controller;
-               reg = <0x00a01000 0x1000>,
-                     <0x00a00100 0x100>;
-               interrupt-parent = <&intc>;
-       };
-
        clocks {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
                ckil {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
                };
        };
 
+       pmu {
+               compatible = "arm,cortex-a9-pmu";
+               interrupt-parent = <&gpc>;
+               interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
+       };
+
+       usbphynop1: usbphynop1 {
+               compatible = "usb-nop-xceiv";
+               #phy-cells = <0>;
+       };
+
        soc {
                #address-cells = <1>;
                #size-cells = <1>;
                interrupt-parent = <&gpc>;
                ranges;
 
-               ocram: sram@00900000 {
+               ocram: sram@900000 {
                        compatible = "mmio-sram";
                        reg = <0x00900000 0x20000>;
                        clocks = <&clks IMX6SL_CLK_OCRAM>;
                };
 
-               L2: l2-cache@00a02000 {
+               intc: interrupt-controller@a01000 {
+                       compatible = "arm,cortex-a9-gic";
+                       #interrupt-cells = <3>;
+                       interrupt-controller;
+                       reg = <0x00a01000 0x1000>,
+                             <0x00a00100 0x100>;
+                       interrupt-parent = <&intc>;
+               };
+
+               L2: cache-controller@a02000 {
                        compatible = "arm,pl310-cache";
                        reg = <0x00a02000 0x1000>;
                        interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
                        arm,data-latency = <4 2 3>;
                };
 
-               pmu {
-                       compatible = "arm,cortex-a9-pmu";
-                       interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
-               };
-
-               aips1: bus@02000000 {
+               aips1: bus@2000000 {
                        compatible = "fsl,aips-bus", "simple-bus";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        reg = <0x02000000 0x100000>;
                        ranges;
 
-                       spba: spba-bus@02000000 {
+                       spba: spba-bus@2000000 {
                                compatible = "fsl,spba-bus", "simple-bus";
                                #address-cells = <1>;
                                #size-cells = <1>;
                                reg = <0x02000000 0x40000>;
                                ranges;
 
-                               spdif: spdif@02004000 {
+                               spdif: spdif@2004000 {
                                        compatible = "fsl,imx6sl-spdif",
                                                "fsl,imx35-spdif";
                                        reg = <0x02004000 0x4000>;
                                        status = "disabled";
                                };
 
-                               ecspi1: ecspi@02008000 {
+                               ecspi1: spi@2008000 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                        compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
                                        status = "disabled";
                                };
 
-                               ecspi2: ecspi@0200c000 {
+                               ecspi2: spi@200c000 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                        compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
                                        status = "disabled";
                                };
 
-                               ecspi3: ecspi@02010000 {
+                               ecspi3: spi@2010000 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                        compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
                                        status = "disabled";
                                };
 
-                               ecspi4: ecspi@02014000 {
+                               ecspi4: spi@2014000 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                        compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
                                        status = "disabled";
                                };
 
-                               uart5: serial@02018000 {
+                               uart5: serial@2018000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02018000 0x4000>;
                                        interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
                                        status = "disabled";
                                };
 
-                               uart1: serial@02020000 {
+                               uart1: serial@2020000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02020000 0x4000>;
                                        interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
                                        status = "disabled";
                                };
 
-                               uart2: serial@02024000 {
+                               uart2: serial@2024000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02024000 0x4000>;
                                        interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
                                        status = "disabled";
                                };
 
-                               ssi1: ssi@02028000 {
+                               ssi1: ssi@2028000 {
                                        #sound-dai-cells = <0>;
                                        compatible = "fsl,imx6sl-ssi",
                                                        "fsl,imx51-ssi";
                                        status = "disabled";
                                };
 
-                               ssi2: ssi@0202c000 {
+                               ssi2: ssi@202c000 {
                                        #sound-dai-cells = <0>;
                                        compatible = "fsl,imx6sl-ssi",
                                                        "fsl,imx51-ssi";
                                        status = "disabled";
                                };
 
-                               ssi3: ssi@02030000 {
+                               ssi3: ssi@2030000 {
                                        #sound-dai-cells = <0>;
                                        compatible = "fsl,imx6sl-ssi",
                                                        "fsl,imx51-ssi";
                                        status = "disabled";
                                };
 
-                               uart3: serial@02034000 {
+                               uart3: serial@2034000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02034000 0x4000>;
                                        interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
                                        status = "disabled";
                                };
 
-                               uart4: serial@02038000 {
+                               uart4: serial@2038000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02038000 0x4000>;
                                        interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
                                };
                        };
 
-                       pwm1: pwm@02080000 {
-                               #pwm-cells = <2>;
+                       pwm1: pwm@2080000 {
+                               #pwm-cells = <3>;
                                compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
                                reg = <0x02080000 0x4000>;
                                interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6SL_CLK_PWM1>,
+                               clocks = <&clks IMX6SL_CLK_PERCLK>,
                                         <&clks IMX6SL_CLK_PWM1>;
                                clock-names = "ipg", "per";
                        };
 
-                       pwm2: pwm@02084000 {
-                               #pwm-cells = <2>;
+                       pwm2: pwm@2084000 {
+                               #pwm-cells = <3>;
                                compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
                                reg = <0x02084000 0x4000>;
                                interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6SL_CLK_PWM2>,
+                               clocks = <&clks IMX6SL_CLK_PERCLK>,
                                         <&clks IMX6SL_CLK_PWM2>;
                                clock-names = "ipg", "per";
                        };
 
-                       pwm3: pwm@02088000 {
-                               #pwm-cells = <2>;
+                       pwm3: pwm@2088000 {
+                               #pwm-cells = <3>;
                                compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
                                reg = <0x02088000 0x4000>;
                                interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6SL_CLK_PWM3>,
+                               clocks = <&clks IMX6SL_CLK_PERCLK>,
                                         <&clks IMX6SL_CLK_PWM3>;
                                clock-names = "ipg", "per";
                        };
 
-                       pwm4: pwm@0208c000 {
-                               #pwm-cells = <2>;
+                       pwm4: pwm@208c000 {
+                               #pwm-cells = <3>;
                                compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
                                reg = <0x0208c000 0x4000>;
                                interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6SL_CLK_PWM4>,
+                               clocks = <&clks IMX6SL_CLK_PERCLK>,
                                         <&clks IMX6SL_CLK_PWM4>;
                                clock-names = "ipg", "per";
                        };
 
-                       gpt: gpt@02098000 {
+                       gpt: timer@2098000 {
                                compatible = "fsl,imx6sl-gpt";
                                reg = <0x02098000 0x4000>;
                                interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
                                clock-names = "ipg", "per";
                        };
 
-                       gpio1: gpio@0209c000 {
+                       gpio1: gpio@209c000 {
                                compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
                                reg = <0x0209c000 0x4000>;
                                interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,
                                              <&iomuxc 27 64 4>, <&iomuxc 31 52 1>;
                        };
 
-                       gpio2: gpio@020a0000 {
+                       gpio2: gpio@20a0000 {
                                compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
                                reg = <0x020a0000 0x4000>;
                                interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,
                                              <&iomuxc 23 125 7>, <&iomuxc 30 110 2>;
                        };
 
-                       gpio3: gpio@020a4000 {
+                       gpio3: gpio@20a4000 {
                                compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
                                reg = <0x020a4000 0x4000>;
                                interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,
                                              <&iomuxc 31 102 1>;
                        };
 
-                       gpio4: gpio@020a8000 {
+                       gpio4: gpio@20a8000 {
                                compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
                                reg = <0x020a8000 0x4000>;
                                interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,
                                              <&iomuxc 30 152 1>, <&iomuxc 31 156 1>;
                        };
 
-                       gpio5: gpio@020ac000 {
+                       gpio5: gpio@20ac000 {
                                compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
                                reg = <0x020ac000 0x4000>;
                                interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,
                                              <&iomuxc 21 161 1>;
                        };
 
-                       kpp: kpp@020b8000 {
+                       kpp: keypad@20b8000 {
                                compatible = "fsl,imx6sl-kpp", "fsl,imx21-kpp";
                                reg = <0x020b8000 0x4000>;
                                interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6SL_CLK_DUMMY>;
+                               clocks = <&clks IMX6SL_CLK_IPG>;
                                status = "disabled";
                        };
 
-                       wdog1: wdog@020bc000 {
+                       wdog1: watchdog@20bc000 {
                                compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt";
                                reg = <0x020bc000 0x4000>;
                                interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6SL_CLK_DUMMY>;
+                               clocks = <&clks IMX6SL_CLK_IPG>;
                        };
 
-                       wdog2: wdog@020c0000 {
+                       wdog2: watchdog@20c0000 {
                                compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt";
                                reg = <0x020c0000 0x4000>;
                                interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6SL_CLK_DUMMY>;
+                               clocks = <&clks IMX6SL_CLK_IPG>;
                                status = "disabled";
                        };
 
-                       clks: ccm@020c4000 {
+                       clks: clock-controller@20c4000 {
                                compatible = "fsl,imx6sl-ccm";
                                reg = <0x020c4000 0x4000>;
                                interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
                                #clock-cells = <1>;
                        };
 
-                       anatop: anatop@020c8000 {
+                       anatop: anatop@20c8000 {
                                compatible = "fsl,imx6sl-anatop",
                                             "fsl,imx6q-anatop",
-                                            "syscon", "simple-bus";
+                                            "syscon", "simple-mfd";
                                reg = <0x020c8000 0x1000>;
                                interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
                                             <0 54 IRQ_TYPE_LEVEL_HIGH>,
                                             <0 127 IRQ_TYPE_LEVEL_HIGH>;
 
-                               regulator-1p1 {
+                               reg_vdd1p1: regulator-1p1 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd1p1";
-                                       regulator-min-microvolt = <800000>;
-                                       regulator-max-microvolt = <1375000>;
+                                       regulator-min-microvolt = <1000000>;
+                                       regulator-max-microvolt = <1200000>;
                                        regulator-always-on;
                                        anatop-reg-offset = <0x110>;
                                        anatop-vol-bit-shift = <8>;
                                        anatop-min-bit-val = <4>;
                                        anatop-min-voltage = <800000>;
                                        anatop-max-voltage = <1375000>;
+                                       anatop-enable-bit = <0>;
                                };
 
-                               regulator-3p0 {
+                               reg_vdd3p0: regulator-3p0 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd3p0";
                                        regulator-min-microvolt = <2800000>;
                                        anatop-min-bit-val = <0>;
                                        anatop-min-voltage = <2625000>;
                                        anatop-max-voltage = <3400000>;
+                                       anatop-enable-bit = <0>;
                                };
 
-                               regulator-2p5 {
+                               reg_vdd2p5: regulator-2p5 {
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd2p5";
-                                       regulator-min-microvolt = <2100000>;
-                                       regulator-max-microvolt = <2850000>;
+                                       regulator-min-microvolt = <2250000>;
+                                       regulator-max-microvolt = <2750000>;
                                        regulator-always-on;
                                        anatop-reg-offset = <0x130>;
                                        anatop-vol-bit-shift = <8>;
                                        anatop-min-bit-val = <0>;
                                        anatop-min-voltage = <2100000>;
                                        anatop-max-voltage = <2850000>;
+                                       anatop-enable-bit = <0>;
                                };
 
                                reg_arm: regulator-vddcore {
                                        regulator-name = "vddpu";
                                        regulator-min-microvolt = <725000>;
                                        regulator-max-microvolt = <1450000>;
-                                       regulator-always-on;
                                        anatop-reg-offset = <0x140>;
                                        anatop-vol-bit-shift = <9>;
                                        anatop-vol-bit-width = <5>;
                                        anatop-min-voltage = <725000>;
                                        anatop-max-voltage = <1450000>;
                                };
-                       };
 
-                       tempmon: tempmon {
-                               compatible = "fsl,imx6q-tempmon";
-                               interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
-                               fsl,tempmon = <&anatop>;
-                               fsl,tempmon-data = <&ocotp>;
-                               clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
+                               tempmon: tempmon {
+                                       compatible = "fsl,imx6q-tempmon";
+                                       interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
+                                       interrupt-parent = <&gpc>;
+                                       fsl,tempmon = <&anatop>;
+                                       nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
+                                       nvmem-cell-names = "calib", "temp_grade";
+                                       clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
+                               };
                        };
 
-                       usbphy1: usbphy@020c9000 {
+                       usbphy1: usbphy@20c9000 {
                                compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy";
                                reg = <0x020c9000 0x1000>;
                                interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
                                fsl,anatop = <&anatop>;
                        };
 
-                       usbphy2: usbphy@020ca000 {
+                       usbphy2: usbphy@20ca000 {
                                compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy";
                                reg = <0x020ca000 0x1000>;
                                interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
                                fsl,anatop = <&anatop>;
                        };
 
-                       snvs: snvs@020cc000 {
+                       snvs: snvs@20cc000 {
                                compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
                                reg = <0x020cc000 0x4000>;
 
                                        compatible = "syscon-poweroff";
                                        regmap = <&snvs>;
                                        offset = <0x38>;
+                                       value = <0x60>;
                                        mask = <0x60>;
                                        status = "disabled";
                                };
                        };
 
-                       epit1: epit@020d0000 {
+                       epit1: epit@20d0000 {
                                reg = <0x020d0000 0x4000>;
                                interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
-                       epit2: epit@020d4000 {
+                       epit2: epit@20d4000 {
                                reg = <0x020d4000 0x4000>;
                                interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
-                       src: src@020d8000 {
+                       src: reset-controller@20d8000 {
                                compatible = "fsl,imx6sl-src", "fsl,imx51-src";
                                reg = <0x020d8000 0x4000>;
                                interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
                                #reset-cells = <1>;
                        };
 
-                       gpc: gpc@020dc000 {
+                       gpc: gpc@20dc000 {
                                compatible = "fsl,imx6sl-gpc", "fsl,imx6q-gpc";
                                reg = <0x020dc000 0x4000>;
                                interrupt-controller;
                                #interrupt-cells = <3>;
                                interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
                                interrupt-parent = <&intc>;
-                               pu-supply = <&reg_pu>;
-                               clocks = <&clks IMX6SL_CLK_GPU2D_OVG>,
-                                        <&clks IMX6SL_CLK_GPU2D_PODF>;
-                               #power-domain-cells = <1>;
+                               clocks = <&clks IMX6SL_CLK_IPG>;
+                               clock-names = "ipg";
+
+                               pgc {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       power-domain@0 {
+                                               reg = <0>;
+                                               #power-domain-cells = <0>;
+                                       };
+
+                                       pd_pu: power-domain@1 {
+                                               reg = <1>;
+                                               #power-domain-cells = <0>;
+                                               power-supply = <&reg_pu>;
+                                               clocks = <&clks IMX6SL_CLK_GPU2D_OVG>,
+                                                        <&clks IMX6SL_CLK_GPU2D_PODF>;
+                                       };
+
+                                       pd_disp: power-domain@2 {
+                                               reg = <2>;
+                                               #power-domain-cells = <0>;
+                                               clocks = <&clks IMX6SL_CLK_LCDIF_AXI>,
+                                                        <&clks IMX6SL_CLK_LCDIF_PIX>,
+                                                        <&clks IMX6SL_CLK_EPDC_AXI>,
+                                                        <&clks IMX6SL_CLK_EPDC_PIX>,
+                                                        <&clks IMX6SL_CLK_PXP_AXI>;
+                                       };
+                               };
                        };
 
-                       gpr: iomuxc-gpr@020e0000 {
+                       gpr: iomuxc-gpr@20e0000 {
                                compatible = "fsl,imx6sl-iomuxc-gpr",
                                             "fsl,imx6q-iomuxc-gpr", "syscon";
                                reg = <0x020e0000 0x38>;
                        };
 
-                       iomuxc: iomuxc@020e0000 {
+                       iomuxc: pinctrl@20e0000 {
                                compatible = "fsl,imx6sl-iomuxc";
                                reg = <0x020e0000 0x4000>;
                        };
 
-                       csi: csi@020e4000 {
+                       csi: csi@20e4000 {
                                reg = <0x020e4000 0x4000>;
                                interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
-                       spdc: spdc@020e8000 {
+                       spdc: spdc@20e8000 {
                                reg = <0x020e8000 0x4000>;
                                interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
-                       sdma: sdma@020ec000 {
+                       sdma: sdma@20ec000 {
                                compatible = "fsl,imx6sl-sdma", "fsl,imx6q-sdma";
                                reg = <0x020ec000 0x4000>;
                                interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clks IMX6SL_CLK_SDMA>,
-                                        <&clks IMX6SL_CLK_SDMA>;
+                                        <&clks IMX6SL_CLK_AHB>;
                                clock-names = "ipg", "ahb";
                                #dma-cells = <3>;
                                /* imx6sl reuses imx6q sdma firmware */
                                fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
                        };
 
-                       pxp: pxp@020f0000 {
+                       pxp: pxp@20f0000 {
                                reg = <0x020f0000 0x4000>;
                                interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
-                       epdc: epdc@020f4000 {
+                       epdc: epdc@20f4000 {
                                reg = <0x020f4000 0x4000>;
                                interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
-                       lcdif: lcdif@020f8000 {
+                       lcdif: lcdif@20f8000 {
                                compatible = "fsl,imx6sl-lcdif", "fsl,imx28-lcdif";
                                reg = <0x020f8000 0x4000>;
                                interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
                                         <&clks IMX6SL_CLK_DUMMY>;
                                clock-names = "pix", "axi", "disp_axi";
                                status = "disabled";
+                               power-domains = <&pd_disp>;
                        };
 
-                       dcp: dcp@020fc000 {
+                       dcp: crypto@20fc000 {
                                compatible = "fsl,imx6sl-dcp", "fsl,imx28-dcp";
                                reg = <0x020fc000 0x4000>;
                                interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>,
                        };
                };
 
-               aips2: bus@02100000 {
+               aips2: bus@2100000 {
                        compatible = "fsl,aips-bus", "simple-bus";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        reg = <0x02100000 0x100000>;
                        ranges;
 
-                       usbotg1: usb@02184000 {
+                       usbotg1: usb@2184000 {
                                compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
                                reg = <0x02184000 0x200>;
                                interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;
                                status = "disabled";
                        };
 
-                       usbotg2: usb@02184200 {
+                       usbotg2: usb@2184200 {
                                compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
                                reg = <0x02184200 0x200>;
                                interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
                                status = "disabled";
                        };
 
-                       usbh: usb@02184400 {
+                       usbh: usb@2184400 {
                                compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
                                reg = <0x02184400 0x200>;
                                interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clks IMX6SL_CLK_USBOH3>;
+                               fsl,usbphy = <&usbphynop1>;
+                               phy_type = "hsic";
                                fsl,usbmisc = <&usbmisc 2>;
                                dr_mode = "host";
                                ahb-burst-config = <0x0>;
                                status = "disabled";
                        };
 
-                       usbmisc: usbmisc@02184800 {
+                       usbmisc: usbmisc@2184800 {
                                #index-cells = <1>;
                                compatible = "fsl,imx6sl-usbmisc", "fsl,imx6q-usbmisc";
                                reg = <0x02184800 0x200>;
                                clocks = <&clks IMX6SL_CLK_USBOH3>;
                        };
 
-                       fec: ethernet@02188000 {
+                       fec: ethernet@2188000 {
                                compatible = "fsl,imx6sl-fec", "fsl,imx25-fec";
                                reg = <0x02188000 0x4000>;
                                interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
                                status = "disabled";
                        };
 
-                       usdhc1: usdhc@02190000 {
+                       usdhc1: mmc@2190000 {
                                compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
                                reg = <0x02190000 0x4000>;
                                interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
                                status = "disabled";
                        };
 
-                       usdhc2: usdhc@02194000 {
+                       usdhc2: mmc@2194000 {
                                compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
                                reg = <0x02194000 0x4000>;
                                interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
                                status = "disabled";
                        };
 
-                       usdhc3: usdhc@02198000 {
+                       usdhc3: mmc@2198000 {
                                compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
                                reg = <0x02198000 0x4000>;
                                interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
                                status = "disabled";
                        };
 
-                       usdhc4: usdhc@0219c000 {
+                       usdhc4: mmc@219c000 {
                                compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
                                reg = <0x0219c000 0x4000>;
                                interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
                                status = "disabled";
                        };
 
-                       i2c1: i2c@021a0000 {
+                       i2c1: i2c@21a0000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";
                                status = "disabled";
                        };
 
-                       i2c2: i2c@021a4000 {
+                       i2c2: i2c@21a4000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";
                                status = "disabled";
                        };
 
-                       i2c3: i2c@021a8000 {
+                       i2c3: i2c@21a8000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";
                                status = "disabled";
                        };
 
-                       mmdc: mmdc@021b0000 {
+                       memory-controller@21b0000 {
                                compatible = "fsl,imx6sl-mmdc", "fsl,imx6q-mmdc";
                                reg = <0x021b0000 0x4000>;
+                               clocks = <&clks IMX6SL_CLK_MMDC_P0_IPG>;
                        };
 
-                       rngb: rngb@021b4000 {
+                       rngb: rngb@21b4000 {
+                               compatible = "fsl,imx6sl-rngb", "fsl,imx25-rngb";
                                reg = <0x021b4000 0x4000>;
                                interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6SL_CLK_DUMMY>;
                        };
 
-                       weim: weim@021b8000 {
+                       weim: weim@21b8000 {
                                #address-cells = <2>;
                                #size-cells = <1>;
                                reg = <0x021b8000 0x4000>;
                                status = "disabled";
                        };
 
-                       ocotp: ocotp@021bc000 {
+                       ocotp: efuse@21bc000 {
                                compatible = "fsl,imx6sl-ocotp", "syscon";
                                reg = <0x021bc000 0x4000>;
                                clocks = <&clks IMX6SL_CLK_OCOTP>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               cpu_speed_grade: speed-grade@10 {
+                                       reg = <0x10 4>;
+                               };
+
+                               tempmon_calib: calib@38 {
+                                       reg = <0x38 4>;
+                               };
+
+                               tempmon_temp_grade: temp-grade@20 {
+                                       reg = <0x20 4>;
+                               };
                        };
 
-                       audmux: audmux@021d8000 {
+                       audmux: audmux@21d8000 {
                                compatible = "fsl,imx6sl-audmux", "fsl,imx31-audmux";
                                reg = <0x021d8000 0x4000>;
                                status = "disabled";
                        };
                };
+
+               gpu_2d: gpu@2200000 {
+                       compatible = "vivante,gc";
+                       reg = <0x02200000 0x4000>;
+                       interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks IMX6SL_CLK_MMDC_ROOT>,
+                                <&clks IMX6SL_CLK_GPU2D_OVG>;
+                       clock-names = "bus", "core";
+                       power-domains = <&pd_pu>;
+               };
+
+               gpu_vg: gpu@2204000 {
+                       compatible = "vivante,gc";
+                       reg = <0x02204000 0x4000>;
+                       interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks IMX6SL_CLK_MMDC_ROOT>,
+                                <&clks IMX6SL_CLK_GPU2D_OVG>;
+                       clock-names = "bus", "core";
+                       power-domains = <&pd_pu>;
+               };
        };
 };
index e14573e..31364d2 100644 (file)
@@ -1,10 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Copyright 2013 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
  */
 
 #ifndef __DT_BINDINGS_CLOCK_IMX6SL_H
 #define IMX6SL_CLK_SSI2_IPG            162
 #define IMX6SL_CLK_SSI3_IPG            163
 #define IMX6SL_CLK_SPDIF_GCLK          164
-#define IMX6SL_CLK_END                 165
+#define IMX6SL_CLK_MMDC_P0_IPG         165
+#define IMX6SL_CLK_MMDC_P1_IPG         166
+#define IMX6SL_CLK_END                 167
 
 #endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */