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irqchip/brcmstb-l2: Match UPG_AUX_AON_INTR2 compatible
author
Florian Fainelli
<f.fainelli@gmail.com>
Thu, 9 Jul 2020 22:30:16 +0000
(15:30 -0700)
committer
Marc Zyngier
<maz@kernel.org>
Fri, 17 Jul 2020 12:41:42 +0000
(13:41 +0100)
The UPG_AUX_AON_INTR2 Level 2 interrupt controller node is defined with
the "brcm,upg-aux-aon-l2-intc" compatible string in Device Tree and
behaves as an edge triggered standard Broadcom STB L2 interrupt
controller.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link:
https://lore.kernel.org/r/20200709223016.989-7-f.fainelli@gmail.com
drivers/irqchip/irq-brcmstb-l2.c
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diff --git
a/drivers/irqchip/irq-brcmstb-l2.c
b/drivers/irqchip/irq-brcmstb-l2.c
index b10fe5042a2f2ccb76bb57062d53a7ebaba28066..cdd6a42d4efa48cb404448d67cc55d4a698643a2 100644
(file)
--- a/
drivers/irqchip/irq-brcmstb-l2.c
+++ b/
drivers/irqchip/irq-brcmstb-l2.c
@@
-278,6
+278,8
@@
static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np,
IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init);
IRQCHIP_DECLARE(brcmstb_hif_spi_l2_intc, "brcm,hif-spi-l2-intc",
brcmstb_l2_edge_intc_of_init);
+IRQCHIP_DECLARE(brcmstb_upg_aux_aon_l2_intc, "brcm,upg-aux-aon-l2-intc",
+ brcmstb_l2_edge_intc_of_init);
static int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np,
struct device_node *parent)