--- /dev/null
+From 30c42ab8245b0db4c0251415e318a7f1d4c5ddf6 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Mon, 17 Jun 2013 15:40:52 +0900
+Subject: clocksource: sh_cmt: 32-bit control register support
+
+Add support for CMT hardware with 32-bit control and counter
+registers, as found on r8a73a4 and r8a7790. To use the CMT
+with 32-bit hardware a second I/O memory resource needs to
+point out the CMSTR register and it needs to be 32 bit wide.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8874c5e3b92fc23af4fd4da8830f7d4de41d03a0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 50 +++++++++++++++++++++++++++++++-------------
+ 1 file changed, 36 insertions(+), 14 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 08d0c418c94a..0965e9848b3d 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -37,6 +37,7 @@
+
+ struct sh_cmt_priv {
+ void __iomem *mapbase;
++ void __iomem *mapbase_str;
+ struct clk *clk;
+ unsigned long width; /* 16 or 32 bit version of hardware block */
+ unsigned long overflow_bit;
+@@ -79,6 +80,12 @@ struct sh_cmt_priv {
+ * CMCSR 0xffca0060 16-bit
+ * CMCNT 0xffca0064 32-bit
+ * CMCOR 0xffca0068 32-bit
++ *
++ * "32-bit counter and 32-bit control" as found on r8a73a4 and r8a7790:
++ * CMSTR 0xffca0500 32-bit
++ * CMCSR 0xffca0510 32-bit
++ * CMCNT 0xffca0514 32-bit
++ * CMCOR 0xffca0518 32-bit
+ */
+
+ static unsigned long sh_cmt_read16(void __iomem *base, unsigned long offs)
+@@ -109,9 +116,7 @@ static void sh_cmt_write32(void __iomem *base, unsigned long offs,
+
+ static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_priv *p)
+ {
+- struct sh_timer_config *cfg = p->pdev->dev.platform_data;
+-
+- return p->read_control(p->mapbase - cfg->channel_offset, 0);
++ return p->read_control(p->mapbase_str, 0);
+ }
+
+ static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_priv *p)
+@@ -127,9 +132,7 @@ static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_priv *p)
+ static inline void sh_cmt_write_cmstr(struct sh_cmt_priv *p,
+ unsigned long value)
+ {
+- struct sh_timer_config *cfg = p->pdev->dev.platform_data;
+-
+- p->write_control(p->mapbase - cfg->channel_offset, 0, value);
++ p->write_control(p->mapbase_str, 0, value);
+ }
+
+ static inline void sh_cmt_write_cmcsr(struct sh_cmt_priv *p,
+@@ -676,7 +679,7 @@ static int sh_cmt_register(struct sh_cmt_priv *p, char *name,
+ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
+ {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+- struct resource *res;
++ struct resource *res, *res2;
+ int irq, ret;
+ ret = -ENXIO;
+
+@@ -694,6 +697,9 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
+ goto err0;
+ }
+
++ /* optional resource for the shared timer start/stop register */
++ res2 = platform_get_resource(p->pdev, IORESOURCE_MEM, 1);
++
+ irq = platform_get_irq(p->pdev, 0);
+ if (irq < 0) {
+ dev_err(&p->pdev->dev, "failed to get irq\n");
+@@ -707,6 +713,15 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
+ goto err0;
+ }
+
++ /* map second resource for CMSTR */
++ p->mapbase_str = ioremap_nocache(res2 ? res2->start :
++ res->start - cfg->channel_offset,
++ res2 ? resource_size(res2) : 2);
++ if (p->mapbase_str == NULL) {
++ dev_err(&p->pdev->dev, "failed to remap I/O second memory\n");
++ goto err1;
++ }
++
+ /* request irq using setup_irq() (too early for request_irq()) */
+ p->irqaction.name = dev_name(&p->pdev->dev);
+ p->irqaction.handler = sh_cmt_interrupt;
+@@ -719,11 +734,17 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
+ if (IS_ERR(p->clk)) {
+ dev_err(&p->pdev->dev, "cannot get clock\n");
+ ret = PTR_ERR(p->clk);
+- goto err1;
++ goto err2;
+ }
+
+- p->read_control = sh_cmt_read16;
+- p->write_control = sh_cmt_write16;
++ if (res2 && (resource_size(res2) == 4)) {
++ /* assume both CMSTR and CMCSR to be 32-bit */
++ p->read_control = sh_cmt_read32;
++ p->write_control = sh_cmt_write32;
++ } else {
++ p->read_control = sh_cmt_read16;
++ p->write_control = sh_cmt_write16;
++ }
+
+ if (resource_size(res) == 6) {
+ p->width = 16;
+@@ -752,22 +773,23 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
+ cfg->clocksource_rating);
+ if (ret) {
+ dev_err(&p->pdev->dev, "registration failed\n");
+- goto err2;
++ goto err3;
+ }
+ p->cs_enabled = false;
+
+ ret = setup_irq(irq, &p->irqaction);
+ if (ret) {
+ dev_err(&p->pdev->dev, "failed to request irq %d\n", irq);
+- goto err2;
++ goto err3;
+ }
+
+ platform_set_drvdata(pdev, p);
+
+ return 0;
+-err2:
++err3:
+ clk_put(p->clk);
+-
++err2:
++ iounmap(p->mapbase_str);
+ err1:
+ iounmap(p->mapbase);
+ err0:
+--
+1.8.5.rc3
+
--- /dev/null
+From 8fd78e2aaaff6f497d7ff028d334b021a9f97cab Mon Sep 17 00:00:00 2001
+From: Ian Molton <ian.molton@codethink.co.uk>
+Date: Mon, 2 Sep 2013 16:44:55 +0100
+Subject: emev2: GPIOLIB: Enable support for OF
+
+EMEV2 is now a DT platform, however the GPIO driver cannot be used
+from a DT file since it does not fill out the of_node field in its
+gpio_chip structure.
+
+Signed-off-by: Ian Molton <ian.molton@codethink.co.uk>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit b59278548e2383976f7db5fd3389f9116a6f240d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpio/Kconfig | 2 +-
+ drivers/gpio/gpio-em.c | 1 +
+ 2 files changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
+index 573c449c49b9..cf35d107fb37 100644
+--- a/drivers/gpio/Kconfig
++++ b/drivers/gpio/Kconfig
+@@ -126,7 +126,7 @@ config GPIO_IT8761E
+
+ config GPIO_EM
+ tristate "Emma Mobile GPIO"
+- depends on ARM
++ depends on ARM && OF_GPIO
+ help
+ Say yes here to support GPIO on Renesas Emma Mobile SoCs.
+
+diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
+index c6e1f086efe8..160d759170a5 100644
+--- a/drivers/gpio/gpio-em.c
++++ b/drivers/gpio/gpio-em.c
+@@ -319,6 +319,7 @@ static int em_gio_probe(struct platform_device *pdev)
+ }
+
+ gpio_chip = &p->gpio_chip;
++ gpio_chip->of_node = pdev->dev.of_node;
+ gpio_chip->direction_input = em_gio_direction_input;
+ gpio_chip->get = em_gio_get;
+ gpio_chip->direction_output = em_gio_direction_output;
+--
+1.8.5.rc3
+
--- /dev/null
+From 50ae1fecdce5adf1642af1400daeb6ae22c91174 Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Fri, 11 Oct 2013 19:21:34 +0200
+Subject: gpio: em: drop references to "virtual" IRQ
+
+Rename the argument "virq" to just "irq", this IRQ isn't any
+more "virtual" than any other Linux IRQ number, we use "hwirq"
+for the actual hw-numbers, "virq" is just bogus.
+
+Cc: Magnus Damm <damm@opensource.se>
+Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 2d61e3e90798fdedb0a33714a30b241a5d5f2744)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpio/gpio-em.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
+index 160d759170a5..ec190361bf2e 100644
+--- a/drivers/gpio/gpio-em.c
++++ b/drivers/gpio/gpio-em.c
+@@ -232,16 +232,16 @@ static void em_gio_free(struct gpio_chip *chip, unsigned offset)
+ em_gio_direction_input(chip, offset);
+ }
+
+-static int em_gio_irq_domain_map(struct irq_domain *h, unsigned int virq,
+- irq_hw_number_t hw)
++static int em_gio_irq_domain_map(struct irq_domain *h, unsigned int irq,
++ irq_hw_number_t hwirq)
+ {
+ struct em_gio_priv *p = h->host_data;
+
+- pr_debug("gio: map hw irq = %d, virq = %d\n", (int)hw, virq);
++ pr_debug("gio: map hw irq = %d, irq = %d\n", (int)hwirq, irq);
+
+- irq_set_chip_data(virq, h->host_data);
+- irq_set_chip_and_handler(virq, &p->irq_chip, handle_level_irq);
+- set_irq_flags(virq, IRQF_VALID); /* kill me now */
++ irq_set_chip_data(irq, h->host_data);
++ irq_set_chip_and_handler(irq, &p->irq_chip, handle_level_irq);
++ set_irq_flags(irq, IRQF_VALID); /* kill me now */
+ return 0;
+ }
+
+--
+1.8.5.rc3
+
--- /dev/null
+From dd53e322d2810baded275f961ee2ec81a6e7b780 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 10 Dec 2013 02:20:41 +0300
+Subject: micrel: add support for KSZ8041RNLI
+
+Renesas R-Car development boards use KSZ8041RNLI PHY which for some reason has
+ID of 0x00221537 that is not documented for KSZ8041-family PHYs and does not
+match the documented ID of 0x0022151x (where 'x' is the revision). We have
+to add the new #define PHY_ID_* and new ksphy_driver[] entry, almost the same
+as KSZ8041 one, differing only in the 'phy_id' and 'name' fields.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 4bd7b5127bd02c12c1cc837a7a0b6ce295eb2505)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/phy/micrel.c | 15 +++++++++++++++
+ include/linux/micrel_phy.h | 2 ++
+ 2 files changed, 17 insertions(+)
+
+diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
+index 2510435f34ed..d8766ec4085b 100644
+--- a/drivers/net/phy/micrel.c
++++ b/drivers/net/phy/micrel.c
+@@ -227,6 +227,21 @@ static struct phy_driver ksphy_driver[] = {
+ .config_intr = kszphy_config_intr,
+ .driver = { .owner = THIS_MODULE,},
+ }, {
++ .phy_id = PHY_ID_KSZ8041RNLI,
++ .phy_id_mask = 0x00fffff0,
++ .name = "Micrel KSZ8041RNLI",
++ .features = PHY_BASIC_FEATURES |
++ SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
++ .config_init = kszphy_config_init,
++ .config_aneg = genphy_config_aneg,
++ .read_status = genphy_read_status,
++ .ack_interrupt = kszphy_ack_interrupt,
++ .config_intr = kszphy_config_intr,
++ .suspend = genphy_suspend,
++ .resume = genphy_resume,
++ .driver = { .owner = THIS_MODULE,},
++}, {
+ .phy_id = PHY_ID_KSZ8051,
+ .phy_id_mask = 0x00fffff0,
+ .name = "Micrel KSZ8051",
+diff --git a/include/linux/micrel_phy.h b/include/linux/micrel_phy.h
+index 8752dbbc6135..6075596f0095 100644
+--- a/include/linux/micrel_phy.h
++++ b/include/linux/micrel_phy.h
+@@ -21,6 +21,8 @@
+ #define PHY_ID_KSZ8021 0x00221555
+ #define PHY_ID_KSZ8031 0x00221556
+ #define PHY_ID_KSZ8041 0x00221510
++/* undocumented */
++#define PHY_ID_KSZ8041RNLI 0x00221537
+ #define PHY_ID_KSZ8051 0x00221550
+ /* same id: ks8001 Rev. A/B, and ks8721 Rev 3. */
+ #define PHY_ID_KSZ8001 0x0022161A
+--
+1.8.5.rc3
+
--- /dev/null
+From 6f06d28bccd8a3f5ad2c78919a5525110e68f5a4 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 6 Nov 2013 13:14:19 +0100
+Subject: clk: shmobile: Add R-Car Gen2 clocks support
+
+The R-Car Gen2 SoCs (R8A7790 and R8A7791) have several clocks that are
+too custom to be supported in a generic driver. Those clocks can be
+divided in two categories:
+
+- Fixed rate clocks with multiplier and divisor set according to boot
+ mode configuration
+
+- Custom divider clocks with SoC-specific divider values
+
+This driver supports both.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Kumar Gala <galak@codeaurora.org>
+Signed-off-by: Mike Turquette <mturquette@linaro.org>
+(cherry picked from commit 10cdfe9f327ab8d120cf6957e58c6203e3a53847)
+(Queued by Mike Turquette for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ drivers/clk/Makefile
+---
+ .../clock/renesas,rcar-gen2-cpg-clocks.txt | 32 +++
+ drivers/clk/Makefile | 1 +
+ drivers/clk/shmobile/Makefile | 5 +
+ drivers/clk/shmobile/clk-rcar-gen2.c | 298 +++++++++++++++++++++
+ include/linux/clk/shmobile.h | 19 ++
+ 5 files changed, 355 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
+ create mode 100644 drivers/clk/shmobile/Makefile
+ create mode 100644 drivers/clk/shmobile/clk-rcar-gen2.c
+ create mode 100644 include/linux/clk/shmobile.h
+
+diff --git a/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
+new file mode 100644
+index 000000000000..7b41c2fe54db
+--- /dev/null
++++ b/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
+@@ -0,0 +1,32 @@
++* Renesas R-Car Gen2 Clock Pulse Generator (CPG)
++
++The CPG generates core clocks for the R-Car Gen2 SoCs. It includes three PLLs
++and several fixed ratio dividers.
++
++Required Properties:
++
++ - compatible: Must be one of
++ - "renesas,r8a7790-cpg-clocks" for the r8a7790 CPG
++ - "renesas,r8a7791-cpg-clocks" for the r8a7791 CPG
++ - "renesas,rcar-gen2-cpg-clocks" for the generic R-Car Gen2 CPG
++
++ - reg: Base address and length of the memory resource used by the CPG
++
++ - clocks: Reference to the parent clock
++ - #clock-cells: Must be 1
++ - clock-output-names: The names of the clocks. Supported clocks are "main",
++ "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "sd1" and "z"
++
++
++Example
++-------
++
++ cpg_clocks: cpg_clocks@e6150000 {
++ compatible = "renesas,r8a7790-cpg-clocks",
++ "renesas,rcar-gen2-cpg-clocks";
++ reg = <0 0xe6150000 0 0x1000>;
++ clocks = <&extal_clk>;
++ #clock-cells = <1>;
++ clock-output-names = "main", "pll0, "pll1", "pll3",
++ "lb", "qspi", "sdh", "sd0", "sd1", "z";
++ };
+diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
+index 137d3e730f86..16a080a3b154 100644
+--- a/drivers/clk/Makefile
++++ b/drivers/clk/Makefile
+@@ -30,6 +30,7 @@ obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
+ obj-$(CONFIG_ARCH_ZYNQ) += clk-zynq.o
+ obj-$(CONFIG_ARCH_TEGRA) += tegra/
+ obj-$(CONFIG_PLAT_SAMSUNG) += samsung/
++obj-$(CONFIG_ARCH_SHMOBILE_MULTI) += shmobile/
+
+ obj-$(CONFIG_X86) += x86/
+
+diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
+new file mode 100644
+index 000000000000..d0a9034a7946
+--- /dev/null
++++ b/drivers/clk/shmobile/Makefile
+@@ -0,0 +1,5 @@
++obj-$(CONFIG_ARCH_R8A7790) += clk-rcar-gen2.o
++obj-$(CONFIG_ARCH_R8A7791) += clk-rcar-gen2.o
++
++# for emply built-in.o
++obj-n := dummy
+diff --git a/drivers/clk/shmobile/clk-rcar-gen2.c b/drivers/clk/shmobile/clk-rcar-gen2.c
+new file mode 100644
+index 000000000000..a59ec217a124
+--- /dev/null
++++ b/drivers/clk/shmobile/clk-rcar-gen2.c
+@@ -0,0 +1,298 @@
++/*
++ * rcar_gen2 Core CPG Clocks
++ *
++ * Copyright (C) 2013 Ideas On Board SPRL
++ *
++ * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ */
++
++#include <linux/clk-provider.h>
++#include <linux/clkdev.h>
++#include <linux/clk/shmobile.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/math64.h>
++#include <linux/of.h>
++#include <linux/of_address.h>
++#include <linux/spinlock.h>
++
++struct rcar_gen2_cpg {
++ struct clk_onecell_data data;
++ spinlock_t lock;
++ void __iomem *reg;
++};
++
++#define CPG_SDCKCR 0x00000074
++#define CPG_PLL0CR 0x000000d8
++#define CPG_FRQCRC 0x000000e0
++#define CPG_FRQCRC_ZFC_MASK (0x1f << 8)
++#define CPG_FRQCRC_ZFC_SHIFT 8
++
++/* -----------------------------------------------------------------------------
++ * Z Clock
++ *
++ * Traits of this clock:
++ * prepare - clk_prepare only ensures that parents are prepared
++ * enable - clk_enable only ensures that parents are enabled
++ * rate - rate is adjustable. clk->rate = parent->rate * mult / 32
++ * parent - fixed parent. No clk_set_parent support
++ */
++
++struct cpg_z_clk {
++ struct clk_hw hw;
++ void __iomem *reg;
++};
++
++#define to_z_clk(_hw) container_of(_hw, struct cpg_z_clk, hw)
++
++static unsigned long cpg_z_clk_recalc_rate(struct clk_hw *hw,
++ unsigned long parent_rate)
++{
++ struct cpg_z_clk *zclk = to_z_clk(hw);
++ unsigned int mult;
++ unsigned int val;
++
++ val = (clk_readl(zclk->reg) & CPG_FRQCRC_ZFC_MASK)
++ >> CPG_FRQCRC_ZFC_SHIFT;
++ mult = 32 - val;
++
++ return div_u64((u64)parent_rate * mult, 32);
++}
++
++static long cpg_z_clk_round_rate(struct clk_hw *hw, unsigned long rate,
++ unsigned long *parent_rate)
++{
++ unsigned long prate = *parent_rate;
++ unsigned int mult;
++
++ if (!prate)
++ prate = 1;
++
++ mult = div_u64((u64)rate * 32, prate);
++ mult = clamp(mult, 1U, 32U);
++
++ return *parent_rate / 32 * mult;
++}
++
++static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate,
++ unsigned long parent_rate)
++{
++ struct cpg_z_clk *zclk = to_z_clk(hw);
++ unsigned int mult;
++ u32 val;
++
++ mult = div_u64((u64)rate * 32, parent_rate);
++ mult = clamp(mult, 1U, 32U);
++
++ val = clk_readl(zclk->reg);
++ val &= ~CPG_FRQCRC_ZFC_MASK;
++ val |= (32 - mult) << CPG_FRQCRC_ZFC_SHIFT;
++ clk_writel(val, zclk->reg);
++
++ return 0;
++}
++
++static const struct clk_ops cpg_z_clk_ops = {
++ .recalc_rate = cpg_z_clk_recalc_rate,
++ .round_rate = cpg_z_clk_round_rate,
++ .set_rate = cpg_z_clk_set_rate,
++};
++
++static struct clk * __init cpg_z_clk_register(struct rcar_gen2_cpg *cpg)
++{
++ static const char *parent_name = "pll0";
++ struct clk_init_data init;
++ struct cpg_z_clk *zclk;
++ struct clk *clk;
++
++ zclk = kzalloc(sizeof(*zclk), GFP_KERNEL);
++ if (!zclk)
++ return ERR_PTR(-ENOMEM);
++
++ init.name = "z";
++ init.ops = &cpg_z_clk_ops;
++ init.flags = 0;
++ init.parent_names = &parent_name;
++ init.num_parents = 1;
++
++ zclk->reg = cpg->reg + CPG_FRQCRC;
++ zclk->hw.init = &init;
++
++ clk = clk_register(NULL, &zclk->hw);
++ if (IS_ERR(clk))
++ kfree(zclk);
++
++ return clk;
++}
++
++/* -----------------------------------------------------------------------------
++ * CPG Clock Data
++ */
++
++/*
++ * MD EXTAL PLL0 PLL1 PLL3
++ * 14 13 19 (MHz) *1 *1
++ *---------------------------------------------------
++ * 0 0 0 15 x 1 x172/2 x208/2 x106
++ * 0 0 1 15 x 1 x172/2 x208/2 x88
++ * 0 1 0 20 x 1 x130/2 x156/2 x80
++ * 0 1 1 20 x 1 x130/2 x156/2 x66
++ * 1 0 0 26 / 2 x200/2 x240/2 x122
++ * 1 0 1 26 / 2 x200/2 x240/2 x102
++ * 1 1 0 30 / 2 x172/2 x208/2 x106
++ * 1 1 1 30 / 2 x172/2 x208/2 x88
++ *
++ * *1 : Table 7.6 indicates VCO ouput (PLLx = VCO/2)
++ */
++#define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 12) | \
++ (((md) & BIT(13)) >> 12) | \
++ (((md) & BIT(19)) >> 19))
++struct cpg_pll_config {
++ unsigned int extal_div;
++ unsigned int pll1_mult;
++ unsigned int pll3_mult;
++};
++
++static const struct cpg_pll_config cpg_pll_configs[8] __initconst = {
++ { 1, 208, 106 }, { 1, 208, 88 }, { 1, 156, 80 }, { 1, 156, 66 },
++ { 2, 240, 122 }, { 2, 240, 102 }, { 2, 208, 106 }, { 2, 208, 88 },
++};
++
++/* SDHI divisors */
++static const struct clk_div_table cpg_sdh_div_table[] = {
++ { 0, 2 }, { 1, 3 }, { 2, 4 }, { 3, 6 },
++ { 4, 8 }, { 5, 12 }, { 6, 16 }, { 7, 18 },
++ { 8, 24 }, { 10, 36 }, { 11, 48 }, { 0, 0 },
++};
++
++static const struct clk_div_table cpg_sd01_div_table[] = {
++ { 5, 12 }, { 6, 16 }, { 7, 18 }, { 8, 24 },
++ { 10, 36 }, { 11, 48 }, { 12, 10 }, { 0, 0 },
++};
++
++/* -----------------------------------------------------------------------------
++ * Initialization
++ */
++
++static u32 cpg_mode __initdata;
++
++static struct clk * __init
++rcar_gen2_cpg_register_clock(struct device_node *np, struct rcar_gen2_cpg *cpg,
++ const struct cpg_pll_config *config,
++ const char *name)
++{
++ const struct clk_div_table *table = NULL;
++ const char *parent_name = "main";
++ unsigned int shift;
++ unsigned int mult = 1;
++ unsigned int div = 1;
++
++ if (!strcmp(name, "main")) {
++ parent_name = of_clk_get_parent_name(np, 0);
++ div = config->extal_div;
++ } else if (!strcmp(name, "pll0")) {
++ /* PLL0 is a configurable multiplier clock. Register it as a
++ * fixed factor clock for now as there's no generic multiplier
++ * clock implementation and we currently have no need to change
++ * the multiplier value.
++ */
++ u32 value = clk_readl(cpg->reg + CPG_PLL0CR);
++ mult = ((value >> 24) & ((1 << 7) - 1)) + 1;
++ } else if (!strcmp(name, "pll1")) {
++ mult = config->pll1_mult / 2;
++ } else if (!strcmp(name, "pll3")) {
++ mult = config->pll3_mult;
++ } else if (!strcmp(name, "lb")) {
++ div = cpg_mode & BIT(18) ? 36 : 24;
++ } else if (!strcmp(name, "qspi")) {
++ div = (cpg_mode & (BIT(3) | BIT(2) | BIT(1))) == BIT(2)
++ ? 16 : 20;
++ } else if (!strcmp(name, "sdh")) {
++ table = cpg_sdh_div_table;
++ shift = 8;
++ } else if (!strcmp(name, "sd0")) {
++ table = cpg_sd01_div_table;
++ shift = 4;
++ } else if (!strcmp(name, "sd1")) {
++ table = cpg_sd01_div_table;
++ shift = 0;
++ } else if (!strcmp(name, "z")) {
++ return cpg_z_clk_register(cpg);
++ } else {
++ return ERR_PTR(-EINVAL);
++ }
++
++ if (!table)
++ return clk_register_fixed_factor(NULL, name, parent_name, 0,
++ mult, div);
++ else
++ return clk_register_divider_table(NULL, name, parent_name, 0,
++ cpg->reg + CPG_SDCKCR, shift,
++ 4, 0, table, &cpg->lock);
++}
++
++static void __init rcar_gen2_cpg_clocks_init(struct device_node *np)
++{
++ const struct cpg_pll_config *config;
++ struct rcar_gen2_cpg *cpg;
++ struct clk **clks;
++ unsigned int i;
++ int num_clks;
++
++ num_clks = of_property_count_strings(np, "clock-output-names");
++ if (num_clks < 0) {
++ pr_err("%s: failed to count clocks\n", __func__);
++ return;
++ }
++
++ cpg = kzalloc(sizeof(*cpg), GFP_KERNEL);
++ clks = kzalloc(num_clks * sizeof(*clks), GFP_KERNEL);
++ if (cpg == NULL || clks == NULL) {
++ /* We're leaking memory on purpose, there's no point in cleaning
++ * up as the system won't boot anyway.
++ */
++ pr_err("%s: failed to allocate cpg\n", __func__);
++ return;
++ }
++
++ spin_lock_init(&cpg->lock);
++
++ cpg->data.clks = clks;
++ cpg->data.clk_num = num_clks;
++
++ cpg->reg = of_iomap(np, 0);
++ if (WARN_ON(cpg->reg == NULL))
++ return;
++
++ config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
++
++ for (i = 0; i < num_clks; ++i) {
++ const char *name;
++ struct clk *clk;
++
++ of_property_read_string_index(np, "clock-output-names", i,
++ &name);
++
++ clk = rcar_gen2_cpg_register_clock(np, cpg, config, name);
++ if (IS_ERR(clk))
++ pr_err("%s: failed to register %s %s clock (%ld)\n",
++ __func__, np->name, name, PTR_ERR(clk));
++ else
++ cpg->data.clks[i] = clk;
++ }
++
++ of_clk_add_provider(np, of_clk_src_onecell_get, &cpg->data);
++}
++CLK_OF_DECLARE(rcar_gen2_cpg_clks, "renesas,rcar-gen2-cpg-clocks",
++ rcar_gen2_cpg_clocks_init);
++
++void __init rcar_gen2_clocks_init(u32 mode)
++{
++ cpg_mode = mode;
++
++ of_clk_init(NULL);
++}
+diff --git a/include/linux/clk/shmobile.h b/include/linux/clk/shmobile.h
+new file mode 100644
+index 000000000000..f9bf080a1123
+--- /dev/null
++++ b/include/linux/clk/shmobile.h
+@@ -0,0 +1,19 @@
++/*
++ * Copyright 2013 Ideas On Board SPRL
++ *
++ * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef __LINUX_CLK_SHMOBILE_H_
++#define __LINUX_CLK_SHMOBILE_H_
++
++#include <linux/types.h>
++
++void rcar_gen2_clocks_init(u32 mode);
++
++#endif
+--
+1.8.5.rc3
+
--- /dev/null
+From 55e5d8655a06f63b403276f337ba3c8a2d22978a Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 17 Oct 2013 23:54:07 +0200
+Subject: clk: shmobile: Add DIV6 clock support
+
+DIV6 clocks are divider gate clocks controlled through a single
+register. The divider is expressed on 6 bits, hence the name, and can
+take values from 1/1 to 1/64.
+
+Those clocks are found on Renesas ARM SoCs.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Mike Turquette <mturquette@linaro.org>
+(cherry picked from commit abe844aa5bb50444ac3e02aed89b431823d6ad56)
+(Queued by Mike Turquette for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ .../bindings/clock/renesas,cpg-div6-clocks.txt | 28 ++++
+ drivers/clk/shmobile/Makefile | 1 +
+ drivers/clk/shmobile/clk-div6.c | 185 +++++++++++++++++++++
+ 3 files changed, 214 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt
+ create mode 100644 drivers/clk/shmobile/clk-div6.c
+
+diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt
+new file mode 100644
+index 000000000000..952e373178d2
+--- /dev/null
++++ b/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt
+@@ -0,0 +1,28 @@
++* Renesas CPG DIV6 Clock
++
++The CPG DIV6 clocks are variable factor clocks provided by the Clock Pulse
++Generator (CPG). They clock input is divided by a configurable factor from 1
++to 64.
++
++Required Properties:
++
++ - compatible: Must be one of the following
++ - "renesas,r8a7790-div6-clock" for R8A7790 (R-Car H2) DIV6 clocks
++ - "renesas,r8a7791-div6-clock" for R8A7791 (R-Car M2) DIV6 clocks
++ - "renesas,cpg-div6-clock" for generic DIV6 clocks
++ - reg: Base address and length of the memory resource used by the DIV6 clock
++ - clocks: Reference to the parent clock
++ - #clock-cells: Must be 0
++ - clock-output-names: The name of the clock as a free-form string
++
++
++Example
++-------
++
++ sd2_clk: sd2_clk@e6150078 {
++ compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
++ reg = <0 0xe6150078 0 4>;
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-output-names = "sd2";
++ };
+diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
+index d0a9034a7946..2e4a1197aa0a 100644
+--- a/drivers/clk/shmobile/Makefile
++++ b/drivers/clk/shmobile/Makefile
+@@ -1,5 +1,6 @@
+ obj-$(CONFIG_ARCH_R8A7790) += clk-rcar-gen2.o
+ obj-$(CONFIG_ARCH_R8A7791) += clk-rcar-gen2.o
++obj-$(CONFIG_ARCH_SHMOBILE_MULTI) += clk-div6.o
+
+ # for emply built-in.o
+ obj-n := dummy
+diff --git a/drivers/clk/shmobile/clk-div6.c b/drivers/clk/shmobile/clk-div6.c
+new file mode 100644
+index 000000000000..aac4756ec52e
+--- /dev/null
++++ b/drivers/clk/shmobile/clk-div6.c
+@@ -0,0 +1,185 @@
++/*
++ * r8a7790 Common Clock Framework support
++ *
++ * Copyright (C) 2013 Renesas Solutions Corp.
++ *
++ * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ */
++
++#include <linux/clk-provider.h>
++#include <linux/clkdev.h>
++#include <linux/init.h>
++#include <linux/io.h>
++#include <linux/kernel.h>
++#include <linux/of.h>
++#include <linux/of_address.h>
++
++#define CPG_DIV6_CKSTP BIT(8)
++#define CPG_DIV6_DIV(d) ((d) & 0x3f)
++#define CPG_DIV6_DIV_MASK 0x3f
++
++/**
++ * struct div6_clock - MSTP gating clock
++ * @hw: handle between common and hardware-specific interfaces
++ * @reg: IO-remapped register
++ * @div: divisor value (1-64)
++ */
++struct div6_clock {
++ struct clk_hw hw;
++ void __iomem *reg;
++ unsigned int div;
++};
++
++#define to_div6_clock(_hw) container_of(_hw, struct div6_clock, hw)
++
++static int cpg_div6_clock_enable(struct clk_hw *hw)
++{
++ struct div6_clock *clock = to_div6_clock(hw);
++
++ clk_writel(CPG_DIV6_DIV(clock->div - 1), clock->reg);
++
++ return 0;
++}
++
++static void cpg_div6_clock_disable(struct clk_hw *hw)
++{
++ struct div6_clock *clock = to_div6_clock(hw);
++
++ /* DIV6 clocks require the divisor field to be non-zero when stopping
++ * the clock.
++ */
++ clk_writel(CPG_DIV6_CKSTP | CPG_DIV6_DIV(CPG_DIV6_DIV_MASK),
++ clock->reg);
++}
++
++static int cpg_div6_clock_is_enabled(struct clk_hw *hw)
++{
++ struct div6_clock *clock = to_div6_clock(hw);
++
++ return !(clk_readl(clock->reg) & CPG_DIV6_CKSTP);
++}
++
++static unsigned long cpg_div6_clock_recalc_rate(struct clk_hw *hw,
++ unsigned long parent_rate)
++{
++ struct div6_clock *clock = to_div6_clock(hw);
++ unsigned int div = (clk_readl(clock->reg) & CPG_DIV6_DIV_MASK) + 1;
++
++ return parent_rate / div;
++}
++
++static unsigned int cpg_div6_clock_calc_div(unsigned long rate,
++ unsigned long parent_rate)
++{
++ unsigned int div;
++
++ div = DIV_ROUND_CLOSEST(parent_rate, rate);
++ return clamp_t(unsigned int, div, 1, 64);
++}
++
++static long cpg_div6_clock_round_rate(struct clk_hw *hw, unsigned long rate,
++ unsigned long *parent_rate)
++{
++ unsigned int div = cpg_div6_clock_calc_div(rate, *parent_rate);
++
++ return *parent_rate / div;
++}
++
++static int cpg_div6_clock_set_rate(struct clk_hw *hw, unsigned long rate,
++ unsigned long parent_rate)
++{
++ struct div6_clock *clock = to_div6_clock(hw);
++ unsigned int div = cpg_div6_clock_calc_div(rate, parent_rate);
++
++ clock->div = div;
++
++ /* Only program the new divisor if the clock isn't stopped. */
++ if (!(clk_readl(clock->reg) & CPG_DIV6_CKSTP))
++ clk_writel(CPG_DIV6_DIV(clock->div - 1), clock->reg);
++
++ return 0;
++}
++
++static const struct clk_ops cpg_div6_clock_ops = {
++ .enable = cpg_div6_clock_enable,
++ .disable = cpg_div6_clock_disable,
++ .is_enabled = cpg_div6_clock_is_enabled,
++ .recalc_rate = cpg_div6_clock_recalc_rate,
++ .round_rate = cpg_div6_clock_round_rate,
++ .set_rate = cpg_div6_clock_set_rate,
++};
++
++static void __init cpg_div6_clock_init(struct device_node *np)
++{
++ struct clk_init_data init;
++ struct div6_clock *clock;
++ const char *parent_name;
++ const char *name;
++ struct clk *clk;
++ int ret;
++
++ clock = kzalloc(sizeof(*clock), GFP_KERNEL);
++ if (!clock) {
++ pr_err("%s: failed to allocate %s DIV6 clock\n",
++ __func__, np->name);
++ return;
++ }
++
++ /* Remap the clock register and read the divisor. Disabling the
++ * clock overwrites the divisor, so we need to cache its value for the
++ * enable operation.
++ */
++ clock->reg = of_iomap(np, 0);
++ if (clock->reg == NULL) {
++ pr_err("%s: failed to map %s DIV6 clock register\n",
++ __func__, np->name);
++ goto error;
++ }
++
++ clock->div = (clk_readl(clock->reg) & CPG_DIV6_DIV_MASK) + 1;
++
++ /* Parse the DT properties. */
++ ret = of_property_read_string(np, "clock-output-names", &name);
++ if (ret < 0) {
++ pr_err("%s: failed to get %s DIV6 clock output name\n",
++ __func__, np->name);
++ goto error;
++ }
++
++ parent_name = of_clk_get_parent_name(np, 0);
++ if (parent_name == NULL) {
++ pr_err("%s: failed to get %s DIV6 clock parent name\n",
++ __func__, np->name);
++ goto error;
++ }
++
++ /* Register the clock. */
++ init.name = name;
++ init.ops = &cpg_div6_clock_ops;
++ init.flags = CLK_IS_BASIC;
++ init.parent_names = &parent_name;
++ init.num_parents = 1;
++
++ clock->hw.init = &init;
++
++ clk = clk_register(NULL, &clock->hw);
++ if (IS_ERR(clk)) {
++ pr_err("%s: failed to register %s DIV6 clock (%ld)\n",
++ __func__, np->name, PTR_ERR(clk));
++ goto error;
++ }
++
++ of_clk_add_provider(np, of_clk_src_simple_get, clk);
++
++ return;
++
++error:
++ if (clock->reg)
++ iounmap(clock->reg);
++ kfree(clock);
++}
++CLK_OF_DECLARE(cpg_div6_clk, "renesas,cpg-div6-clock", cpg_div6_clock_init);
+--
+1.8.5.rc3
+
--- /dev/null
+From fcd3dca0a33b8b10f5a4af7114504f18374399bd Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 17 Oct 2013 23:54:07 +0200
+Subject: clk: shmobile: Add MSTP clock support
+
+MSTP clocks are gate clocks controlled through a register that handles
+up to 32 clocks. The register is often sparsely populated.
+
+Those clocks are found on Renesas ARM SoCs.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Mike Turquette <mturquette@linaro.org>
+(cherry picked from commit f94859c215b6d977794108a1a9a101239e393c09)
+(Queued by Mike Turquette for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ .../bindings/clock/renesas,cpg-mstp-clocks.txt | 51 +++++
+ drivers/clk/shmobile/Makefile | 1 +
+ drivers/clk/shmobile/clk-mstp.c | 229 +++++++++++++++++++++
+ 3 files changed, 281 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+ create mode 100644 drivers/clk/shmobile/clk-mstp.c
+
+diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+new file mode 100644
+index 000000000000..a6a352c2771e
+--- /dev/null
++++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+@@ -0,0 +1,51 @@
++* Renesas CPG Module Stop (MSTP) Clocks
++
++The CPG can gate SoC device clocks. The gates are organized in groups of up to
++32 gates.
++
++This device tree binding describes a single 32 gate clocks group per node.
++Clocks are referenced by user nodes by the MSTP node phandle and the clock
++index in the group, from 0 to 31.
++
++Required Properties:
++
++ - compatible: Must be one of the following
++ - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
++ - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
++ - "renesas,cpg-mstp-clock" for generic MSTP gate clocks
++ - reg: Base address and length of the I/O mapped registers used by the MSTP
++ clocks. The first register is the clock control register and is mandatory.
++ The second register is the clock status register and is optional when not
++ implemented in hardware.
++ - clocks: Reference to the parent clocks, one per output clock. The parents
++ must appear in the same order as the output clocks.
++ - #clock-cells: Must be 1
++ - clock-output-names: The name of the clocks as free-form strings
++ - renesas,indices: Indices of the gate clocks into the group (0 to 31)
++
++The clocks, clock-output-names and renesas,indices properties contain one
++entry per gate clock. The MSTP groups are sparsely populated. Unimplemented
++gate clocks must not be declared.
++
++
++Example
++-------
++
++ #include <dt-bindings/clock/r8a7790-clock.h>
++
++ mstp3_clks: mstp3_clks@e615013c {
++ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
++ clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
++ <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>,
++ <&mmc0_clk>;
++ #clock-cells = <1>;
++ clock-output-names =
++ "tpu0", "mmcif1", "sdhi3", "sdhi2",
++ "sdhi1", "sdhi0", "mmcif0";
++ renesas,clock-indices = <
++ R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
++ R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
++ R8A7790_CLK_MMCIF0
++ >;
++ };
+diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
+index 2e4a1197aa0a..706adc6ae70c 100644
+--- a/drivers/clk/shmobile/Makefile
++++ b/drivers/clk/shmobile/Makefile
+@@ -1,6 +1,7 @@
+ obj-$(CONFIG_ARCH_R8A7790) += clk-rcar-gen2.o
+ obj-$(CONFIG_ARCH_R8A7791) += clk-rcar-gen2.o
+ obj-$(CONFIG_ARCH_SHMOBILE_MULTI) += clk-div6.o
++obj-$(CONFIG_ARCH_SHMOBILE_MULTI) += clk-mstp.o
+
+ # for emply built-in.o
+ obj-n := dummy
+diff --git a/drivers/clk/shmobile/clk-mstp.c b/drivers/clk/shmobile/clk-mstp.c
+new file mode 100644
+index 000000000000..e576b60de20e
+--- /dev/null
++++ b/drivers/clk/shmobile/clk-mstp.c
+@@ -0,0 +1,229 @@
++/*
++ * R-Car MSTP clocks
++ *
++ * Copyright (C) 2013 Ideas On Board SPRL
++ *
++ * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ */
++
++#include <linux/clk-provider.h>
++#include <linux/clkdev.h>
++#include <linux/io.h>
++#include <linux/of.h>
++#include <linux/of_address.h>
++#include <linux/spinlock.h>
++
++/*
++ * MSTP clocks. We can't use standard gate clocks as we need to poll on the
++ * status register when enabling the clock.
++ */
++
++#define MSTP_MAX_CLOCKS 32
++
++/**
++ * struct mstp_clock_group - MSTP gating clocks group
++ *
++ * @data: clocks in this group
++ * @smstpcr: module stop control register
++ * @mstpsr: module stop status register (optional)
++ * @lock: protects writes to SMSTPCR
++ */
++struct mstp_clock_group {
++ struct clk_onecell_data data;
++ void __iomem *smstpcr;
++ void __iomem *mstpsr;
++ spinlock_t lock;
++};
++
++/**
++ * struct mstp_clock - MSTP gating clock
++ * @hw: handle between common and hardware-specific interfaces
++ * @bit_index: control bit index
++ * @group: MSTP clocks group
++ */
++struct mstp_clock {
++ struct clk_hw hw;
++ u32 bit_index;
++ struct mstp_clock_group *group;
++};
++
++#define to_mstp_clock(_hw) container_of(_hw, struct mstp_clock, hw)
++
++static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
++{
++ struct mstp_clock *clock = to_mstp_clock(hw);
++ struct mstp_clock_group *group = clock->group;
++ u32 bitmask = BIT(clock->bit_index);
++ unsigned long flags;
++ unsigned int i;
++ u32 value;
++
++ spin_lock_irqsave(&group->lock, flags);
++
++ value = clk_readl(group->smstpcr);
++ if (enable)
++ value &= ~bitmask;
++ else
++ value |= bitmask;
++ clk_writel(value, group->smstpcr);
++
++ spin_unlock_irqrestore(&group->lock, flags);
++
++ if (!enable || !group->mstpsr)
++ return 0;
++
++ for (i = 1000; i > 0; --i) {
++ if (!(clk_readl(group->mstpsr) & bitmask))
++ break;
++ cpu_relax();
++ }
++
++ if (!i) {
++ pr_err("%s: failed to enable %p[%d]\n", __func__,
++ group->smstpcr, clock->bit_index);
++ return -ETIMEDOUT;
++ }
++
++ return 0;
++}
++
++static int cpg_mstp_clock_enable(struct clk_hw *hw)
++{
++ return cpg_mstp_clock_endisable(hw, true);
++}
++
++static void cpg_mstp_clock_disable(struct clk_hw *hw)
++{
++ cpg_mstp_clock_endisable(hw, false);
++}
++
++static int cpg_mstp_clock_is_enabled(struct clk_hw *hw)
++{
++ struct mstp_clock *clock = to_mstp_clock(hw);
++ struct mstp_clock_group *group = clock->group;
++ u32 value;
++
++ if (group->mstpsr)
++ value = clk_readl(group->mstpsr);
++ else
++ value = clk_readl(group->smstpcr);
++
++ return !!(value & BIT(clock->bit_index));
++}
++
++static const struct clk_ops cpg_mstp_clock_ops = {
++ .enable = cpg_mstp_clock_enable,
++ .disable = cpg_mstp_clock_disable,
++ .is_enabled = cpg_mstp_clock_is_enabled,
++};
++
++static struct clk * __init
++cpg_mstp_clock_register(const char *name, const char *parent_name,
++ unsigned int index, struct mstp_clock_group *group)
++{
++ struct clk_init_data init;
++ struct mstp_clock *clock;
++ struct clk *clk;
++
++ clock = kzalloc(sizeof(*clock), GFP_KERNEL);
++ if (!clock) {
++ pr_err("%s: failed to allocate MSTP clock.\n", __func__);
++ return ERR_PTR(-ENOMEM);
++ }
++
++ init.name = name;
++ init.ops = &cpg_mstp_clock_ops;
++ init.flags = CLK_IS_BASIC;
++ init.parent_names = &parent_name;
++ init.num_parents = 1;
++
++ clock->bit_index = index;
++ clock->group = group;
++ clock->hw.init = &init;
++
++ clk = clk_register(NULL, &clock->hw);
++
++ if (IS_ERR(clk))
++ kfree(clock);
++
++ return clk;
++}
++
++static void __init cpg_mstp_clocks_init(struct device_node *np)
++{
++ struct mstp_clock_group *group;
++ struct clk **clks;
++ unsigned int i;
++
++ group = kzalloc(sizeof(*group), GFP_KERNEL);
++ clks = kzalloc(MSTP_MAX_CLOCKS * sizeof(*clks), GFP_KERNEL);
++ if (group == NULL || clks == NULL) {
++ kfree(group);
++ kfree(clks);
++ pr_err("%s: failed to allocate group\n", __func__);
++ return;
++ }
++
++ spin_lock_init(&group->lock);
++ group->data.clks = clks;
++
++ group->smstpcr = of_iomap(np, 0);
++ group->mstpsr = of_iomap(np, 1);
++
++ if (group->smstpcr == NULL) {
++ pr_err("%s: failed to remap SMSTPCR\n", __func__);
++ kfree(group);
++ kfree(clks);
++ return;
++ }
++
++ for (i = 0; i < MSTP_MAX_CLOCKS; ++i) {
++ const char *parent_name;
++ const char *name;
++ u32 clkidx;
++ int ret;
++
++ /* Skip clocks with no name. */
++ ret = of_property_read_string_index(np, "clock-output-names",
++ i, &name);
++ if (ret < 0 || strlen(name) == 0)
++ continue;
++
++ parent_name = of_clk_get_parent_name(np, i);
++ ret = of_property_read_u32_index(np, "renesas,clock-indices", i,
++ &clkidx);
++ if (parent_name == NULL || ret < 0)
++ break;
++
++ if (clkidx >= MSTP_MAX_CLOCKS) {
++ pr_err("%s: invalid clock %s %s index %u)\n",
++ __func__, np->name, name, clkidx);
++ continue;
++ }
++
++ clks[clkidx] = cpg_mstp_clock_register(name, parent_name, i,
++ group);
++ if (!IS_ERR(clks[clkidx])) {
++ group->data.clk_num = max(group->data.clk_num, clkidx);
++ /*
++ * Register a clkdev to let board code retrieve the
++ * clock by name and register aliases for non-DT
++ * devices.
++ *
++ * FIXME: Remove this when all devices that require a
++ * clock will be instantiated from DT.
++ */
++ clk_register_clkdev(clks[clkidx], name, NULL);
++ } else {
++ pr_err("%s: failed to register %s %s clock (%ld)\n",
++ __func__, np->name, name, PTR_ERR(clks[clkidx]));
++ }
++ }
++
++ of_clk_add_provider(np, of_clk_src_onecell_get, &group->data);
++}
++CLK_OF_DECLARE(cpg_mstp_clks, "renesas,cpg-mstp-clocks", cpg_mstp_clocks_init);
+--
+1.8.5.rc3
+
--- /dev/null
+From 235b93ab5a6cd4493f53610a12c62cecde1f5771 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 14 Dec 2013 15:07:32 +0900
+Subject: clocksource: sh_cmt: Add clk_prepare/unprepare support
+
+Prepare the clock at probe time, as there is no other appropriate place
+in the driver where we're allowed to sleep.
+
+Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
+Cc: linux-kernel@vger.kernel.org
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+(cherry picked from commit 57dee992df244ccce6a6a3a88a43160e285da5d8)
+(Queued by Daniel Lezcano for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 20 ++++++++++++++++----
+ 1 file changed, 16 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 0965e9848b3d..940341a185d7 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -634,12 +634,18 @@ static int sh_cmt_clock_event_next(unsigned long delta,
+
+ static void sh_cmt_clock_event_suspend(struct clock_event_device *ced)
+ {
+- pm_genpd_syscore_poweroff(&ced_to_sh_cmt(ced)->pdev->dev);
++ struct sh_cmt_priv *p = ced_to_sh_cmt(ced);
++
++ pm_genpd_syscore_poweroff(&p->pdev->dev);
++ clk_unprepare(p->clk);
+ }
+
+ static void sh_cmt_clock_event_resume(struct clock_event_device *ced)
+ {
+- pm_genpd_syscore_poweron(&ced_to_sh_cmt(ced)->pdev->dev);
++ struct sh_cmt_priv *p = ced_to_sh_cmt(ced);
++
++ clk_prepare(p->clk);
++ pm_genpd_syscore_poweron(&p->pdev->dev);
+ }
+
+ static void sh_cmt_register_clockevent(struct sh_cmt_priv *p,
+@@ -737,6 +743,10 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
+ goto err2;
+ }
+
++ ret = clk_prepare(p->clk);
++ if (ret < 0)
++ goto err3;
++
+ if (res2 && (resource_size(res2) == 4)) {
+ /* assume both CMSTR and CMCSR to be 32-bit */
+ p->read_control = sh_cmt_read32;
+@@ -773,19 +783,21 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
+ cfg->clocksource_rating);
+ if (ret) {
+ dev_err(&p->pdev->dev, "registration failed\n");
+- goto err3;
++ goto err4;
+ }
+ p->cs_enabled = false;
+
+ ret = setup_irq(irq, &p->irqaction);
+ if (ret) {
+ dev_err(&p->pdev->dev, "failed to request irq %d\n", irq);
+- goto err3;
++ goto err4;
+ }
+
+ platform_set_drvdata(pdev, p);
+
+ return 0;
++err4:
++ clk_unprepare(p->clk);
+ err3:
+ clk_put(p->clk);
+ err2:
+--
+1.8.5.rc3
+
--- /dev/null
+From 014d3e2a7927a4c67f1a9f1c3112f2d597208b9b Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 29 Nov 2013 14:48:00 +0100
+Subject: gpio: rcar: Support both edge trigger with DT
+
+Some versions of the R-Car GPIO controller support triggering on both
+edges of the input signal. Whether this capability is supported is
+currently specified in platform data. R-Car GPIO devices instantiated
+from the device tree have the capability turned off even when the
+hardware supports it.
+
+To fix this, add DT match data support to the driver, initialize both
+edge trigger support from match data and enable both edge trigger in
+r8a7790 and r8a7791 match data.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 850dfe17e3c467f50a0b9a527a65831873740c23)
+(Queued by Linus Walleij for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpio/gpio-rcar.c | 56 +++++++++++++++++++++++++++++++++++++-----------
+ 1 file changed, 43 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
+index b0238442f737..6bb29c40a763 100644
+--- a/drivers/gpio/gpio-rcar.c
++++ b/drivers/gpio/gpio-rcar.c
+@@ -284,7 +284,34 @@ static struct irq_domain_ops gpio_rcar_irq_domain_ops = {
+ .map = gpio_rcar_irq_domain_map,
+ };
+
+-static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
++struct gpio_rcar_info {
++ bool has_both_edge_trigger;
++};
++
++static const struct of_device_id gpio_rcar_of_table[] = {
++ {
++ .compatible = "renesas,gpio-r8a7790",
++ .data = (void *)&(const struct gpio_rcar_info) {
++ .has_both_edge_trigger = true,
++ },
++ }, {
++ .compatible = "renesas,gpio-r8a7791",
++ .data = (void *)&(const struct gpio_rcar_info) {
++ .has_both_edge_trigger = true,
++ },
++ }, {
++ .compatible = "renesas,gpio-rcar",
++ .data = (void *)&(const struct gpio_rcar_info) {
++ .has_both_edge_trigger = false,
++ },
++ }, {
++ /* Terminator */
++ },
++};
++
++MODULE_DEVICE_TABLE(of, gpio_rcar_of_table);
++
++static int gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
+ {
+ struct gpio_rcar_config *pdata = p->pdev->dev.platform_data;
+ struct device_node *np = p->pdev->dev.of_node;
+@@ -294,11 +321,21 @@ static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
+ if (pdata) {
+ p->config = *pdata;
+ } else if (IS_ENABLED(CONFIG_OF) && np) {
++ const struct of_device_id *match;
++ const struct gpio_rcar_info *info;
++
++ match = of_match_node(gpio_rcar_of_table, np);
++ if (!match)
++ return -EINVAL;
++
++ info = match->data;
++
+ ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0,
+ &args);
+ p->config.number_of_pins = ret == 0 ? args.args[2]
+ : RCAR_MAX_GPIO_PER_BANK;
+ p->config.gpio_base = -1;
++ p->config.has_both_edge_trigger = info->has_both_edge_trigger;
+ }
+
+ if (p->config.number_of_pins == 0 ||
+@@ -308,6 +345,8 @@ static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
+ p->config.number_of_pins, RCAR_MAX_GPIO_PER_BANK);
+ p->config.number_of_pins = RCAR_MAX_GPIO_PER_BANK;
+ }
++
++ return 0;
+ }
+
+ static int gpio_rcar_probe(struct platform_device *pdev)
+@@ -330,7 +369,9 @@ static int gpio_rcar_probe(struct platform_device *pdev)
+ spin_lock_init(&p->lock);
+
+ /* Get device configuration from DT node or platform data. */
+- gpio_rcar_parse_pdata(p);
++ ret = gpio_rcar_parse_pdata(p);
++ if (ret < 0)
++ return ret;
+
+ platform_set_drvdata(pdev, p);
+
+@@ -435,17 +476,6 @@ static int gpio_rcar_remove(struct platform_device *pdev)
+ return 0;
+ }
+
+-#ifdef CONFIG_OF
+-static const struct of_device_id gpio_rcar_of_table[] = {
+- {
+- .compatible = "renesas,gpio-rcar",
+- },
+- { },
+-};
+-
+-MODULE_DEVICE_TABLE(of, gpio_rcar_of_table);
+-#endif
+-
+ static struct platform_driver gpio_rcar_device_driver = {
+ .probe = gpio_rcar_probe,
+ .remove = gpio_rcar_remove,
+--
+1.8.5.rc3
+
--- /dev/null
+From 0ff9af6608e43abe9ba2ed1f6e1fb75a57b0ef5e Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 09:23:08 +0900
+Subject: gpio: rcar: Use lazy disable
+
+Set the ->irq_enable() and ->irq_disable() methods to NULL
+to enable lazy disable of interrupts. This by itself provides
+some level of optimization, but is mainly enabled as ground
+work for future Suspend-to-RAM wake up support.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit fba968a1e6b84be01e548f4b28b78e0542f3adaa)
+(Queued by Linus Walleij for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpio/gpio-rcar.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
+index 6bb29c40a763..496c58ffac35 100644
+--- a/drivers/gpio/gpio-rcar.c
++++ b/drivers/gpio/gpio-rcar.c
+@@ -410,8 +410,6 @@ static int gpio_rcar_probe(struct platform_device *pdev)
+ irq_chip->name = name;
+ irq_chip->irq_mask = gpio_rcar_irq_disable;
+ irq_chip->irq_unmask = gpio_rcar_irq_enable;
+- irq_chip->irq_enable = gpio_rcar_irq_enable;
+- irq_chip->irq_disable = gpio_rcar_irq_disable;
+ irq_chip->irq_set_type = gpio_rcar_irq_set_type;
+ irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_SET_TYPE_MASKED;
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 2a3e6fb4e0e65a79289c91eed676cc7ea5c2f8f2 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 09:23:17 +0900
+Subject: gpio: rcar: Enable mask on suspend
+
+Now when lazy interrupt disable has been enabled in the driver
+then extend the code to set IRQCHIP_MASK_ON_SUSPEND which tells
+the core that only IRQs marked as wakeups need to stay enabled
+during Suspend-to-RAM.
+
+Tested on the Lager board with GPIO-keys and Suspend-to-RAM.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 403961120667bed7161777d33483596edd0b05f2)
+(Queued by Linus Walleij for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpio/gpio-rcar.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
+index 496c58ffac35..9ed792121dd0 100644
+--- a/drivers/gpio/gpio-rcar.c
++++ b/drivers/gpio/gpio-rcar.c
+@@ -411,7 +411,8 @@ static int gpio_rcar_probe(struct platform_device *pdev)
+ irq_chip->irq_mask = gpio_rcar_irq_disable;
+ irq_chip->irq_unmask = gpio_rcar_irq_enable;
+ irq_chip->irq_set_type = gpio_rcar_irq_set_type;
+- irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_SET_TYPE_MASKED;
++ irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_SET_TYPE_MASKED
++ | IRQCHIP_MASK_ON_SUSPEND;
+
+ p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
+ p->config.number_of_pins,
+--
+1.8.5.rc3
+
--- /dev/null
+From 0769eca8f10f41afd316902e85ee52785f96667b Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 09:23:35 +0900
+Subject: gpio: em: Use lazy disable
+
+Set the ->irq_enable() and ->irq_disable() methods to NULL
+to enable lazy disable of interrupts. This by itself provides
+some level of optimization, but is mainly enabled as ground
+work for future Suspend-to-RAM wake up support.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 664734c012e6f3a88b2da4c586002cd62a277003)
+(Queued by Linus Walleij for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpio/gpio-em.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
+index ec190361bf2e..5b518e784824 100644
+--- a/drivers/gpio/gpio-em.c
++++ b/drivers/gpio/gpio-em.c
+@@ -336,8 +336,6 @@ static int em_gio_probe(struct platform_device *pdev)
+ irq_chip->name = name;
+ irq_chip->irq_mask = em_gio_irq_disable;
+ irq_chip->irq_unmask = em_gio_irq_enable;
+- irq_chip->irq_enable = em_gio_irq_enable;
+- irq_chip->irq_disable = em_gio_irq_disable;
+ irq_chip->irq_set_type = em_gio_irq_set_type;
+ irq_chip->flags = IRQCHIP_SKIP_SET_WAKE;
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 6e12a692802ff5fde80410ee2f9949ce3b543a74 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 09:23:44 +0900
+Subject: gpio: em: Enable mask on suspend
+
+Now when lazy interrupt disable has been enabled in the driver
+then extend the code to set IRQCHIP_MASK_ON_SUSPEND which tells
+the core that only IRQs marked as wakeups need to stay enabled
+during Suspend-to-RAM.
+
+Tested on the KZM9D board with GPIO-keys.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 03621b60529edfbeb32d199fa754da19574cfefc)
+(Queued by Linus Walleij for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpio/gpio-em.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
+index 5b518e784824..d3fc54e0578d 100644
+--- a/drivers/gpio/gpio-em.c
++++ b/drivers/gpio/gpio-em.c
+@@ -337,7 +337,7 @@ static int em_gio_probe(struct platform_device *pdev)
+ irq_chip->irq_mask = em_gio_irq_disable;
+ irq_chip->irq_unmask = em_gio_irq_enable;
+ irq_chip->irq_set_type = em_gio_irq_set_type;
+- irq_chip->flags = IRQCHIP_SKIP_SET_WAKE;
++ irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
+
+ p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
+ pdata->number_of_pins,
+--
+1.8.5.rc3
+
--- /dev/null
+From 526e48806d6bac9dd4d85f655f74c6791bc19ffd Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 13:40:31 +0100
+Subject: serial: sh-sci: Fix warnings due to improper casts and printk formats
+
+Use the %zu and %pad printk specifiers to print size_t and dma_addr_t
+variables, and cast pointers to uintptr_t instead of unsigned int where
+applicable. This fixes warnings on platforms where pointers and/or
+dma_addr_t have a different size than int.
+
+Cc: linux-serial@vger.kernel.org
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e2afca6988c335d2ec7b66f2fadcd63286570bf8)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 19 ++++++++++---------
+ 1 file changed, 10 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 9d776066b1f6..c9403229c6f8 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -557,7 +557,7 @@ static inline int sci_rxd_in(struct uart_port *port)
+ return 1;
+
+ /* Cast for ARM damage */
+- return !!__raw_readb((void __iomem *)s->cfg->port_reg);
++ return !!__raw_readb((void __iomem *)(uintptr_t)s->cfg->port_reg);
+ }
+
+ /* ********************************************************************** *
+@@ -1309,7 +1309,7 @@ static int sci_dma_rx_push(struct sci_port *s, size_t count)
+ }
+
+ if (room < count)
+- dev_warn(port->dev, "Rx overrun: dropping %u bytes\n",
++ dev_warn(port->dev, "Rx overrun: dropping %zu bytes\n",
+ count - room);
+ if (!room)
+ return room;
+@@ -1442,7 +1442,7 @@ static void work_fn_rx(struct work_struct *work)
+ int count;
+
+ chan->device->device_control(chan, DMA_TERMINATE_ALL, 0);
+- dev_dbg(port->dev, "Read %u bytes with cookie %d\n",
++ dev_dbg(port->dev, "Read %zu bytes with cookie %d\n",
+ sh_desc->partial, sh_desc->cookie);
+
+ spin_lock_irqsave(&port->lock, flags);
+@@ -1691,16 +1691,17 @@ static void sci_request_dma(struct uart_port *port)
+ s->chan_tx = chan;
+ sg_init_table(&s->sg_tx, 1);
+ /* UART circular tx buffer is an aligned page. */
+- BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
++ BUG_ON((uintptr_t)port->state->xmit.buf & ~PAGE_MASK);
+ sg_set_page(&s->sg_tx, virt_to_page(port->state->xmit.buf),
+- UART_XMIT_SIZE, (int)port->state->xmit.buf & ~PAGE_MASK);
++ UART_XMIT_SIZE,
++ (uintptr_t)port->state->xmit.buf & ~PAGE_MASK);
+ nent = dma_map_sg(port->dev, &s->sg_tx, 1, DMA_TO_DEVICE);
+ if (!nent)
+ sci_tx_dma_release(s, false);
+ else
+- dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
+- sg_dma_len(&s->sg_tx),
+- port->state->xmit.buf, sg_dma_address(&s->sg_tx));
++ dev_dbg(port->dev, "%s: mapped %d@%p to %pad\n", __func__,
++ sg_dma_len(&s->sg_tx), port->state->xmit.buf,
++ &sg_dma_address(&s->sg_tx));
+
+ s->sg_len_tx = nent;
+
+@@ -1740,7 +1741,7 @@ static void sci_request_dma(struct uart_port *port)
+
+ sg_init_table(sg, 1);
+ sg_set_page(sg, virt_to_page(buf[i]), s->buf_len_rx,
+- (int)buf[i] & ~PAGE_MASK);
++ (uintptr_t)buf[i] & ~PAGE_MASK);
+ sg_dma_address(sg) = dma[i];
+ }
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 1e05564f43731443b8da38737172c7f9f44f9ef1 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 28 Nov 2013 18:11:45 +0100
+Subject: serial: sh-sci: Don't enable/disable port from within break timer
+
+The break timer accesses hardware registers and thus requires the port
+to be enabled. It currently ensures this by enabling the port at the
+beginning of the timer handler, and disabling it at the end. However,
+the enable/disable operations call the runtime PM sync functions, which
+are not allowed in atomic context. The current situation is thus broken.
+
+This change relies on non-atomic code to enable/disable the port. The
+break timer will only be started from the IRQ handler, which already
+runs with the port enabled. We just need to ensure that the port won't
+be disabled with the timer running, and that's easily done by just
+cancelling the timer in the port disable function.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit caec70381b469d6ed1bd3d0441a19aa6de0bbff3)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 12 ++++++++----
+ 1 file changed, 8 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index c9403229c6f8..5da765922769 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -431,6 +431,14 @@ static void sci_port_disable(struct sci_port *sci_port)
+ if (!sci_port->port.dev)
+ return;
+
++ /* Cancel the break timer to ensure that the timer handler will not try
++ * to access the hardware with clocks and power disabled. Reset the
++ * break flag to make the break debouncing state machine ready for the
++ * next break.
++ */
++ del_timer_sync(&sci_port->break_timer);
++ sci_port->break_flag = 0;
++
+ clk_disable(sci_port->fclk);
+ clk_disable(sci_port->iclk);
+
+@@ -733,8 +741,6 @@ static void sci_break_timer(unsigned long data)
+ {
+ struct sci_port *port = (struct sci_port *)data;
+
+- sci_port_enable(port);
+-
+ if (sci_rxd_in(&port->port) == 0) {
+ port->break_flag = 1;
+ sci_schedule_break_timer(port);
+@@ -744,8 +750,6 @@ static void sci_break_timer(unsigned long data)
+ sci_schedule_break_timer(port);
+ } else
+ port->break_flag = 0;
+-
+- sci_port_disable(port);
+ }
+
+ static int sci_handle_errors(struct uart_port *port)
+--
+1.8.5.rc3
+
--- /dev/null
+From 9979e8c2d5f004810801996cb05fdebfae6322dd Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 28 Nov 2013 18:11:46 +0100
+Subject: serial: sh-sci: Convert to clk_prepare/unprepare
+
+Turn clk_enable() and clk_disable() calls into clk_prepare_enable() and
+clk_disable_unprepare() to get ready for the migration to the common
+clock framework.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b016b646e8676858f39ea9be760494b04b9ee0af)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 5da765922769..7036ed20700c 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -421,9 +421,9 @@ static void sci_port_enable(struct sci_port *sci_port)
+
+ pm_runtime_get_sync(sci_port->port.dev);
+
+- clk_enable(sci_port->iclk);
++ clk_prepare_enable(sci_port->iclk);
+ sci_port->port.uartclk = clk_get_rate(sci_port->iclk);
+- clk_enable(sci_port->fclk);
++ clk_prepare_enable(sci_port->fclk);
+ }
+
+ static void sci_port_disable(struct sci_port *sci_port)
+@@ -439,8 +439,8 @@ static void sci_port_disable(struct sci_port *sci_port)
+ del_timer_sync(&sci_port->break_timer);
+ sci_port->break_flag = 0;
+
+- clk_disable(sci_port->fclk);
+- clk_disable(sci_port->iclk);
++ clk_disable_unprepare(sci_port->fclk);
++ clk_disable_unprepare(sci_port->iclk);
+
+ pm_runtime_put_sync(sci_port->port.dev);
+ }
+--
+1.8.5.rc3
+
--- /dev/null
+From 8dfa60addb67c80253e2d01449191df75caae62d Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:10 +0100
+Subject: serial: sh-sci: Sort headers alphabetically
+
+This helps locating duplicates.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8fb9631c517b862267590e7af93615a6ef03394d)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 42 +++++++++++++++++++++---------------------
+ 1 file changed, 21 insertions(+), 21 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 7036ed20700c..6e54c440da5e 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -23,35 +23,35 @@
+
+ #undef DEBUG
+
+-#include <linux/module.h>
++#include <linux/clk.h>
++#include <linux/console.h>
++#include <linux/ctype.h>
++#include <linux/cpufreq.h>
++#include <linux/delay.h>
++#include <linux/dmaengine.h>
++#include <linux/dma-mapping.h>
++#include <linux/err.h>
+ #include <linux/errno.h>
+-#include <linux/sh_dma.h>
+-#include <linux/timer.h>
++#include <linux/gpio.h>
++#include <linux/init.h>
+ #include <linux/interrupt.h>
+-#include <linux/tty.h>
+-#include <linux/tty_flip.h>
+-#include <linux/serial.h>
+-#include <linux/major.h>
+-#include <linux/string.h>
+-#include <linux/sysrq.h>
+ #include <linux/ioport.h>
++#include <linux/major.h>
++#include <linux/module.h>
+ #include <linux/mm.h>
+-#include <linux/init.h>
+-#include <linux/delay.h>
+-#include <linux/console.h>
+-#include <linux/platform_device.h>
+-#include <linux/serial_sci.h>
+ #include <linux/notifier.h>
++#include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+-#include <linux/cpufreq.h>
+-#include <linux/clk.h>
+-#include <linux/ctype.h>
+-#include <linux/err.h>
+-#include <linux/dmaengine.h>
+-#include <linux/dma-mapping.h>
+ #include <linux/scatterlist.h>
++#include <linux/serial.h>
++#include <linux/serial_sci.h>
++#include <linux/sh_dma.h>
+ #include <linux/slab.h>
+-#include <linux/gpio.h>
++#include <linux/string.h>
++#include <linux/sysrq.h>
++#include <linux/timer.h>
++#include <linux/tty.h>
++#include <linux/tty_flip.h>
+
+ #ifdef CONFIG_SUPERH
+ #include <asm/sh_bios.h>
+--
+1.8.5.rc3
+
--- /dev/null
+From 3a067cff7d5a858a854df2da304168fb6b4c9284 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:11 +0100
+Subject: serial: sh-sci: Remove baud rate calculation algorithm 5
+
+The algorithm isn't used, remove it.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6db201da2522d7dd231982ff7b83916cf4db3e41)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 2 --
+ include/linux/serial_sci.h | 1 -
+ 2 files changed, 3 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 6e54c440da5e..80a91038c821 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -1825,8 +1825,6 @@ static unsigned int sci_scbrr_calc(unsigned int algo_id, unsigned int bps,
+ return (((freq * 2) + 16 * bps) / (16 * bps) - 1);
+ case SCBRR_ALGO_4:
+ return (((freq * 2) + 16 * bps) / (32 * bps) - 1);
+- case SCBRR_ALGO_5:
+- return (((freq * 1000 / 32) / bps) - 1);
+ }
+
+ /* Warn, but use a safe default */
+diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
+index d34049712a4d..803068d764fb 100644
+--- a/include/linux/serial_sci.h
++++ b/include/linux/serial_sci.h
+@@ -15,7 +15,6 @@ enum {
+ SCBRR_ALGO_2, /* ((clk + 16 * bps) / (32 * bps) - 1) */
+ SCBRR_ALGO_3, /* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */
+ SCBRR_ALGO_4, /* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */
+- SCBRR_ALGO_5, /* (((clk * 1000 / 32) / bps) - 1) */
+ SCBRR_ALGO_6, /* HSCIF variable sample rate algorithm */
+ };
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 09419333d40b298b7d6eeae4f53de1e00900e756 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:12 +0100
+Subject: serial: sh-sci: Simplify baud rate calculation algorithms
+
+Rewrite the baud rate register value calculations in easier to read
+forms. The computed value isn't modified.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6557b1f69ea0961efde7ab33bfe0cb7e3bfed54e)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 8 ++++----
+ include/linux/serial_sci.h | 8 ++++----
+ 2 files changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 80a91038c821..94e878cacd50 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -1818,13 +1818,13 @@ static unsigned int sci_scbrr_calc(unsigned int algo_id, unsigned int bps,
+ {
+ switch (algo_id) {
+ case SCBRR_ALGO_1:
+- return ((freq + 16 * bps) / (16 * bps) - 1);
++ return freq / (16 * bps);
+ case SCBRR_ALGO_2:
+- return ((freq + 16 * bps) / (32 * bps) - 1);
++ return DIV_ROUND_CLOSEST(freq, 32 * bps) - 1;
+ case SCBRR_ALGO_3:
+- return (((freq * 2) + 16 * bps) / (16 * bps) - 1);
++ return freq / (8 * bps);
+ case SCBRR_ALGO_4:
+- return (((freq * 2) + 16 * bps) / (32 * bps) - 1);
++ return DIV_ROUND_CLOSEST(freq, 16 * bps) - 1;
+ }
+
+ /* Warn, but use a safe default */
+diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
+index 803068d764fb..eb787d40df02 100644
+--- a/include/linux/serial_sci.h
++++ b/include/linux/serial_sci.h
+@@ -11,10 +11,10 @@
+ #define SCIx_NOT_SUPPORTED (-1)
+
+ enum {
+- SCBRR_ALGO_1, /* ((clk + 16 * bps) / (16 * bps) - 1) */
+- SCBRR_ALGO_2, /* ((clk + 16 * bps) / (32 * bps) - 1) */
+- SCBRR_ALGO_3, /* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */
+- SCBRR_ALGO_4, /* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */
++ SCBRR_ALGO_1, /* clk / (16 * bps) */
++ SCBRR_ALGO_2, /* DIV_ROUND_CLOSEST(clk, 32 * bps) - 1 */
++ SCBRR_ALGO_3, /* clk / (8 * bps) */
++ SCBRR_ALGO_4, /* DIV_ROUND_CLOSEST(clk, 16 * bps) - 1 */
+ SCBRR_ALGO_6, /* HSCIF variable sample rate algorithm */
+ };
+
+--
+1.8.5.rc3
+
--- /dev/null
+From da08965ac0fcfbb4ceb88a92cd2adabe831bffc0 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:13 +0100
+Subject: serial: sh-sci: Remove duplicate interrupt check in verify port op
+
+The driver checks if the interrupt number is greater than nr_irqs and
+returns an error in that case. The same check is already performed by
+the caller, remove it.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b5e17b71c6b2ff284b4018e272e18876ccfa9b2c)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 94e878cacd50..fa3a9422b8c7 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -2120,7 +2120,7 @@ static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
+ {
+ struct sci_port *s = to_sci_port(port);
+
+- if (ser->irq != s->cfg->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs)
++ if (ser->irq != s->cfg->irqs[SCIx_TXI_IRQ])
+ return -EINVAL;
+ if (ser->baud_base < 2400)
+ /* No paper tape reader for Mitch.. */
+--
+1.8.5.rc3
+
--- /dev/null
+From 1e79414dfbade2f40ce2b9b81656ab3946c0cb2c Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:14 +0100
+Subject: serial: sh-sci: Set the UPF_FIXED_PORT flag
+
+The base address, IRQ and baud rate generator parent clock rate can't be
+changed by userspace. Mark the port as fixed.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b6e4a3f18c0d289c7eed652dc0253a7f8fea27e4)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index fa3a9422b8c7..da91d6f1091d 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -2248,7 +2248,7 @@ static int sci_init_single(struct platform_device *dev,
+
+ port->mapbase = p->mapbase;
+ port->type = p->type;
+- port->flags = p->flags;
++ port->flags = UPF_FIXED_PORT | p->flags;
+ port->regshift = p->regshift;
+
+ /*
+--
+1.8.5.rc3
+
--- /dev/null
+From 21133fc7b65edc6f0feab77585c243d079996fff Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:15 +0100
+Subject: serial: sh-sci: Don't check IRQ in verify port operation
+
+The IRQ number can't be modified by the user as the port is fixed.
+There's no need to check the new IRQ number as it will be ignored by the
+core.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bc14e00672b563f41a1ac1d421b5c78c94868983)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index da91d6f1091d..670a8a43c21a 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -2118,10 +2118,6 @@ static void sci_config_port(struct uart_port *port, int flags)
+
+ static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
+ {
+- struct sci_port *s = to_sci_port(port);
+-
+- if (ser->irq != s->cfg->irqs[SCIx_TXI_IRQ])
+- return -EINVAL;
+ if (ser->baud_base < 2400)
+ /* No paper tape reader for Mitch.. */
+ return -EINVAL;
+--
+1.8.5.rc3
+
--- /dev/null
+From 82f3ae665295959fbc56ce7f5ed8fe848a57683a Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:16 +0100
+Subject: serial: sh-sci: Support resources passed through platform resources
+
+Memory and IRQ resources are currently passed to the driver through
+platform data. Support passing them through the standard platform
+resources mechanism instead. This deprecates platform data resources.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1fcc91a607de0bf72d3a6073dfe459f7e9145ac5)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 65 ++++++++++++++++++++++++++++++++++-----------
+ include/linux/serial_sci.h | 8 +++---
+ 2 files changed, 53 insertions(+), 20 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 670a8a43c21a..613248ccea1b 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -74,6 +74,7 @@ struct sci_port {
+ /* Function clock */
+ struct clk *fclk;
+
++ int irqs[SCIx_NR_IRQS];
+ char *irqstr[SCIx_NR_IRQS];
+ char *gpiostr[SCIx_NR_FNS];
+
+@@ -1079,19 +1080,19 @@ static int sci_request_irq(struct sci_port *port)
+
+ for (i = j = 0; i < SCIx_NR_IRQS; i++, j++) {
+ struct sci_irq_desc *desc;
+- unsigned int irq;
++ int irq;
+
+ if (SCIx_IRQ_IS_MUXED(port)) {
+ i = SCIx_MUX_IRQ;
+ irq = up->irq;
+ } else {
+- irq = port->cfg->irqs[i];
++ irq = port->irqs[i];
+
+ /*
+ * Certain port types won't support all of the
+ * available interrupt sources.
+ */
+- if (unlikely(!irq))
++ if (unlikely(irq < 0))
+ continue;
+ }
+
+@@ -1116,7 +1117,7 @@ static int sci_request_irq(struct sci_port *port)
+
+ out_noirq:
+ while (--i >= 0)
+- free_irq(port->cfg->irqs[i], port);
++ free_irq(port->irqs[i], port);
+
+ out_nomem:
+ while (--j >= 0)
+@@ -1134,16 +1135,16 @@ static void sci_free_irq(struct sci_port *port)
+ * IRQ first.
+ */
+ for (i = 0; i < SCIx_NR_IRQS; i++) {
+- unsigned int irq = port->cfg->irqs[i];
++ int irq = port->irqs[i];
+
+ /*
+ * Certain port types won't support all of the available
+ * interrupt sources.
+ */
+- if (unlikely(!irq))
++ if (unlikely(irq < 0))
+ continue;
+
+- free_irq(port->cfg->irqs[i], port);
++ free_irq(port->irqs[i], port);
+ kfree(port->irqstr[i]);
+
+ if (SCIx_IRQ_IS_MUXED(port)) {
+@@ -1659,7 +1660,7 @@ static void rx_timer_fn(unsigned long arg)
+
+ if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
+ scr &= ~0x4000;
+- enable_irq(s->cfg->irqs[1]);
++ enable_irq(s->irqs[SCIx_RXI_IRQ]);
+ }
+ serial_port_out(port, SCSCR, scr | SCSCR_RIE);
+ dev_dbg(port->dev, "DMA Rx timed out\n");
+@@ -2150,11 +2151,12 @@ static struct uart_ops sci_uart_ops = {
+ };
+
+ static int sci_init_single(struct platform_device *dev,
+- struct sci_port *sci_port,
+- unsigned int index,
+- struct plat_sci_port *p)
++ struct sci_port *sci_port, unsigned int index,
++ struct plat_sci_port *p, bool early)
+ {
+ struct uart_port *port = &sci_port->port;
++ const struct resource *res;
++ unsigned int i;
+ int ret;
+
+ sci_port->cfg = p;
+@@ -2163,6 +2165,38 @@ static int sci_init_single(struct platform_device *dev,
+ port->iotype = UPIO_MEM;
+ port->line = index;
+
++ if (dev->num_resources) {
++ /* Device has resources, use them. */
++ res = platform_get_resource(dev, IORESOURCE_MEM, 0);
++ if (res == NULL)
++ return -ENOMEM;
++
++ port->mapbase = res->start;
++
++ for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
++ sci_port->irqs[i] = platform_get_irq(dev, i);
++
++ /* The SCI generates several interrupts. They can be muxed
++ * together or connected to different interrupt lines. In the
++ * muxed case only one interrupt resource is specified. In the
++ * non-muxed case three or four interrupt resources are
++ * specified, as the BRI interrupt is optional.
++ */
++ if (sci_port->irqs[0] < 0)
++ return -ENXIO;
++
++ if (sci_port->irqs[1] < 0) {
++ sci_port->irqs[1] = sci_port->irqs[0];
++ sci_port->irqs[2] = sci_port->irqs[0];
++ sci_port->irqs[3] = sci_port->irqs[0];
++ }
++ } else {
++ /* No resources, use old-style platform data. */
++ port->mapbase = p->mapbase;
++ for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
++ sci_port->irqs[i] = p->irqs[i] ? p->irqs[i] : -ENXIO;
++ }
++
+ switch (p->type) {
+ case PORT_SCIFB:
+ port->fifosize = 256;
+@@ -2187,7 +2221,7 @@ static int sci_init_single(struct platform_device *dev,
+ return ret;
+ }
+
+- if (dev) {
++ if (!early) {
+ sci_port->iclk = clk_get(&dev->dev, "sci_ick");
+ if (IS_ERR(sci_port->iclk)) {
+ sci_port->iclk = clk_get(&dev->dev, "peripheral_clk");
+@@ -2242,7 +2276,6 @@ static int sci_init_single(struct platform_device *dev,
+ p->error_mask |= (1 << p->overrun_bit);
+ }
+
+- port->mapbase = p->mapbase;
+ port->type = p->type;
+ port->flags = UPF_FIXED_PORT | p->flags;
+ port->regshift = p->regshift;
+@@ -2254,7 +2287,7 @@ static int sci_init_single(struct platform_device *dev,
+ *
+ * For the muxed case there's nothing more to do.
+ */
+- port->irq = p->irqs[SCIx_RXI_IRQ];
++ port->irq = sci_port->irqs[SCIx_RXI_IRQ];
+ port->irqflags = 0;
+
+ port->serial_in = sci_serial_in;
+@@ -2386,7 +2419,7 @@ static int sci_probe_earlyprintk(struct platform_device *pdev)
+
+ early_serial_console.index = pdev->id;
+
+- sci_init_single(NULL, &sci_ports[pdev->id], pdev->id, cfg);
++ sci_init_single(pdev, &sci_ports[pdev->id], pdev->id, cfg, true);
+
+ serial_console_setup(&early_serial_console, early_serial_buf);
+
+@@ -2453,7 +2486,7 @@ static int sci_probe_single(struct platform_device *dev,
+ return -EINVAL;
+ }
+
+- ret = sci_init_single(dev, sciport, index, p);
++ ret = sci_init_single(dev, sciport, index, p, false);
+ if (ret)
+ return ret;
+
+diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
+index eb787d40df02..68cf0bfdf108 100644
+--- a/include/linux/serial_sci.h
++++ b/include/linux/serial_sci.h
+@@ -107,10 +107,10 @@ enum {
+ }
+
+ #define SCIx_IRQ_IS_MUXED(port) \
+- ((port)->cfg->irqs[SCIx_ERI_IRQ] == \
+- (port)->cfg->irqs[SCIx_RXI_IRQ]) || \
+- ((port)->cfg->irqs[SCIx_ERI_IRQ] && \
+- !(port)->cfg->irqs[SCIx_RXI_IRQ])
++ ((port)->irqs[SCIx_ERI_IRQ] == \
++ (port)->irqs[SCIx_RXI_IRQ]) || \
++ ((port)->irqs[SCIx_ERI_IRQ] && \
++ ((port)->irqs[SCIx_RXI_IRQ] < 0))
+ /*
+ * SCI register subset common for all port types.
+ * Not all registers will exist on all parts.
+--
+1.8.5.rc3
+
--- /dev/null
+From 2a6f2ce45c6005e8971a4006a83ce419eab94c5b Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:17 +0100
+Subject: serial: sh-sci: Move overrun_bit and error_mask fields out of pdata
+
+None of the fields is ever set by board code, and both of them are set
+in the driver at probe time. Move them out of struct plat_sci_port to
+struct sci_port.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3ae988d97b160c07463b980ccf26ed9226660fef)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 50 +++++++++++++++++++++------------------------
+ drivers/tty/serial/sh-sci.h | 2 +-
+ include/linux/serial_sci.h | 3 ---
+ 3 files changed, 24 insertions(+), 31 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 613248ccea1b..d1c444afc405 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -64,6 +64,9 @@ struct sci_port {
+
+ /* Platform configuration */
+ struct plat_sci_port *cfg;
++ int overrun_bit;
++ unsigned int error_mask;
++
+
+ /* Break timer */
+ struct timer_list break_timer;
+@@ -760,19 +763,15 @@ static int sci_handle_errors(struct uart_port *port)
+ struct tty_port *tport = &port->state->port;
+ struct sci_port *s = to_sci_port(port);
+
+- /*
+- * Handle overruns, if supported.
+- */
+- if (s->cfg->overrun_bit != SCIx_NOT_SUPPORTED) {
+- if (status & (1 << s->cfg->overrun_bit)) {
+- port->icount.overrun++;
++ /* Handle overruns */
++ if (status & (1 << s->overrun_bit)) {
++ port->icount.overrun++;
+
+- /* overrun error */
+- if (tty_insert_flip_char(tport, 0, TTY_OVERRUN))
+- copied++;
++ /* overrun error */
++ if (tty_insert_flip_char(tport, 0, TTY_OVERRUN))
++ copied++;
+
+- dev_notice(port->dev, "overrun error");
+- }
++ dev_notice(port->dev, "overrun error");
+ }
+
+ if (status & SCxSR_FER(port)) {
+@@ -834,7 +833,7 @@ static int sci_handle_fifo_overrun(struct uart_port *port)
+ if (!reg->size)
+ return 0;
+
+- if ((serial_port_in(port, SCLSR) & (1 << s->cfg->overrun_bit))) {
++ if ((serial_port_in(port, SCLSR) & (1 << s->overrun_bit))) {
+ serial_port_out(port, SCLSR, 0);
+
+ port->icount.overrun++;
+@@ -2253,28 +2252,25 @@ static int sci_init_single(struct platform_device *dev,
+ /*
+ * Establish some sensible defaults for the error detection.
+ */
+- if (!p->error_mask)
+- p->error_mask = (p->type == PORT_SCI) ?
++ sci_port->error_mask = (p->type == PORT_SCI) ?
+ SCI_DEFAULT_ERROR_MASK : SCIF_DEFAULT_ERROR_MASK;
+
+ /*
+ * Establish sensible defaults for the overrun detection, unless
+ * the part has explicitly disabled support for it.
+ */
+- if (p->overrun_bit != SCIx_NOT_SUPPORTED) {
+- if (p->type == PORT_SCI)
+- p->overrun_bit = 5;
+- else if (p->scbrr_algo_id == SCBRR_ALGO_4)
+- p->overrun_bit = 9;
+- else
+- p->overrun_bit = 0;
++ if (p->type == PORT_SCI)
++ sci_port->overrun_bit = 5;
++ else if (p->scbrr_algo_id == SCBRR_ALGO_4)
++ sci_port->overrun_bit = 9;
++ else
++ sci_port->overrun_bit = 0;
+
+- /*
+- * Make the error mask inclusive of overrun detection, if
+- * supported.
+- */
+- p->error_mask |= (1 << p->overrun_bit);
+- }
++ /*
++ * Make the error mask inclusive of overrun detection, if
++ * supported.
++ */
++ sci_port->error_mask |= 1 << sci_port->overrun_bit;
+
+ port->type = p->type;
+ port->flags = UPF_FIXED_PORT | p->flags;
+diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h
+index 5aca7364634c..d5db81a0a430 100644
+--- a/drivers/tty/serial/sh-sci.h
++++ b/drivers/tty/serial/sh-sci.h
+@@ -9,7 +9,7 @@
+ #define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER)
+ #define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK)
+
+-#define SCxSR_ERRORS(port) (to_sci_port(port)->cfg->error_mask)
++#define SCxSR_ERRORS(port) (to_sci_port(port)->error_mask)
+
+ #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7720) || \
+diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
+index 68cf0bfdf108..c1770a6966c1 100644
+--- a/include/linux/serial_sci.h
++++ b/include/linux/serial_sci.h
+@@ -152,9 +152,6 @@ struct plat_sci_port {
+ /*
+ * Platform overrides if necessary, defaults otherwise.
+ */
+- int overrun_bit;
+- unsigned int error_mask;
+-
+ int port_reg;
+ unsigned char regshift;
+ unsigned char regtype;
+--
+1.8.5.rc3
+
--- /dev/null
+From 45e3730a5d85f60e96df1ca7d07dc63b3ff8067f Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:18 +0100
+Subject: serial: sh-sci: Remove unused GPIO request code
+
+The driver requests at initialization time GPIOs passed through platform
+data. No platform makes use of this feature, remove it.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 520402bbc6fe328ae28e08bfc87a2b1eb7f10b2c)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 67 ---------------------------------------------
+ include/linux/serial_sci.h | 12 --------
+ 2 files changed, 79 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index d1c444afc405..ce9f02506b3c 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -32,7 +32,6 @@
+ #include <linux/dma-mapping.h>
+ #include <linux/err.h>
+ #include <linux/errno.h>
+-#include <linux/gpio.h>
+ #include <linux/init.h>
+ #include <linux/interrupt.h>
+ #include <linux/ioport.h>
+@@ -79,7 +78,6 @@ struct sci_port {
+
+ int irqs[SCIx_NR_IRQS];
+ char *irqstr[SCIx_NR_IRQS];
+- char *gpiostr[SCIx_NR_FNS];
+
+ struct dma_chan *chan_tx;
+ struct dma_chan *chan_rx;
+@@ -1153,67 +1151,6 @@ static void sci_free_irq(struct sci_port *port)
+ }
+ }
+
+-static const char *sci_gpio_names[SCIx_NR_FNS] = {
+- "sck", "rxd", "txd", "cts", "rts",
+-};
+-
+-static const char *sci_gpio_str(unsigned int index)
+-{
+- return sci_gpio_names[index];
+-}
+-
+-static void sci_init_gpios(struct sci_port *port)
+-{
+- struct uart_port *up = &port->port;
+- int i;
+-
+- if (!port->cfg)
+- return;
+-
+- for (i = 0; i < SCIx_NR_FNS; i++) {
+- const char *desc;
+- int ret;
+-
+- if (!port->cfg->gpios[i])
+- continue;
+-
+- desc = sci_gpio_str(i);
+-
+- port->gpiostr[i] = kasprintf(GFP_KERNEL, "%s:%s",
+- dev_name(up->dev), desc);
+-
+- /*
+- * If we've failed the allocation, we can still continue
+- * on with a NULL string.
+- */
+- if (!port->gpiostr[i])
+- dev_notice(up->dev, "%s string allocation failure\n",
+- desc);
+-
+- ret = gpio_request(port->cfg->gpios[i], port->gpiostr[i]);
+- if (unlikely(ret != 0)) {
+- dev_notice(up->dev, "failed %s gpio request\n", desc);
+-
+- /*
+- * If we can't get the GPIO for whatever reason,
+- * no point in keeping the verbose string around.
+- */
+- kfree(port->gpiostr[i]);
+- }
+- }
+-}
+-
+-static void sci_free_gpios(struct sci_port *port)
+-{
+- int i;
+-
+- for (i = 0; i < SCIx_NR_FNS; i++)
+- if (port->cfg->gpios[i]) {
+- gpio_free(port->cfg->gpios[i]);
+- kfree(port->gpiostr[i]);
+- }
+-}
+-
+ static unsigned int sci_tx_empty(struct uart_port *port)
+ {
+ unsigned short status = serial_port_in(port, SCxSR);
+@@ -2240,8 +2177,6 @@ static int sci_init_single(struct platform_device *dev,
+
+ port->dev = &dev->dev;
+
+- sci_init_gpios(sci_port);
+-
+ pm_runtime_enable(&dev->dev);
+ }
+
+@@ -2298,8 +2233,6 @@ static int sci_init_single(struct platform_device *dev,
+
+ static void sci_cleanup_single(struct sci_port *port)
+ {
+- sci_free_gpios(port);
+-
+ clk_put(port->iclk);
+ clk_put(port->fclk);
+
+diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
+index c1770a6966c1..efd4727ccd67 100644
+--- a/include/linux/serial_sci.h
++++ b/include/linux/serial_sci.h
+@@ -69,17 +69,6 @@ enum {
+ SCIx_MUX_IRQ = SCIx_NR_IRQS, /* special case */
+ };
+
+-/* Offsets into the sci_port->gpios array */
+-enum {
+- SCIx_SCK,
+- SCIx_RXD,
+- SCIx_TXD,
+- SCIx_CTS,
+- SCIx_RTS,
+-
+- SCIx_NR_FNS,
+-};
+-
+ enum {
+ SCIx_PROBE_REGTYPE,
+
+@@ -141,7 +130,6 @@ struct plat_sci_port_ops {
+ struct plat_sci_port {
+ unsigned long mapbase; /* resource base */
+ unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */
+- unsigned int gpios[SCIx_NR_FNS]; /* SCK, RXD, TXD, CTS, RTS */
+ unsigned int type; /* SCI / SCIF / IRDA / HSCIF */
+ upf_t flags; /* UPF_* flags */
+ unsigned long capabilities; /* Port features/capabilities */
+--
+1.8.5.rc3
+
--- /dev/null
+From 828f09152698abbcd900c06a42977eec4be4cbd9 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:19 +0100
+Subject: serial: sh-sci: Compute overrun_bit without using baud rate algo
+
+The overrun bit index is a property of the hardware. It's currently
+computed based on a different and unrelated hardware property, the baud
+rate calculation algorithm. Compute it using hardware identification
+information only.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b545e4f40613be708ad660517f10c87423a09e8d)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 26 ++++++++++++++------------
+ 1 file changed, 14 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index ce9f02506b3c..e643df18f48b 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -2133,30 +2133,38 @@ static int sci_init_single(struct platform_device *dev,
+ sci_port->irqs[i] = p->irqs[i] ? p->irqs[i] : -ENXIO;
+ }
+
++ if (p->regtype == SCIx_PROBE_REGTYPE) {
++ ret = sci_probe_regmap(p);
++ if (unlikely(ret))
++ return ret;
++ }
++
+ switch (p->type) {
+ case PORT_SCIFB:
+ port->fifosize = 256;
++ sci_port->overrun_bit = 9;
+ break;
+ case PORT_HSCIF:
+ port->fifosize = 128;
++ sci_port->overrun_bit = 0;
+ break;
+ case PORT_SCIFA:
+ port->fifosize = 64;
++ sci_port->overrun_bit = 9;
+ break;
+ case PORT_SCIF:
+ port->fifosize = 16;
++ if (p->regtype == SCIx_SH7705_SCIF_REGTYPE)
++ sci_port->overrun_bit = 9;
++ else
++ sci_port->overrun_bit = 0;
+ break;
+ default:
+ port->fifosize = 1;
++ sci_port->overrun_bit = 5;
+ break;
+ }
+
+- if (p->regtype == SCIx_PROBE_REGTYPE) {
+- ret = sci_probe_regmap(p);
+- if (unlikely(ret))
+- return ret;
+- }
+-
+ if (!early) {
+ sci_port->iclk = clk_get(&dev->dev, "sci_ick");
+ if (IS_ERR(sci_port->iclk)) {
+@@ -2194,12 +2202,6 @@ static int sci_init_single(struct platform_device *dev,
+ * Establish sensible defaults for the overrun detection, unless
+ * the part has explicitly disabled support for it.
+ */
+- if (p->type == PORT_SCI)
+- sci_port->overrun_bit = 5;
+- else if (p->scbrr_algo_id == SCBRR_ALGO_4)
+- sci_port->overrun_bit = 9;
+- else
+- sci_port->overrun_bit = 0;
+
+ /*
+ * Make the error mask inclusive of overrun detection, if
+--
+1.8.5.rc3
+
--- /dev/null
+From e4a9d61407a3f578ab35a3f67f745d99c5ee06c3 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:20 +0100
+Subject: serial: sh-sci: Rework baud rate calculation
+
+Computing the baud rate register value requires knowledge of the
+hardware sampling rate. This information is currently encoded in a baud
+rate calculation algorithm ID passed through platform data. However, it
+can be derived from the port type directly in most cases.
+
+Compute the sampling rate internally in the driver if the baud rate
+calculation algorithm ID isn't specified, and allow platforms to
+override the sampling rate through platform data in special cases (this
+is only required for SCIFA ports on sh7723 and sh7724, the reason needs
+to be investigated).
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ec09c5eb491834d4011c72538e58d8b7096076bd)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 37 ++++++++++++++++++++++++++++++-------
+ include/linux/serial_sci.h | 2 ++
+ 2 files changed, 32 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index e643df18f48b..35e3225714bc 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -65,6 +65,7 @@ struct sci_port {
+ struct plat_sci_port *cfg;
+ int overrun_bit;
+ unsigned int error_mask;
++ unsigned int sampling_rate;
+
+
+ /* Break timer */
+@@ -1750,10 +1751,13 @@ static void sci_shutdown(struct uart_port *port)
+ sci_free_irq(s);
+ }
+
+-static unsigned int sci_scbrr_calc(unsigned int algo_id, unsigned int bps,
++static unsigned int sci_scbrr_calc(struct sci_port *s, unsigned int bps,
+ unsigned long freq)
+ {
+- switch (algo_id) {
++ if (s->sampling_rate)
++ return DIV_ROUND_CLOSEST(freq, s->sampling_rate * bps) - 1;
++
++ switch (s->cfg->scbrr_algo_id) {
+ case SCBRR_ALGO_1:
+ return freq / (16 * bps);
+ case SCBRR_ALGO_2:
+@@ -1843,12 +1847,11 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
+
+ baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
+ if (likely(baud && port->uartclk)) {
+- if (s->cfg->scbrr_algo_id == SCBRR_ALGO_6) {
++ if (s->cfg->type == PORT_HSCIF) {
+ sci_baud_calc_hscif(baud, port->uartclk, &t, &srr,
+ &cks);
+ } else {
+- t = sci_scbrr_calc(s->cfg->scbrr_algo_id, baud,
+- port->uartclk);
++ t = sci_scbrr_calc(s, baud, port->uartclk);
+ for (cks = 0; t >= 256 && cks <= 3; cks++)
+ t >>= 2;
+ }
+@@ -2092,6 +2095,7 @@ static int sci_init_single(struct platform_device *dev,
+ {
+ struct uart_port *port = &sci_port->port;
+ const struct resource *res;
++ unsigned int sampling_rate;
+ unsigned int i;
+ int ret;
+
+@@ -2143,28 +2147,47 @@ static int sci_init_single(struct platform_device *dev,
+ case PORT_SCIFB:
+ port->fifosize = 256;
+ sci_port->overrun_bit = 9;
++ sampling_rate = 16;
+ break;
+ case PORT_HSCIF:
+ port->fifosize = 128;
++ sampling_rate = 0;
+ sci_port->overrun_bit = 0;
+ break;
+ case PORT_SCIFA:
+ port->fifosize = 64;
+ sci_port->overrun_bit = 9;
++ sampling_rate = 16;
+ break;
+ case PORT_SCIF:
+ port->fifosize = 16;
+- if (p->regtype == SCIx_SH7705_SCIF_REGTYPE)
++ if (p->regtype == SCIx_SH7705_SCIF_REGTYPE) {
+ sci_port->overrun_bit = 9;
+- else
++ sampling_rate = 16;
++ } else {
+ sci_port->overrun_bit = 0;
++ sampling_rate = 32;
++ }
+ break;
+ default:
+ port->fifosize = 1;
+ sci_port->overrun_bit = 5;
++ sampling_rate = 32;
+ break;
+ }
+
++ /* Set the sampling rate if the baud rate calculation algorithm isn't
++ * specified.
++ */
++ if (p->scbrr_algo_id == SCBRR_ALGO_NONE) {
++ /* SCIFA on sh7723 and sh7724 need a custom sampling rate that
++ * doesn't match the SoC datasheet, this should be investigated.
++ * Let platform data override the sampling rate for now.
++ */
++ sci_port->sampling_rate = p->sampling_rate ? p->sampling_rate
++ : sampling_rate;
++ }
++
+ if (!early) {
+ sci_port->iclk = clk_get(&dev->dev, "sci_ick");
+ if (IS_ERR(sci_port->iclk)) {
+diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
+index efd4727ccd67..0bac5628e650 100644
+--- a/include/linux/serial_sci.h
++++ b/include/linux/serial_sci.h
+@@ -11,6 +11,7 @@
+ #define SCIx_NOT_SUPPORTED (-1)
+
+ enum {
++ SCBRR_ALGO_NONE, /* Compute sampling rate in the driver */
+ SCBRR_ALGO_1, /* clk / (16 * bps) */
+ SCBRR_ALGO_2, /* DIV_ROUND_CLOSEST(clk, 32 * bps) - 1 */
+ SCBRR_ALGO_3, /* clk / (8 * bps) */
+@@ -134,6 +135,7 @@ struct plat_sci_port {
+ upf_t flags; /* UPF_* flags */
+ unsigned long capabilities; /* Port features/capabilities */
+
++ unsigned int sampling_rate;
+ unsigned int scbrr_algo_id; /* SCBRR calculation algo */
+ unsigned int scscr; /* SCSCR initialization */
+
+--
+1.8.5.rc3
+
--- /dev/null
+From ea3cd86985c620f8730f48d547c4a96ec81e4dfb Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:51 +0100
+Subject: serial: sh-sci: Remove platform data scbrr_algo_id field
+
+The field isn't set by any board, remote it.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 878fbb91399df0d37e0183890b0ad6aeb63590fe)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 26 +++++---------------------
+ include/linux/serial_sci.h | 10 ----------
+ 2 files changed, 5 insertions(+), 31 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 35e3225714bc..abbecfe72dc2 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -1757,17 +1757,6 @@ static unsigned int sci_scbrr_calc(struct sci_port *s, unsigned int bps,
+ if (s->sampling_rate)
+ return DIV_ROUND_CLOSEST(freq, s->sampling_rate * bps) - 1;
+
+- switch (s->cfg->scbrr_algo_id) {
+- case SCBRR_ALGO_1:
+- return freq / (16 * bps);
+- case SCBRR_ALGO_2:
+- return DIV_ROUND_CLOSEST(freq, 32 * bps) - 1;
+- case SCBRR_ALGO_3:
+- return freq / (8 * bps);
+- case SCBRR_ALGO_4:
+- return DIV_ROUND_CLOSEST(freq, 16 * bps) - 1;
+- }
+-
+ /* Warn, but use a safe default */
+ WARN_ON(1);
+
+@@ -2176,17 +2165,12 @@ static int sci_init_single(struct platform_device *dev,
+ break;
+ }
+
+- /* Set the sampling rate if the baud rate calculation algorithm isn't
+- * specified.
++ /* SCIFA on sh7723 and sh7724 need a custom sampling rate that doesn't
++ * match the SoC datasheet, this should be investigated. Let platform
++ * data override the sampling rate for now.
+ */
+- if (p->scbrr_algo_id == SCBRR_ALGO_NONE) {
+- /* SCIFA on sh7723 and sh7724 need a custom sampling rate that
+- * doesn't match the SoC datasheet, this should be investigated.
+- * Let platform data override the sampling rate for now.
+- */
+- sci_port->sampling_rate = p->sampling_rate ? p->sampling_rate
+- : sampling_rate;
+- }
++ sci_port->sampling_rate = p->sampling_rate ? p->sampling_rate
++ : sampling_rate;
+
+ if (!early) {
+ sci_port->iclk = clk_get(&dev->dev, "sci_ick");
+diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
+index 0bac5628e650..5baf4fabdf99 100644
+--- a/include/linux/serial_sci.h
++++ b/include/linux/serial_sci.h
+@@ -10,15 +10,6 @@
+
+ #define SCIx_NOT_SUPPORTED (-1)
+
+-enum {
+- SCBRR_ALGO_NONE, /* Compute sampling rate in the driver */
+- SCBRR_ALGO_1, /* clk / (16 * bps) */
+- SCBRR_ALGO_2, /* DIV_ROUND_CLOSEST(clk, 32 * bps) - 1 */
+- SCBRR_ALGO_3, /* clk / (8 * bps) */
+- SCBRR_ALGO_4, /* DIV_ROUND_CLOSEST(clk, 16 * bps) - 1 */
+- SCBRR_ALGO_6, /* HSCIF variable sample rate algorithm */
+-};
+-
+ #define SCSCR_TIE (1 << 7)
+ #define SCSCR_RIE (1 << 6)
+ #define SCSCR_TE (1 << 5)
+@@ -136,7 +127,6 @@ struct plat_sci_port {
+ unsigned long capabilities; /* Port features/capabilities */
+
+ unsigned int sampling_rate;
+- unsigned int scbrr_algo_id; /* SCBRR calculation algo */
+ unsigned int scscr; /* SCSCR initialization */
+
+ /*
+--
+1.8.5.rc3
+
--- /dev/null
+From eb41cd42279e452f7347db23c4d8a8c5bb945c24 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:52 +0100
+Subject: serial: sh-sci: Remove platform data mapbase and irqs fields
+
+The fields are not used anymore by board files, remove them.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 89b5c1ab94a1cea921d8a280de0a483d71af5091)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 60 +++++++++++++++++++++++++--------------------
+ include/linux/serial_sci.h | 26 --------------------
+ 2 files changed, 34 insertions(+), 52 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index abbecfe72dc2..795f2a284a24 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -58,6 +58,23 @@
+
+ #include "sh-sci.h"
+
++/* Offsets into the sci_port->irqs array */
++enum {
++ SCIx_ERI_IRQ,
++ SCIx_RXI_IRQ,
++ SCIx_TXI_IRQ,
++ SCIx_BRI_IRQ,
++ SCIx_NR_IRQS,
++
++ SCIx_MUX_IRQ = SCIx_NR_IRQS, /* special case */
++};
++
++#define SCIx_IRQ_IS_MUXED(port) \
++ ((port)->irqs[SCIx_ERI_IRQ] == \
++ (port)->irqs[SCIx_RXI_IRQ]) || \
++ ((port)->irqs[SCIx_ERI_IRQ] && \
++ ((port)->irqs[SCIx_RXI_IRQ] < 0))
++
+ struct sci_port {
+ struct uart_port port;
+
+@@ -2094,36 +2111,27 @@ static int sci_init_single(struct platform_device *dev,
+ port->iotype = UPIO_MEM;
+ port->line = index;
+
+- if (dev->num_resources) {
+- /* Device has resources, use them. */
+- res = platform_get_resource(dev, IORESOURCE_MEM, 0);
+- if (res == NULL)
+- return -ENOMEM;
++ res = platform_get_resource(dev, IORESOURCE_MEM, 0);
++ if (res == NULL)
++ return -ENOMEM;
+
+- port->mapbase = res->start;
++ port->mapbase = res->start;
+
+- for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
+- sci_port->irqs[i] = platform_get_irq(dev, i);
++ for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
++ sci_port->irqs[i] = platform_get_irq(dev, i);
+
+- /* The SCI generates several interrupts. They can be muxed
+- * together or connected to different interrupt lines. In the
+- * muxed case only one interrupt resource is specified. In the
+- * non-muxed case three or four interrupt resources are
+- * specified, as the BRI interrupt is optional.
+- */
+- if (sci_port->irqs[0] < 0)
+- return -ENXIO;
++ /* The SCI generates several interrupts. They can be muxed together or
++ * connected to different interrupt lines. In the muxed case only one
++ * interrupt resource is specified. In the non-muxed case three or four
++ * interrupt resources are specified, as the BRI interrupt is optional.
++ */
++ if (sci_port->irqs[0] < 0)
++ return -ENXIO;
+
+- if (sci_port->irqs[1] < 0) {
+- sci_port->irqs[1] = sci_port->irqs[0];
+- sci_port->irqs[2] = sci_port->irqs[0];
+- sci_port->irqs[3] = sci_port->irqs[0];
+- }
+- } else {
+- /* No resources, use old-style platform data. */
+- port->mapbase = p->mapbase;
+- for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
+- sci_port->irqs[i] = p->irqs[i] ? p->irqs[i] : -ENXIO;
++ if (sci_port->irqs[1] < 0) {
++ sci_port->irqs[1] = sci_port->irqs[0];
++ sci_port->irqs[2] = sci_port->irqs[0];
++ sci_port->irqs[3] = sci_port->irqs[0];
+ }
+
+ if (p->regtype == SCIx_PROBE_REGTYPE) {
+diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
+index 5baf4fabdf99..dcd0a2a59c12 100644
+--- a/include/linux/serial_sci.h
++++ b/include/linux/serial_sci.h
+@@ -50,17 +50,6 @@
+ /* HSSRR HSCIF */
+ #define HSCIF_SRE 0x8000
+
+-/* Offsets into the sci_port->irqs array */
+-enum {
+- SCIx_ERI_IRQ,
+- SCIx_RXI_IRQ,
+- SCIx_TXI_IRQ,
+- SCIx_BRI_IRQ,
+- SCIx_NR_IRQS,
+-
+- SCIx_MUX_IRQ = SCIx_NR_IRQS, /* special case */
+-};
+-
+ enum {
+ SCIx_PROBE_REGTYPE,
+
+@@ -79,19 +68,6 @@ enum {
+ SCIx_NR_REGTYPES,
+ };
+
+-#define SCIx_IRQ_MUXED(irq) \
+-{ \
+- [SCIx_ERI_IRQ] = (irq), \
+- [SCIx_RXI_IRQ] = (irq), \
+- [SCIx_TXI_IRQ] = (irq), \
+- [SCIx_BRI_IRQ] = (irq), \
+-}
+-
+-#define SCIx_IRQ_IS_MUXED(port) \
+- ((port)->irqs[SCIx_ERI_IRQ] == \
+- (port)->irqs[SCIx_RXI_IRQ]) || \
+- ((port)->irqs[SCIx_ERI_IRQ] && \
+- ((port)->irqs[SCIx_RXI_IRQ] < 0))
+ /*
+ * SCI register subset common for all port types.
+ * Not all registers will exist on all parts.
+@@ -120,8 +96,6 @@ struct plat_sci_port_ops {
+ * Platform device specific platform_data struct
+ */
+ struct plat_sci_port {
+- unsigned long mapbase; /* resource base */
+- unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */
+ unsigned int type; /* SCI / SCIF / IRDA / HSCIF */
+ upf_t flags; /* UPF_* flags */
+ unsigned long capabilities; /* Port features/capabilities */
+--
+1.8.5.rc3
+
--- /dev/null
+From ad88ad9ad072b2db89a17c683f2d57567cac0867 Mon Sep 17 00:00:00 2001
+From: Bastian Hecht <hechtb@gmail.com>
+Date: Fri, 6 Dec 2013 10:59:54 +0100
+Subject: serial: sh-sci: Add OF support
+
+Extend the driver to with support for SCIx device tree bindings. A
+minimal set of features is supported, additional properties can be added
+later should the need to describe more device features arise.
+
+Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 20bdcab8268cb05702e12ae9013be96ecc7ec3a6)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 101 ++++++++++++++++++++++++++++++++++++++++++--
+ 1 file changed, 98 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 795f2a284a24..22258850e170 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -39,6 +39,7 @@
+ #include <linux/module.h>
+ #include <linux/mm.h>
+ #include <linux/notifier.h>
++#include <linux/of.h>
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+ #include <linux/scatterlist.h>
+@@ -2415,6 +2416,83 @@ static int sci_remove(struct platform_device *dev)
+ return 0;
+ }
+
++struct sci_port_info {
++ unsigned int type;
++ unsigned int regtype;
++};
++
++static const struct of_device_id of_sci_match[] = {
++ {
++ .compatible = "renesas,scif",
++ .data = (void *)&(const struct sci_port_info) {
++ .type = PORT_SCIF,
++ .regtype = SCIx_SH4_SCIF_REGTYPE,
++ },
++ }, {
++ .compatible = "renesas,scifa",
++ .data = (void *)&(const struct sci_port_info) {
++ .type = PORT_SCIFA,
++ .regtype = SCIx_SCIFA_REGTYPE,
++ },
++ }, {
++ .compatible = "renesas,scifb",
++ .data = (void *)&(const struct sci_port_info) {
++ .type = PORT_SCIFB,
++ .regtype = SCIx_SCIFB_REGTYPE,
++ },
++ }, {
++ .compatible = "renesas,hscif",
++ .data = (void *)&(const struct sci_port_info) {
++ .type = PORT_HSCIF,
++ .regtype = SCIx_HSCIF_REGTYPE,
++ },
++ }, {
++ /* Terminator */
++ },
++};
++MODULE_DEVICE_TABLE(of, of_sci_match);
++
++static struct plat_sci_port *
++sci_parse_dt(struct platform_device *pdev, unsigned int *dev_id)
++{
++ struct device_node *np = pdev->dev.of_node;
++ const struct of_device_id *match;
++ const struct sci_port_info *info;
++ struct plat_sci_port *p;
++ int id;
++
++ if (!IS_ENABLED(CONFIG_OF) || !np)
++ return NULL;
++
++ match = of_match_node(of_sci_match, pdev->dev.of_node);
++ if (!match)
++ return NULL;
++
++ info = match->data;
++
++ p = devm_kzalloc(&pdev->dev, sizeof(struct plat_sci_port), GFP_KERNEL);
++ if (!p) {
++ dev_err(&pdev->dev, "failed to allocate DT config data\n");
++ return NULL;
++ }
++
++ /* Get the line number for the aliases node. */
++ id = of_alias_get_id(np, "serial");
++ if (id < 0) {
++ dev_err(&pdev->dev, "failed to get alias id (%d)\n", id);
++ return NULL;
++ }
++
++ *dev_id = id;
++
++ p->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
++ p->type = info->type;
++ p->regtype = info->regtype;
++ p->scscr = SCSCR_RE | SCSCR_TE;
++
++ return p;
++}
++
+ static int sci_probe_single(struct platform_device *dev,
+ unsigned int index,
+ struct plat_sci_port *p,
+@@ -2447,8 +2525,9 @@ static int sci_probe_single(struct platform_device *dev,
+
+ static int sci_probe(struct platform_device *dev)
+ {
+- struct plat_sci_port *p = dev_get_platdata(&dev->dev);
+- struct sci_port *sp = &sci_ports[dev->id];
++ struct plat_sci_port *p;
++ struct sci_port *sp;
++ unsigned int dev_id;
+ int ret;
+
+ /*
+@@ -2459,9 +2538,24 @@ static int sci_probe(struct platform_device *dev)
+ if (is_early_platform_device(dev))
+ return sci_probe_earlyprintk(dev);
+
++ if (dev->dev.of_node) {
++ p = sci_parse_dt(dev, &dev_id);
++ if (p == NULL)
++ return -EINVAL;
++ } else {
++ p = dev->dev.platform_data;
++ if (p == NULL) {
++ dev_err(&dev->dev, "no platform data supplied\n");
++ return -EINVAL;
++ }
++
++ dev_id = dev->id;
++ }
++
++ sp = &sci_ports[dev_id];
+ platform_set_drvdata(dev, sp);
+
+- ret = sci_probe_single(dev, dev->id, p, sp);
++ ret = sci_probe_single(dev, dev_id, p, sp);
+ if (ret)
+ return ret;
+
+@@ -2513,6 +2607,7 @@ static struct platform_driver sci_driver = {
+ .name = "sh-sci",
+ .owner = THIS_MODULE,
+ .pm = &sci_dev_pm_ops,
++ .of_match_table = of_match_ptr(of_sci_match),
+ },
+ };
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 144241217d14c71a07dd18f93a5cc0f3e0a8f4b9 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:48 +0100
+Subject: sh: Declare SCIF register base and IRQ as resources
+
+Passing the register base address and IRQ through platform data is
+deprecated. Use resources instead.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d850acf975bee46e43c3cd80d2d287010195c63b)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/sh/kernel/cpu/sh2/setup-sh7619.c | 27 +++++++---
+ arch/sh/kernel/cpu/sh2a/setup-mxg.c | 9 +++-
+ arch/sh/kernel/cpu/sh2a/setup-sh7201.c | 72 +++++++++++++++++++------
+ arch/sh/kernel/cpu/sh2a/setup-sh7203.c | 36 ++++++++++---
+ arch/sh/kernel/cpu/sh2a/setup-sh7206.c | 36 ++++++++++---
+ arch/sh/kernel/cpu/sh2a/setup-sh7264.c | 96 ++++++++++++++++++++++++++++------
+ arch/sh/kernel/cpu/sh2a/setup-sh7269.c | 96 ++++++++++++++++++++++++++++------
+ arch/sh/kernel/cpu/sh3/setup-sh7705.c | 18 +++++--
+ arch/sh/kernel/cpu/sh3/setup-sh770x.c | 27 +++++++---
+ arch/sh/kernel/cpu/sh3/setup-sh7710.c | 18 +++++--
+ arch/sh/kernel/cpu/sh3/setup-sh7720.c | 18 +++++--
+ arch/sh/kernel/cpu/sh4/setup-sh4-202.c | 15 ++++--
+ arch/sh/kernel/cpu/sh4/setup-sh7750.c | 18 +++++--
+ arch/sh/kernel/cpu/sh4/setup-sh7760.c | 58 +++++++++++++-------
+ arch/sh/kernel/cpu/sh4a/setup-sh7343.c | 36 ++++++++++---
+ arch/sh/kernel/cpu/sh4a/setup-sh7366.c | 9 +++-
+ arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 27 +++++++---
+ arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 54 ++++++++++++++-----
+ arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 54 ++++++++++++++-----
+ arch/sh/kernel/cpu/sh4a/setup-sh7734.c | 66 ++++++++++++++++-------
+ arch/sh/kernel/cpu/sh4a/setup-sh7757.c | 27 +++++++---
+ arch/sh/kernel/cpu/sh4a/setup-sh7763.c | 27 +++++++---
+ arch/sh/kernel/cpu/sh4a/setup-sh7770.c | 90 ++++++++++++++++++++++++-------
+ arch/sh/kernel/cpu/sh4a/setup-sh7780.c | 18 +++++--
+ arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 54 ++++++++++++++-----
+ arch/sh/kernel/cpu/sh4a/setup-sh7786.c | 82 ++++++++++++++++++++++-------
+ arch/sh/kernel/cpu/sh4a/setup-shx3.c | 45 ++++++++++------
+ arch/sh/kernel/cpu/sh5/setup-sh5.c | 11 +++-
+ 28 files changed, 883 insertions(+), 261 deletions(-)
+
+diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+index bb11e1925178..b708432c33b0 100644
+--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
++++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+@@ -60,51 +60,66 @@ static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
+ NULL, prio_registers, NULL);
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xf8400000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(88),
++};
++
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xf8400000, 0x100),
++ DEFINE_RES_IRQ(88),
+ };
+
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xf8410000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(92),
++};
++
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xf8410000, 0x100),
++ DEFINE_RES_IRQ(92),
+ };
+
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xf8420000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(96),
++};
++
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xf8420000, 0x100),
++ DEFINE_RES_IRQ(96),
+ };
+
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+index f7f1cf2af302..9bdc61143f40 100644
+--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
++++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+@@ -199,17 +199,22 @@ static struct platform_device mtu2_2_device = {
+ };
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xff804000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(220),
++};
++
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xff804000, 0x100),
++ DEFINE_RES_IRQ(220),
+ };
+
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+index 7b84785b8962..7585c4ed7c5c 100644
+--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
++++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+@@ -178,136 +178,176 @@ static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups,
+ mask_registers, prio_registers, NULL);
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xfffe8000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(180),
++};
++
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xfffe8000, 0x100),
++ DEFINE_RES_IRQ(180),
+ };
+
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xfffe8800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(184),
++};
++
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xfffe8800, 0x100),
++ DEFINE_RES_IRQ(184),
+ };
+
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xfffe9000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(188),
++};
++
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xfffe9000, 0x100),
++ DEFINE_RES_IRQ(188),
+ };
+
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xfffe9800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(192),
++};
++
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xfffe9800, 0x100),
++ DEFINE_RES_IRQ(192),
+ };
+
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xfffea000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(196),
++};
++
++static struct resource scif4_resources[] = {
++ DEFINE_RES_MEM(0xfffea000, 0x100),
++ DEFINE_RES_IRQ(196),
+ };
+
+ static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
++ .resource = scif4_resources,
++ .num_resources = ARRAY_SIZE(scif4_resources),
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif5_platform_data = {
+- .mapbase = 0xfffea800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(200),
++};
++
++static struct resource scif5_resources[] = {
++ DEFINE_RES_MEM(0xfffea800, 0x100),
++ DEFINE_RES_IRQ(200),
+ };
+
+ static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
++ .resource = scif5_resources,
++ .num_resources = ARRAY_SIZE(scif5_resources),
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif6_platform_data = {
+- .mapbase = 0xfffeb000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(204),
++};
++
++static struct resource scif6_resources[] = {
++ DEFINE_RES_MEM(0xfffeb000, 0x100),
++ DEFINE_RES_IRQ(204),
+ };
+
+ static struct platform_device scif6_device = {
+ .name = "sh-sci",
+ .id = 6,
++ .resource = scif6_resources,
++ .num_resources = ARRAY_SIZE(scif6_resources),
+ .dev = {
+ .platform_data = &scif6_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif7_platform_data = {
+- .mapbase = 0xfffeb800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(208),
++};
++
++static struct resource scif7_resources[] = {
++ DEFINE_RES_MEM(0xfffeb800, 0x100),
++ DEFINE_RES_IRQ(208),
+ };
+
+ static struct platform_device scif7_device = {
+ .name = "sh-sci",
+ .id = 7,
++ .resource = scif7_resources,
++ .num_resources = ARRAY_SIZE(scif7_resources),
+ .dev = {
+ .platform_data = &scif7_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+index bfc33f6a28c3..f2a9baaa541b 100644
+--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
++++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+@@ -174,76 +174,96 @@ static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups,
+ mask_registers, prio_registers, NULL);
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xfffe8000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(192),
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xfffe8000, 0x100),
++ DEFINE_RES_IRQ(192),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xfffe8800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(196),
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xfffe8800, 0x100),
++ DEFINE_RES_IRQ(196),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xfffe9000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(200),
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xfffe9000, 0x100),
++ DEFINE_RES_IRQ(200),
++};
++
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xfffe9800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(204),
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xfffe9800, 0x100),
++ DEFINE_RES_IRQ(204),
++};
++
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+index a5010741de85..fc7cacd36729 100644
+--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
++++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+@@ -134,68 +134,88 @@ static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
+ mask_registers, prio_registers, NULL);
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xfffe8000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(240),
++};
++
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xfffe8000, 0x100),
++ DEFINE_RES_IRQ(240),
+ };
+
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xfffe8800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(244),
++};
++
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xfffe8800, 0x100),
++ DEFINE_RES_IRQ(244),
+ };
+
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xfffe9000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(248),
++};
++
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xfffe9000, 0x100),
++ DEFINE_RES_IRQ(248),
+ };
+
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xfffe9800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(252),
++};
++
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xfffe9800, 0x100),
++ DEFINE_RES_IRQ(252),
+ };
+
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7264.c b/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
+index ce5c1b5aebfa..00edbdabcaa1 100644
+--- a/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
++++ b/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
+@@ -226,152 +226,216 @@ static DECLARE_INTC_DESC(intc_desc, "sh7264", vectors, groups,
+ mask_registers, prio_registers, NULL);
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xfffe8000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 233, 234, 235, 232 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xfffe8000, 0x100),
++ DEFINE_RES_IRQ(233),
++ DEFINE_RES_IRQ(234),
++ DEFINE_RES_IRQ(235),
++ DEFINE_RES_IRQ(232),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xfffe8800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 237, 238, 239, 236 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xfffe8800, 0x100),
++ DEFINE_RES_IRQ(237),
++ DEFINE_RES_IRQ(238),
++ DEFINE_RES_IRQ(239),
++ DEFINE_RES_IRQ(236),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xfffe9000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 241, 242, 243, 240 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xfffe9000, 0x100),
++ DEFINE_RES_IRQ(241),
++ DEFINE_RES_IRQ(242),
++ DEFINE_RES_IRQ(243),
++ DEFINE_RES_IRQ(240),
++};
++
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xfffe9800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 245, 246, 247, 244 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xfffe9800, 0x100),
++ DEFINE_RES_IRQ(245),
++ DEFINE_RES_IRQ(246),
++ DEFINE_RES_IRQ(247),
++ DEFINE_RES_IRQ(244),
++};
++
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xfffea000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 249, 250, 251, 248 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif4_resources[] = {
++ DEFINE_RES_MEM(0xfffea000, 0x100),
++ DEFINE_RES_IRQ(249),
++ DEFINE_RES_IRQ(250),
++ DEFINE_RES_IRQ(251),
++ DEFINE_RES_IRQ(248),
++};
++
+ static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
++ .resource = scif4_resources,
++ .num_resources = ARRAY_SIZE(scif4_resources),
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif5_platform_data = {
+- .mapbase = 0xfffea800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 253, 254, 255, 252 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif5_resources[] = {
++ DEFINE_RES_MEM(0xfffea800, 0x100),
++ DEFINE_RES_IRQ(253),
++ DEFINE_RES_IRQ(254),
++ DEFINE_RES_IRQ(255),
++ DEFINE_RES_IRQ(252),
++};
++
+ static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
++ .resource = scif5_resources,
++ .num_resources = ARRAY_SIZE(scif5_resources),
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif6_platform_data = {
+- .mapbase = 0xfffeb000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 257, 258, 259, 256 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif6_resources[] = {
++ DEFINE_RES_MEM(0xfffeb000, 0x100),
++ DEFINE_RES_IRQ(257),
++ DEFINE_RES_IRQ(258),
++ DEFINE_RES_IRQ(259),
++ DEFINE_RES_IRQ(256),
++};
++
+ static struct platform_device scif6_device = {
+ .name = "sh-sci",
+ .id = 6,
++ .resource = scif6_resources,
++ .num_resources = ARRAY_SIZE(scif6_resources),
+ .dev = {
+ .platform_data = &scif6_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif7_platform_data = {
+- .mapbase = 0xfffeb800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 261, 262, 263, 260 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif7_resources[] = {
++ DEFINE_RES_MEM(0xfffeb800, 0x100),
++ DEFINE_RES_IRQ(261),
++ DEFINE_RES_IRQ(262),
++ DEFINE_RES_IRQ(263),
++ DEFINE_RES_IRQ(260),
++};
++
+ static struct platform_device scif7_device = {
+ .name = "sh-sci",
+ .id = 7,
++ .resource = scif7_resources,
++ .num_resources = ARRAY_SIZE(scif7_resources),
+ .dev = {
+ .platform_data = &scif7_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7269.c b/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
+index e82ae9d8d3bc..5cdbaac322a0 100644
+--- a/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
++++ b/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
+@@ -248,152 +248,216 @@ static DECLARE_INTC_DESC(intc_desc, "sh7269", vectors, groups,
+ mask_registers, prio_registers, NULL);
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xe8007000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 259, 260, 261, 258 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xe8007000, 0x100),
++ DEFINE_RES_IRQ(259),
++ DEFINE_RES_IRQ(260),
++ DEFINE_RES_IRQ(261),
++ DEFINE_RES_IRQ(258),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xe8007800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 263, 264, 265, 262 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xe8007800, 0x100),
++ DEFINE_RES_IRQ(263),
++ DEFINE_RES_IRQ(264),
++ DEFINE_RES_IRQ(265),
++ DEFINE_RES_IRQ(262),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xe8008000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 267, 268, 269, 266 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xe8008000, 0x100),
++ DEFINE_RES_IRQ(267),
++ DEFINE_RES_IRQ(268),
++ DEFINE_RES_IRQ(269),
++ DEFINE_RES_IRQ(266),
++};
++
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xe8008800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 271, 272, 273, 270 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xe8008800, 0x100),
++ DEFINE_RES_IRQ(271),
++ DEFINE_RES_IRQ(272),
++ DEFINE_RES_IRQ(273),
++ DEFINE_RES_IRQ(270),
++};
++
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xe8009000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 275, 276, 277, 274 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif4_resources[] = {
++ DEFINE_RES_MEM(0xe8009000, 0x100),
++ DEFINE_RES_IRQ(275),
++ DEFINE_RES_IRQ(276),
++ DEFINE_RES_IRQ(277),
++ DEFINE_RES_IRQ(274),
++};
++
+ static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
++ .resource = scif4_resources,
++ .num_resources = ARRAY_SIZE(scif4_resources),
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif5_platform_data = {
+- .mapbase = 0xe8009800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 279, 280, 281, 278 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif5_resources[] = {
++ DEFINE_RES_MEM(0xe8009800, 0x100),
++ DEFINE_RES_IRQ(279),
++ DEFINE_RES_IRQ(280),
++ DEFINE_RES_IRQ(281),
++ DEFINE_RES_IRQ(278),
++};
++
+ static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
++ .resource = scif5_resources,
++ .num_resources = ARRAY_SIZE(scif5_resources),
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif6_platform_data = {
+- .mapbase = 0xe800a000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 283, 284, 285, 282 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif6_resources[] = {
++ DEFINE_RES_MEM(0xe800a000, 0x100),
++ DEFINE_RES_IRQ(283),
++ DEFINE_RES_IRQ(284),
++ DEFINE_RES_IRQ(285),
++ DEFINE_RES_IRQ(282),
++};
++
+ static struct platform_device scif6_device = {
+ .name = "sh-sci",
+ .id = 6,
++ .resource = scif6_resources,
++ .num_resources = ARRAY_SIZE(scif6_resources),
+ .dev = {
+ .platform_data = &scif6_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif7_platform_data = {
+- .mapbase = 0xe800a800,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 287, 288, 289, 286 },
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif7_resources[] = {
++ DEFINE_RES_MEM(0xe800a800, 0x100),
++ DEFINE_RES_IRQ(287),
++ DEFINE_RES_IRQ(288),
++ DEFINE_RES_IRQ(289),
++ DEFINE_RES_IRQ(286),
++};
++
+ static struct platform_device scif7_device = {
+ .name = "sh-sci",
+ .id = 7,
++ .resource = scif7_resources,
++ .num_resources = ARRAY_SIZE(scif7_resources),
+ .dev = {
+ .platform_data = &scif7_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+index 03e4c96f2b11..10dd0a01d5f8 100644
+--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
++++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+@@ -70,39 +70,49 @@ static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
+ NULL, prio_registers, NULL);
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xa4410000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE |
+ SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0,
+ .scbrr_algo_id = SCBRR_ALGO_4,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
+ .ops = &sh770x_sci_port_ops,
+ .regtype = SCIx_SH7705_SCIF_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xa4410000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x900)),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xa4400000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,
+ .scbrr_algo_id = SCBRR_ALGO_4,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x880)),
+ .ops = &sh770x_sci_port_ops,
+ .regtype = SCIx_SH7705_SCIF_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xa4400000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x880)),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+index ba26cd9ce69b..d5541b0a6dc5 100644
+--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
++++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+@@ -109,20 +109,25 @@ static struct platform_device rtc_device = {
+ };
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xfffffe80,
+ .port_reg = 0xa4000136,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCI,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x4e0)),
+ .ops = &sh770x_sci_port_ops,
+ .regshift = 1,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xfffffe80, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x4e0)),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+@@ -131,19 +136,24 @@ static struct platform_device scif0_device = {
+ defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7709)
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xa4000150,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
+ .ops = &sh770x_sci_port_ops,
+ .regtype = SCIx_SH3_SCIF_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xa4000150, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x900)),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+@@ -152,20 +162,25 @@ static struct platform_device scif1_device = {
+ #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7709)
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xa4000140,
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_IRDA,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x880)),
+ .ops = &sh770x_sci_port_ops,
+ .regshift = 1,
+ };
+
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xa4000140, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x880)),
++};
++
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+index 93c9c5e24a7a..de229f5c6b1e 100644
+--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
++++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+@@ -98,36 +98,46 @@ static struct platform_device rtc_device = {
+ };
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xa4400000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE |
+ SCSCR_CKE1 | SCSCR_CKE0,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x880)),
++};
++
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xa4400000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x880)),
+ };
+
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xa4410000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE |
+ SCSCR_CKE1 | SCSCR_CKE0,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
++};
++
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xa4410000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x900)),
+ };
+
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+index 42d991f632b1..ca835819357b 100644
+--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
++++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+@@ -52,38 +52,48 @@ static struct platform_device rtc_device = {
+ };
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xa4430000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE,
+ .scbrr_algo_id = SCBRR_ALGO_4,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc00)),
+ .ops = &sh7720_sci_port_ops,
+ .regtype = SCIx_SH7705_SCIF_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xa4430000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc00)),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xa4438000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE,
+ .scbrr_algo_id = SCBRR_ALGO_4,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc20)),
+ .ops = &sh7720_sci_port_ops,
+ .regtype = SCIx_SH7705_SCIF_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xa4438000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc20)),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+index 2a5320aa73bb..0fc6a105144a 100644
+--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
++++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+@@ -17,20 +17,25 @@
+ #include <linux/io.h>
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xffe80000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { evt2irq(0x700),
+- evt2irq(0x720),
+- evt2irq(0x760),
+- evt2irq(0x740) },
++};
++
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xffe80000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x700)),
++ DEFINE_RES_IRQ(evt2irq(0x720)),
++ DEFINE_RES_IRQ(evt2irq(0x760)),
++ DEFINE_RES_IRQ(evt2irq(0x740)),
+ };
+
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+index 04a45512596f..5613c15d8163 100644
+--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
++++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+@@ -38,36 +38,46 @@ static struct platform_device rtc_device = {
+ };
+
+ static struct plat_sci_port sci_platform_data = {
+- .mapbase = 0xffe00000,
+ .port_reg = 0xffe0001C,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCI,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x4e0)),
+ .regshift = 2,
+ };
+
++static struct resource sci_resources[] = {
++ DEFINE_RES_MEM(0xffe00000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x4e0)),
++};
++
+ static struct platform_device sci_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = sci_resources,
++ .num_resources = ARRAY_SIZE(sci_resources),
+ .dev = {
+ .platform_data = &sci_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif_platform_data = {
+- .mapbase = 0xffe80000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x700)),
++};
++
++static struct resource scif_resources[] = {
++ DEFINE_RES_MEM(0xffe80000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x700)),
+ };
+
+ static struct platform_device scif_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif_resources,
++ .num_resources = ARRAY_SIZE(scif_resources),
+ .dev = {
+ .platform_data = &scif_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+index 98e075ada44e..a83e6f5a42d0 100644
+--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
++++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+@@ -128,83 +128,103 @@ static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
+ mask_registers, prio_registers, NULL);
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xfe600000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { evt2irq(0x880),
+- evt2irq(0x8a0),
+- evt2irq(0x8e0),
+- evt2irq(0x8c0) },
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xfe600000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x880)),
++ DEFINE_RES_IRQ(evt2irq(0x8a0)),
++ DEFINE_RES_IRQ(evt2irq(0x8e0)),
++ DEFINE_RES_IRQ(evt2irq(0x8c0)),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xfe610000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+- .irqs = { evt2irq(0xb00),
+- evt2irq(0xb20),
+- evt2irq(0xb60),
+- evt2irq(0xb40) },
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xfe610000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xb00)),
++ DEFINE_RES_IRQ(evt2irq(0xb20)),
++ DEFINE_RES_IRQ(evt2irq(0xb60)),
++ DEFINE_RES_IRQ(evt2irq(0xb40)),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xfe620000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { evt2irq(0xb80),
+- evt2irq(0xba0),
+- evt2irq(0xbe0),
+- evt2irq(0xbc0) },
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xfe620000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xb80)),
++ DEFINE_RES_IRQ(evt2irq(0xba0)),
++ DEFINE_RES_IRQ(evt2irq(0xbe0)),
++ DEFINE_RES_IRQ(evt2irq(0xbc0)),
++};
++
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xfe480000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCI,
+- .irqs = { evt2irq(0xc00),
+- evt2irq(0xc20),
+- evt2irq(0xc40), },
+ .regshift = 2,
+ };
+
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xfe480000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc00)),
++ DEFINE_RES_IRQ(evt2irq(0xc20)),
++ DEFINE_RES_IRQ(evt2irq(0xc40)),
++};
++
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+index b91ea8300a3e..8b45f672448d 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+@@ -18,68 +18,88 @@
+
+ /* Serial */
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xffe00000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc00)),
++};
++
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xffe00000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc00)),
+ };
+
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xffe10000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc20)),
++};
++
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xffe10000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc20)),
+ };
+
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xffe20000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc40)),
++};
++
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xffe20000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc40)),
+ };
+
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xffe30000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc60)),
++};
++
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xffe30000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc60)),
+ };
+
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+index 0bd09d51419f..317f710a5b2b 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+@@ -20,18 +20,23 @@
+ #include <asm/clock.h>
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xffe00000,
+ .port_reg = 0xa405013e,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc00)),
++};
++
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xffe00000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc00)),
+ };
+
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+index 6a868b091c2d..6aeebb5299f6 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+@@ -179,57 +179,72 @@ struct platform_device dma_device = {
+
+ /* Serial */
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xffe00000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc00)),
+ .ops = &sh7722_sci_port_ops,
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xffe00000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc00)),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xffe10000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc20)),
+ .ops = &sh7722_sci_port_ops,
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xffe10000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc20)),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xffe20000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc40)),
+ .ops = &sh7722_sci_port_ops,
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xffe20000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc40)),
++};
++
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+index 28d6fd835fe0..521a09ef4ffe 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+@@ -23,111 +23,141 @@
+
+ /* Serial */
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xffe00000,
+ .port_reg = 0xa4050160,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc00)),
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xffe00000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc00)),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xffe10000,
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc20)),
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xffe10000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc20)),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xffe20000,
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc40)),
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xffe20000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc40)),
++};
++
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xa4e30000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_3,
+ .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
++};
++
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xa4e30000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x900)),
+ };
+
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xa4e40000,
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_3,
+ .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xd00)),
++};
++
++static struct resource scif4_resources[] = {
++ DEFINE_RES_MEM(0xa4e40000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xd00)),
+ };
+
+ static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
++ .resource = scif4_resources,
++ .num_resources = ARRAY_SIZE(scif4_resources),
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif5_platform_data = {
+- .mapbase = 0xa4e50000,
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_3,
+ .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xfa0)),
++};
++
++static struct resource scif5_resources[] = {
++ DEFINE_RES_MEM(0xa4e50000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xfa0)),
+ };
+
+ static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
++ .resource = scif5_resources,
++ .num_resources = ARRAY_SIZE(scif5_resources),
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+index 26b74c2f9496..fb0a23749147 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+@@ -290,111 +290,141 @@ static struct platform_device dma1_device = {
+
+ /* Serial */
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xffe00000,
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc00)),
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xffe00000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc00)),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xffe10000,
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc20)),
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xffe10000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc20)),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xffe20000,
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xc40)),
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xffe20000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xc40)),
++};
++
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xa4e30000,
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE,
+ .scbrr_algo_id = SCBRR_ALGO_3,
+ .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
++};
++
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xa4e30000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x900)),
+ };
+
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xa4e40000,
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE,
+ .scbrr_algo_id = SCBRR_ALGO_3,
+ .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xd00)),
++};
++
++static struct resource scif4_resources[] = {
++ DEFINE_RES_MEM(0xa4e40000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xd00)),
+ };
+
+ static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
++ .resource = scif4_resources,
++ .num_resources = ARRAY_SIZE(scif4_resources),
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif5_platform_data = {
+- .mapbase = 0xa4e50000,
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE,
+ .scbrr_algo_id = SCBRR_ALGO_3,
+ .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xfa0)),
++};
++
++static struct resource scif5_resources[] = {
++ DEFINE_RES_MEM(0xa4e50000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xfa0)),
+ };
+
+ static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
++ .resource = scif5_resources,
++ .num_resources = ARRAY_SIZE(scif5_resources),
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
+index f799971d453c..bedf8fb5be6f 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
+@@ -25,108 +25,138 @@
+
+ /* SCIF */
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xFFE40000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x8C0)),
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xffe40000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x8c0)),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+- .id = 0,
++ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xFFE41000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x8E0)),
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xffe41000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x8e0)),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+- .id = 1,
++ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xFFE42000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ };
+
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xffe42000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x900)),
++};
++
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+- .id = 2,
++ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xFFE43000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x920)),
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ };
+
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xffe43000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x920)),
++};
++
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+- .id = 3,
++ .id = 3,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xFFE44000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x940)),
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ };
+
++static struct resource scif4_resources[] = {
++ DEFINE_RES_MEM(0xffe44000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x940)),
++};
++
+ static struct platform_device scif4_device = {
+ .name = "sh-sci",
+- .id = 4,
++ .id = 4,
++ .resource = scif4_resources,
++ .num_resources = ARRAY_SIZE(scif4_resources),
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif5_platform_data = {
+- .mapbase = 0xFFE43000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x960)),
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ };
+
++static struct resource scif5_resources[] = {
++ DEFINE_RES_MEM(0xffe43000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x960)),
++};
++
+ static struct platform_device scif5_device = {
+ .name = "sh-sci",
+- .id = 5,
++ .id = 5,
++ .resource = scif5_resources,
++ .num_resources = ARRAY_SIZE(scif5_resources),
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+index 9079a0f9ea9b..6b8d0e61704c 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+@@ -24,51 +24,66 @@
+ #include <cpu/sh7757.h>
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xfe4b0000, /* SCIF2 */
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x700)),
++};
++
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xfe4b0000, 0x100), /* SCIF2 */
++ DEFINE_RES_IRQ(evt2irq(0x700)),
+ };
+
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xfe4c0000, /* SCIF3 */
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xb80)),
++};
++
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xfe4c0000, 0x100), /* SCIF3 */
++ DEFINE_RES_IRQ(evt2irq(0xb80)),
+ };
+
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xfe4d0000, /* SCIF4 */
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xF00)),
++};
++
++static struct resource scif4_resources[] = {
++ DEFINE_RES_MEM(0xfe4d0000, 0x100), /* SCIF4 */
++ DEFINE_RES_IRQ(evt2irq(0xf00)),
+ };
+
+ static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif4_resources,
++ .num_resources = ARRAY_SIZE(scif4_resources),
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+index 1686acaaf45a..940505cec66f 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+@@ -19,54 +19,69 @@
+ #include <linux/usb/ohci_pdriver.h>
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xffe00000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x700)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xffe00000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x700)),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xffe08000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xb80)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xffe08000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xb80)),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xffe10000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xf00)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xffe10000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xf00)),
++};
++
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+index 256ea7a45164..f9c04dee4e82 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+@@ -16,170 +16,220 @@
+ #include <linux/io.h>
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xff923000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x9a0)),
++};
++
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xff923000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x9a0)),
+ };
+
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xff924000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x9c0)),
++};
++
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xff924000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x9c0)),
+ };
+
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xff925000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x9e0)),
++};
++
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xff925000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x9e0)),
+ };
+
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xff926000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xa00)),
++};
++
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xff926000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xa00)),
+ };
+
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xff927000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xa20)),
++};
++
++static struct resource scif4_resources[] = {
++ DEFINE_RES_MEM(0xff927000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xa20)),
+ };
+
+ static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
++ .resource = scif4_resources,
++ .num_resources = ARRAY_SIZE(scif4_resources),
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif5_platform_data = {
+- .mapbase = 0xff928000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xa40)),
++};
++
++static struct resource scif5_resources[] = {
++ DEFINE_RES_MEM(0xff928000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xa40)),
+ };
+
+ static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
++ .resource = scif5_resources,
++ .num_resources = ARRAY_SIZE(scif5_resources),
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif6_platform_data = {
+- .mapbase = 0xff929000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xa60)),
++};
++
++static struct resource scif6_resources[] = {
++ DEFINE_RES_MEM(0xff929000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xa60)),
+ };
+
+ static struct platform_device scif6_device = {
+ .name = "sh-sci",
+ .id = 6,
++ .resource = scif6_resources,
++ .num_resources = ARRAY_SIZE(scif6_resources),
+ .dev = {
+ .platform_data = &scif6_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif7_platform_data = {
+- .mapbase = 0xff92a000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xa80)),
++};
++
++static struct resource scif7_resources[] = {
++ DEFINE_RES_MEM(0xff92a000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xa80)),
+ };
+
+ static struct platform_device scif7_device = {
+ .name = "sh-sci",
+ .id = 7,
++ .resource = scif7_resources,
++ .num_resources = ARRAY_SIZE(scif7_resources),
+ .dev = {
+ .platform_data = &scif7_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif8_platform_data = {
+- .mapbase = 0xff92b000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xaa0)),
++};
++
++static struct resource scif8_resources[] = {
++ DEFINE_RES_MEM(0xff92b000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xaa0)),
+ };
+
+ static struct platform_device scif8_device = {
+ .name = "sh-sci",
+ .id = 8,
++ .resource = scif8_resources,
++ .num_resources = ARRAY_SIZE(scif8_resources),
+ .dev = {
+ .platform_data = &scif8_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif9_platform_data = {
+- .mapbase = 0xff92c000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xac0)),
++};
++
++static struct resource scif9_resources[] = {
++ DEFINE_RES_MEM(0xff92c000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xac0)),
+ };
+
+ static struct platform_device scif9_device = {
+ .name = "sh-sci",
+ .id = 9,
++ .resource = scif9_resources,
++ .num_resources = ARRAY_SIZE(scif9_resources),
+ .dev = {
+ .platform_data = &scif9_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+index de45b704687a..227f8f4080fa 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+@@ -18,36 +18,46 @@
+ #include <cpu/dma-register.h>
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xffe00000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x700)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xffe00000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x700)),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xffe10000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0xb80)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xffe10000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0xb80)),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+index 0968ecb962e6..b9f64c1ee895 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+@@ -20,108 +20,138 @@
+ #include <cpu/dma-register.h>
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xffea0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x700)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xffea0000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x700)),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xffeb0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x780)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xffeb0000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x780)),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xffec0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x980)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xffec0000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x980)),
++};
++
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xffed0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x9a0)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xffed0000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x9a0)),
++};
++
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xffee0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x9c0)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif4_resources[] = {
++ DEFINE_RES_MEM(0xffee0000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x9c0)),
++};
++
+ static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
++ .resource = scif4_resources,
++ .num_resources = ARRAY_SIZE(scif4_resources),
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif5_platform_data = {
+- .mapbase = 0xffef0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x9e0)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif5_resources[] = {
++ DEFINE_RES_MEM(0xffef0000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x9e0)),
++};
++
+ static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
++ .resource = scif5_resources,
++ .num_resources = ARRAY_SIZE(scif5_resources),
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+index ab52d4d4484d..92b95ceabd6e 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+@@ -28,21 +28,26 @@
+ #include <asm/mmzone.h>
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xffea0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = { evt2irq(0x700),
+- evt2irq(0x720),
+- evt2irq(0x760),
+- evt2irq(0x740) },
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xffea0000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x700)),
++ DEFINE_RES_IRQ(evt2irq(0x720)),
++ DEFINE_RES_IRQ(evt2irq(0x760)),
++ DEFINE_RES_IRQ(evt2irq(0x740)),
++};
++
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+@@ -52,90 +57,124 @@ static struct platform_device scif0_device = {
+ * The rest of these all have multiplexed IRQs
+ */
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xffeb0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x780)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xffeb0000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x780)),
++};
++
++static struct resource scif1_demux_resources[] = {
++ DEFINE_RES_MEM(0xffeb0000, 0x100),
++ /* Placeholders, see sh7786_devices_setup() */
++ DEFINE_RES_IRQ(0),
++ DEFINE_RES_IRQ(0),
++ DEFINE_RES_IRQ(0),
++ DEFINE_RES_IRQ(0),
++};
++
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xffec0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x840)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xffec0000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x840)),
++};
++
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xffed0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x860)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif3_resources[] = {
++ DEFINE_RES_MEM(0xffed0000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x860)),
++};
++
+ static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
++ .resource = scif3_resources,
++ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xffee0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x880)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif4_resources[] = {
++ DEFINE_RES_MEM(0xffee0000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x880)),
++};
++
+ static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
++ .resource = scif4_resources,
++ .num_resources = ARRAY_SIZE(scif4_resources),
+ .dev = {
+ .platform_data = &scif4_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif5_platform_data = {
+- .mapbase = 0xffef0000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+ .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(evt2irq(0x8a0)),
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
++static struct resource scif5_resources[] = {
++ DEFINE_RES_MEM(0xffef0000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x8a0)),
++};
++
+ static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
++ .resource = scif5_resources,
++ .num_resources = ARRAY_SIZE(scif5_resources),
+ .dev = {
+ .platform_data = &scif5_platform_data,
+ },
+@@ -1037,13 +1076,16 @@ static int __init sh7786_devices_setup(void)
+ */
+ irq = intc_irq_lookup(sh7786_intc_desc.name, TXI1);
+ if (irq > 0) {
+- scif1_platform_data.irqs[SCIx_TXI_IRQ] = irq;
+- scif1_platform_data.irqs[SCIx_ERI_IRQ] =
++ scif1_demux_resources[1].start =
+ intc_irq_lookup(sh7786_intc_desc.name, ERI1);
+- scif1_platform_data.irqs[SCIx_BRI_IRQ] =
+- intc_irq_lookup(sh7786_intc_desc.name, BRI1);
+- scif1_platform_data.irqs[SCIx_RXI_IRQ] =
++ scif1_demux_resources[2].start =
+ intc_irq_lookup(sh7786_intc_desc.name, RXI1);
++ scif1_demux_resources[3].start = irq;
++ scif1_demux_resources[4].start =
++ intc_irq_lookup(sh7786_intc_desc.name, BRI1);
++
++ scif1_device.resource = scif1_demux_resources;
++ scif1_device.num_resources = ARRAY_SIZE(scif1_demux_resources);
+ }
+
+ ret = platform_add_devices(sh7786_early_devices,
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+index 688f7ed1bab1..4d65be9be001 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+@@ -28,60 +28,75 @@
+ * all rather than adding infrastructure to hack around it.
+ */
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xffc30000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { evt2irq(0x700),
+- evt2irq(0x720),
+- evt2irq(0x760),
+- evt2irq(0x740) },
++};
++
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(0xffc30000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x700)),
++ DEFINE_RES_IRQ(evt2irq(0x720)),
++ DEFINE_RES_IRQ(evt2irq(0x760)),
++ DEFINE_RES_IRQ(evt2irq(0x740)),
+ };
+
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xffc40000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { evt2irq(0x780),
+- evt2irq(0x7a0),
+- evt2irq(0x7e0),
+- evt2irq(0x7c0) },
++};
++
++static struct resource scif1_resources[] = {
++ DEFINE_RES_MEM(0xffc40000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x780)),
++ DEFINE_RES_IRQ(evt2irq(0x7a0)),
++ DEFINE_RES_IRQ(evt2irq(0x7e0)),
++ DEFINE_RES_IRQ(evt2irq(0x7c0)),
+ };
+
+ static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
++ .resource = scif1_resources,
++ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
+ },
+ };
+
+ static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xffc60000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { evt2irq(0x880),
+- evt2irq(0x8a0),
+- evt2irq(0x8e0),
+- evt2irq(0x8c0) },
++};
++
++static struct resource scif2_resources[] = {
++ DEFINE_RES_MEM(0xffc60000, 0x100),
++ DEFINE_RES_IRQ(evt2irq(0x880)),
++ DEFINE_RES_IRQ(evt2irq(0x8a0)),
++ DEFINE_RES_IRQ(evt2irq(0x8e0)),
++ DEFINE_RES_IRQ(evt2irq(0x8c0)),
+ };
+
+ static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
++ .resource = scif2_resources,
++ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
+ },
+diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c
+index 18419f1de963..64b098162c98 100644
+--- a/arch/sh/kernel/cpu/sh5/setup-sh5.c
++++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c
+@@ -17,17 +17,24 @@
+ #include <asm/addrspace.h>
+
+ static struct plat_sci_port scif0_platform_data = {
+- .mapbase = PHYS_PERIPHERAL_BLOCK + 0x01030000,
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+ .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+- .irqs = { 39, 40, 42, 0 },
++};
++
++static struct resource scif0_resources[] = {
++ DEFINE_RES_MEM(PHYS_PERIPHERAL_BLOCK + 0x01030000, 0x100),
++ DEFINE_RES_IRQ(39),
++ DEFINE_RES_IRQ(40),
++ DEFINE_RES_IRQ(42),
+ };
+
+ static struct platform_device scif0_device = {
+ .name = "sh-sci",
+ .id = 0,
++ .resource = scif0_resources,
++ .num_resources = ARRAY_SIZE(scif0_resources),
+ .dev = {
+ .platform_data = &scif0_platform_data,
+ },
+--
+1.8.5.rc3
+
--- /dev/null
+From e49034d60f2aa317528c33a43d0dba3f0d1f2a5b Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:49 +0100
+Subject: sh: sh772[34]: Set serial port sampling rate to 8 for SCIFA ports
+
+SCIFA ports on sh7723 and sh7724 seem to use a sampling rate of half the
+value specified in the datasheet. This is currently handled by a custom
+baud rate calculation algorithm. The algorithm ID will be removed from
+platform data, set the sampling rate directly instead.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 64c535e942af6cfe59ceceeb9bc6ba5f437a2fc9)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 6 +++---
+ arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 6 +++---
+ 2 files changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+index 521a09ef4ffe..079951be4122 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+@@ -98,7 +98,7 @@ static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_3,
++ .sampling_rate = 8,
+ .type = PORT_SCIFA,
+ };
+
+@@ -121,7 +121,7 @@ static struct plat_sci_port scif4_platform_data = {
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_3,
++ .sampling_rate = 8,
+ .type = PORT_SCIFA,
+ };
+
+@@ -144,7 +144,7 @@ static struct plat_sci_port scif5_platform_data = {
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_3,
++ .sampling_rate = 8,
+ .type = PORT_SCIFA,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+index fb0a23749147..59c359469f13 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+@@ -365,7 +365,7 @@ static struct plat_sci_port scif3_platform_data = {
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_3,
++ .sampling_rate = 8,
+ .type = PORT_SCIFA,
+ };
+
+@@ -388,7 +388,7 @@ static struct plat_sci_port scif4_platform_data = {
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_3,
++ .sampling_rate = 8,
+ .type = PORT_SCIFA,
+ };
+
+@@ -411,7 +411,7 @@ static struct plat_sci_port scif5_platform_data = {
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_3,
++ .sampling_rate = 8,
+ .type = PORT_SCIFA,
+ };
+
+--
+1.8.5.rc3
+
--- /dev/null
+From c1831826994681d1626154cdcdb728e544931a6a Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:50 +0100
+Subject: sh: Don't set plat_sci_port scbrr_algo_id field
+
+The field will be removed from the sh-sci driver. Don't set it and let
+the driver handle baud rate calculation internally.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d5917ef318b850fc72bd10db438580f7d1c406d9)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/sh/kernel/cpu/sh2/setup-sh7619.c | 3 ---
+ arch/sh/kernel/cpu/sh2a/setup-mxg.c | 1 -
+ arch/sh/kernel/cpu/sh2a/setup-sh7201.c | 8 --------
+ arch/sh/kernel/cpu/sh2a/setup-sh7203.c | 4 ----
+ arch/sh/kernel/cpu/sh2a/setup-sh7206.c | 4 ----
+ arch/sh/kernel/cpu/sh2a/setup-sh7264.c | 8 --------
+ arch/sh/kernel/cpu/sh2a/setup-sh7269.c | 8 --------
+ arch/sh/kernel/cpu/sh3/setup-sh7705.c | 2 --
+ arch/sh/kernel/cpu/sh3/setup-sh770x.c | 3 ---
+ arch/sh/kernel/cpu/sh3/setup-sh7710.c | 2 --
+ arch/sh/kernel/cpu/sh3/setup-sh7720.c | 2 --
+ arch/sh/kernel/cpu/sh4/setup-sh4-202.c | 1 -
+ arch/sh/kernel/cpu/sh4/setup-sh7750.c | 2 --
+ arch/sh/kernel/cpu/sh4/setup-sh7760.c | 4 ----
+ arch/sh/kernel/cpu/sh4a/setup-sh7343.c | 4 ----
+ arch/sh/kernel/cpu/sh4a/setup-sh7366.c | 1 -
+ arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 3 ---
+ arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 3 ---
+ arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 3 ---
+ arch/sh/kernel/cpu/sh4a/setup-sh7734.c | 6 ------
+ arch/sh/kernel/cpu/sh4a/setup-sh7757.c | 3 ---
+ arch/sh/kernel/cpu/sh4a/setup-sh7763.c | 3 ---
+ arch/sh/kernel/cpu/sh4a/setup-sh7770.c | 10 ----------
+ arch/sh/kernel/cpu/sh4a/setup-sh7780.c | 4 ----
+ arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 6 ------
+ arch/sh/kernel/cpu/sh4a/setup-sh7786.c | 6 ------
+ arch/sh/kernel/cpu/sh4a/setup-shx3.c | 3 ---
+ arch/sh/kernel/cpu/sh5/setup-sh5.c | 1 -
+ 28 files changed, 108 deletions(-)
+
+diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+index b708432c33b0..4b867287dad8 100644
+--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
++++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+@@ -62,7 +62,6 @@ static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -84,7 +83,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -106,7 +104,6 @@ static struct platform_device scif1_device = {
+ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+index 9bdc61143f40..63e996f9a7ed 100644
+--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
++++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+@@ -201,7 +201,6 @@ static struct platform_device mtu2_2_device = {
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+index 7585c4ed7c5c..2c6874461536 100644
+--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
++++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+@@ -180,7 +180,6 @@ static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups,
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -202,7 +201,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -224,7 +222,6 @@ static struct platform_device scif1_device = {
+ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -246,7 +243,6 @@ static struct platform_device scif2_device = {
+ static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -268,7 +264,6 @@ static struct platform_device scif3_device = {
+ static struct plat_sci_port scif4_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -290,7 +285,6 @@ static struct platform_device scif4_device = {
+ static struct plat_sci_port scif5_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -312,7 +306,6 @@ static struct platform_device scif5_device = {
+ static struct plat_sci_port scif6_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -334,7 +327,6 @@ static struct platform_device scif6_device = {
+ static struct plat_sci_port scif7_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+index f2a9baaa541b..d55a0f30ada3 100644
+--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
++++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+@@ -177,7 +177,6 @@ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -201,7 +200,6 @@ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -225,7 +223,6 @@ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -249,7 +246,6 @@ static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+index fc7cacd36729..241e745e3ced 100644
+--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
++++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+@@ -136,7 +136,6 @@ static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -158,7 +157,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -180,7 +178,6 @@ static struct platform_device scif1_device = {
+ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -202,7 +199,6 @@ static struct platform_device scif2_device = {
+ static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7264.c b/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
+index 00edbdabcaa1..ad5b0f429882 100644
+--- a/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
++++ b/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
+@@ -229,7 +229,6 @@ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -256,7 +255,6 @@ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -283,7 +281,6 @@ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -310,7 +307,6 @@ static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -337,7 +333,6 @@ static struct plat_sci_port scif4_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -364,7 +359,6 @@ static struct plat_sci_port scif5_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -391,7 +385,6 @@ static struct plat_sci_port scif6_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -418,7 +411,6 @@ static struct plat_sci_port scif7_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7269.c b/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
+index 5cdbaac322a0..3995119f65dc 100644
+--- a/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
++++ b/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
+@@ -251,7 +251,6 @@ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -278,7 +277,6 @@ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -305,7 +303,6 @@ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -332,7 +329,6 @@ static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -359,7 +355,6 @@ static struct plat_sci_port scif4_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -386,7 +381,6 @@ static struct plat_sci_port scif5_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -413,7 +407,6 @@ static struct plat_sci_port scif6_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -440,7 +433,6 @@ static struct plat_sci_port scif7_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
+ SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+ };
+diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+index 10dd0a01d5f8..c76b2543b85f 100644
+--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
++++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+@@ -73,7 +73,6 @@ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE |
+ SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+ .type = PORT_SCIF,
+ .ops = &sh770x_sci_port_ops,
+ .regtype = SCIx_SH7705_SCIF_REGTYPE,
+@@ -97,7 +96,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+ .type = PORT_SCIF,
+ .ops = &sh770x_sci_port_ops,
+ .regtype = SCIx_SH7705_SCIF_REGTYPE,
+diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+index d5541b0a6dc5..ff1465c0519c 100644
+--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
++++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+@@ -112,7 +112,6 @@ static struct plat_sci_port scif0_platform_data = {
+ .port_reg = 0xa4000136,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCI,
+ .ops = &sh770x_sci_port_ops,
+ .regshift = 1,
+@@ -138,7 +137,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .ops = &sh770x_sci_port_ops,
+ .regtype = SCIx_SH3_SCIF_REGTYPE,
+@@ -165,7 +163,6 @@ static struct plat_sci_port scif2_platform_data = {
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_IRDA,
+ .ops = &sh770x_sci_port_ops,
+ .regshift = 1,
+diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+index de229f5c6b1e..e2ce9360ed5a 100644
+--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
++++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+@@ -101,7 +101,6 @@ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE |
+ SCSCR_CKE1 | SCSCR_CKE0,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -124,7 +123,6 @@ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE |
+ SCSCR_CKE1 | SCSCR_CKE0,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+index ca835819357b..1d5729dc0724 100644
+--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
++++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+@@ -54,7 +54,6 @@ static struct platform_device rtc_device = {
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+ .type = PORT_SCIF,
+ .ops = &sh7720_sci_port_ops,
+ .regtype = SCIx_SH7705_SCIF_REGTYPE,
+@@ -78,7 +77,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+ .type = PORT_SCIF,
+ .ops = &sh7720_sci_port_ops,
+ .regtype = SCIx_SH7705_SCIF_REGTYPE,
+diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+index 0fc6a105144a..a8bd778d5ac8 100644
+--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
++++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+@@ -19,7 +19,6 @@
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+index 5613c15d8163..a447a248491f 100644
+--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
++++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+@@ -41,7 +41,6 @@ static struct plat_sci_port sci_platform_data = {
+ .port_reg = 0xffe0001C,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCI,
+ .regshift = 2,
+ };
+@@ -64,7 +63,6 @@ static struct platform_device sci_device = {
+ static struct plat_sci_port scif_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+index a83e6f5a42d0..1abd9fb4a386 100644
+--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
++++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+@@ -130,7 +130,6 @@ static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -157,7 +156,6 @@ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+
+@@ -182,7 +180,6 @@ static struct platform_device scif1_device = {
+ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -208,7 +205,6 @@ static struct platform_device scif2_device = {
+ static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCI,
+ .regshift = 2,
+ };
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+index 8b45f672448d..245d19254489 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+@@ -20,7 +20,6 @@
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -42,7 +41,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -64,7 +62,6 @@ static struct platform_device scif1_device = {
+ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -86,7 +83,6 @@ static struct platform_device scif2_device = {
+ static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+index 317f710a5b2b..6f56cbd76b20 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+@@ -23,7 +23,6 @@ static struct plat_sci_port scif0_platform_data = {
+ .port_reg = 0xa405013e,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+index 6aeebb5299f6..5a94efc8d4ce 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+@@ -181,7 +181,6 @@ struct platform_device dma_device = {
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .ops = &sh7722_sci_port_ops,
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+@@ -205,7 +204,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .ops = &sh7722_sci_port_ops,
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+@@ -229,7 +227,6 @@ static struct platform_device scif1_device = {
+ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .ops = &sh7722_sci_port_ops,
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+index 079951be4122..3c5eb0993a75 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+@@ -26,7 +26,6 @@ static struct plat_sci_port scif0_platform_data = {
+ .port_reg = 0xa4050160,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+@@ -50,7 +49,6 @@ static struct plat_sci_port scif1_platform_data = {
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+@@ -74,7 +72,6 @@ static struct plat_sci_port scif2_platform_data = {
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+index 59c359469f13..60ebbc6842ff 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+@@ -293,7 +293,6 @@ static struct plat_sci_port scif0_platform_data = {
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+@@ -317,7 +316,6 @@ static struct plat_sci_port scif1_platform_data = {
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+@@ -341,7 +339,6 @@ static struct plat_sci_port scif2_platform_data = {
+ .port_reg = SCIx_NOT_SUPPORTED,
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
+ };
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
+index bedf8fb5be6f..dad4ed1b2f94 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
+@@ -27,7 +27,6 @@
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ };
+@@ -50,7 +49,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ };
+@@ -73,7 +71,6 @@ static struct platform_device scif1_device = {
+ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ };
+@@ -96,7 +93,6 @@ static struct platform_device scif2_device = {
+ static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ };
+@@ -119,7 +115,6 @@ static struct platform_device scif3_device = {
+ static struct plat_sci_port scif4_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ };
+@@ -142,7 +137,6 @@ static struct platform_device scif4_device = {
+ static struct plat_sci_port scif5_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ };
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+index 6b8d0e61704c..e43e5db53913 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+@@ -26,7 +26,6 @@
+ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -48,7 +47,6 @@ static struct platform_device scif2_device = {
+ static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -70,7 +68,6 @@ static struct platform_device scif3_device = {
+ static struct plat_sci_port scif4_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+index 940505cec66f..5eebbd7f4c21 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+@@ -21,7 +21,6 @@
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -44,7 +43,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -67,7 +65,6 @@ static struct platform_device scif1_device = {
+ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+index f9c04dee4e82..e1ba8cb74e5a 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+@@ -18,7 +18,6 @@
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -40,7 +39,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -62,7 +60,6 @@ static struct platform_device scif1_device = {
+ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -84,7 +81,6 @@ static struct platform_device scif2_device = {
+ static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -106,7 +102,6 @@ static struct platform_device scif3_device = {
+ static struct plat_sci_port scif4_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -128,7 +123,6 @@ static struct platform_device scif4_device = {
+ static struct plat_sci_port scif5_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -150,7 +144,6 @@ static struct platform_device scif5_device = {
+ static struct plat_sci_port scif6_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -172,7 +165,6 @@ static struct platform_device scif6_device = {
+ static struct plat_sci_port scif7_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -194,7 +186,6 @@ static struct platform_device scif7_device = {
+ static struct plat_sci_port scif8_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -216,7 +207,6 @@ static struct platform_device scif8_device = {
+ static struct plat_sci_port scif9_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+index 227f8f4080fa..668e54bafa86 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+@@ -20,7 +20,6 @@
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -43,7 +42,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -419,9 +417,7 @@ void __init plat_early_device_setup(void)
+ {
+ if (mach_is_sh2007()) {
+ scif0_platform_data.scscr &= ~SCSCR_CKE1;
+- scif0_platform_data.scbrr_algo_id = SCBRR_ALGO_2;
+ scif1_platform_data.scscr &= ~SCSCR_CKE1;
+- scif1_platform_data.scbrr_algo_id = SCBRR_ALGO_2;
+ }
+
+ early_platform_add_devices(sh7780_early_devices,
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+index b9f64c1ee895..4aa679140209 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+@@ -22,7 +22,6 @@
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -45,7 +44,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -68,7 +66,6 @@ static struct platform_device scif1_device = {
+ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -91,7 +88,6 @@ static struct platform_device scif2_device = {
+ static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -114,7 +110,6 @@ static struct platform_device scif3_device = {
+ static struct plat_sci_port scif4_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -137,7 +132,6 @@ static struct platform_device scif4_device = {
+ static struct plat_sci_port scif5_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+index 92b95ceabd6e..5d619a551a3b 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+@@ -30,7 +30,6 @@
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -59,7 +58,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -91,7 +89,6 @@ static struct platform_device scif1_device = {
+ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -114,7 +111,6 @@ static struct platform_device scif2_device = {
+ static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -137,7 +133,6 @@ static struct platform_device scif3_device = {
+ static struct plat_sci_port scif4_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+@@ -160,7 +155,6 @@ static struct platform_device scif4_device = {
+ static struct plat_sci_port scif5_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_1,
+ .type = PORT_SCIF,
+ .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
+ };
+diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+index 4d65be9be001..0856bcbb1da0 100644
+--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
++++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+@@ -30,7 +30,6 @@
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -55,7 +54,6 @@ static struct platform_device scif0_device = {
+ static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+@@ -80,7 +78,6 @@ static struct platform_device scif1_device = {
+ static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c
+index 64b098162c98..14d68213d16b 100644
+--- a/arch/sh/kernel/cpu/sh5/setup-sh5.c
++++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c
+@@ -19,7 +19,6 @@
+ static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+ .type = PORT_SCIF,
+ };
+
+--
+1.8.5.rc3
+
--- /dev/null
+From ba3dd89b70628181fb43e36b802f6458622062c5 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 4 Dec 2013 21:05:46 +0900
+Subject: irqchip: renesas-irqc: Use lazy disable
+
+Set the ->irq_enable() and ->irq_disable() methods to NULL
+to enable lazy disable of interrupts. This by itself provides
+some level of optimization, but is mainly enabled as ground
+work for future Suspend-to-RAM wake up support.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 272012d0f748de2e4d2428f5cb7003280032ce08)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/irqchip/irq-renesas-irqc.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/drivers/irqchip/irq-renesas-irqc.c b/drivers/irqchip/irq-renesas-irqc.c
+index 2f404ba61c6c..8fdd7d68cd00 100644
+--- a/drivers/irqchip/irq-renesas-irqc.c
++++ b/drivers/irqchip/irq-renesas-irqc.c
+@@ -212,8 +212,6 @@ static int irqc_probe(struct platform_device *pdev)
+ irq_chip->name = name;
+ irq_chip->irq_mask = irqc_irq_disable;
+ irq_chip->irq_unmask = irqc_irq_enable;
+- irq_chip->irq_enable = irqc_irq_enable;
+- irq_chip->irq_disable = irqc_irq_disable;
+ irq_chip->irq_set_type = irqc_irq_set_type;
+ irq_chip->flags = IRQCHIP_SKIP_SET_WAKE;
+
+--
+1.8.5.rc3
+
--- /dev/null
+From c8888d9cc8ccd10779c785f35b3f1127db8c611f Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 4 Dec 2013 21:05:56 +0900
+Subject: irqchip: renesas-irqc: Enable mask on suspend
+
+Now when lazy interrupt disable has been enabled in the driver
+then extend the code to set IRQCHIP_MASK_ON_SUSPEND which tells
+the core that only IRQs marked as wakeups need to stay enabled
+during Suspend-to-RAM.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6a7e3b3007b5396a9e812ca0ceddc7915f8768dd)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/irqchip/irq-renesas-irqc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/irqchip/irq-renesas-irqc.c b/drivers/irqchip/irq-renesas-irqc.c
+index 8fdd7d68cd00..082d95cb5528 100644
+--- a/drivers/irqchip/irq-renesas-irqc.c
++++ b/drivers/irqchip/irq-renesas-irqc.c
+@@ -213,7 +213,7 @@ static int irqc_probe(struct platform_device *pdev)
+ irq_chip->irq_mask = irqc_irq_disable;
+ irq_chip->irq_unmask = irqc_irq_enable;
+ irq_chip->irq_set_type = irqc_irq_set_type;
+- irq_chip->flags = IRQCHIP_SKIP_SET_WAKE;
++ irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
+
+ p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
+ p->number_of_irqs,
+--
+1.8.5.rc3
+
--- /dev/null
+From 5ae5bb067186f8c29c8ef2a45418a68def37c347 Mon Sep 17 00:00:00 2001
+From: Gerhard Sittig <gsi@denx.de>
+Date: Mon, 22 Jul 2013 14:14:40 +0200
+Subject: clk: wrap I/O access for improved portability
+
+the common clock drivers were motivated/initiated by ARM development
+and apparently assume little endian peripherals
+
+wrap register/peripherals access in the common code (div, gate, mux)
+in preparation of adding COMMON_CLK support for other platforms
+
+Signed-off-by: Gerhard Sittig <gsi@denx.de>
+Signed-off-by: Mike Turquette <mturquette@linaro.org>
+(cherry picked from commit aa514ce34b65e3dc01f95a0b470b39bbb7e09998)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ drivers/clk/clk-divider.c
+ drivers/clk/clk-gate.c
+ drivers/clk/clk-mux.c
+ include/linux/clk-provider.h
+---
+ include/linux/clk-provider.h | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
+index 11860985fecb..67edd5f448df 100644
+--- a/include/linux/clk-provider.h
++++ b/include/linux/clk-provider.h
+@@ -12,6 +12,7 @@
+ #define __LINUX_CLK_PROVIDER_H
+
+ #include <linux/clk.h>
++#include <linux/io.h>
+
+ #ifdef CONFIG_COMMON_CLK
+
+@@ -444,5 +445,20 @@ void of_clk_init(const struct of_device_id *matches);
+ __used __section(__clk_of_table) \
+ = { .compatible = compat, .data = fn };
+
++/*
++ * wrap access to peripherals in accessor routines
++ * for improved portability across platforms
++ */
++
++static inline u32 clk_readl(u32 __iomem *reg)
++{
++ return readl(reg);
++}
++
++static inline void clk_writel(u32 val, u32 __iomem *reg)
++{
++ writel(val, reg);
++}
++
+ #endif /* CONFIG_COMMON_CLK */
+ #endif /* CLK_PROVIDER_H */
+--
+1.8.5.rc3
+
--- /dev/null
+From ea4c177515a5ea03ba2d823a88bcd4e32369946c Mon Sep 17 00:00:00 2001
+From: Laxman Dewangan <ldewangan@nvidia.com>
+Date: Tue, 6 Aug 2013 19:42:49 +0530
+Subject: include: dt-binding: input: create a DT header defining key codes.
+
+Many of Key device tree bindings uses the constant number as key code
+which matches with kernel header key code and then comment as follows
+for reference/better readability:
+ linux,code = <102>; /* KEY_HOME */
+
+Create a DT header which defines all the key code so that DT key bindings
+can use it as follows:
+ linux,code = <KEY_HOME>;
+
+Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
+Reviewed-by: Stephen Warren <swarren@nvidia.com>
+Signed-off-by: Rob Herring <rob.herring@calxeda.com>
+(cherry picked from commit 8851b9f1625ce0858e9b1bb0ae4a57d4b43178b1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/dt-bindings/input/input.h | 525 ++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 525 insertions(+)
+ create mode 100644 include/dt-bindings/input/input.h
+
+diff --git a/include/dt-bindings/input/input.h b/include/dt-bindings/input/input.h
+new file mode 100644
+index 000000000000..042e7b3b6296
+--- /dev/null
++++ b/include/dt-bindings/input/input.h
+@@ -0,0 +1,525 @@
++/*
++ * This header provides constants for most input bindings.
++ *
++ * Most input bindings include key code, matrix key code format.
++ * In most cases, key code and matrix key code format uses
++ * the standard values/macro defined in this header.
++ */
++
++#ifndef _DT_BINDINGS_INPUT_INPUT_H
++#define _DT_BINDINGS_INPUT_INPUT_H
++
++#define KEY_RESERVED 0
++#define KEY_ESC 1
++#define KEY_1 2
++#define KEY_2 3
++#define KEY_3 4
++#define KEY_4 5
++#define KEY_5 6
++#define KEY_6 7
++#define KEY_7 8
++#define KEY_8 9
++#define KEY_9 10
++#define KEY_0 11
++#define KEY_MINUS 12
++#define KEY_EQUAL 13
++#define KEY_BACKSPACE 14
++#define KEY_TAB 15
++#define KEY_Q 16
++#define KEY_W 17
++#define KEY_E 18
++#define KEY_R 19
++#define KEY_T 20
++#define KEY_Y 21
++#define KEY_U 22
++#define KEY_I 23
++#define KEY_O 24
++#define KEY_P 25
++#define KEY_LEFTBRACE 26
++#define KEY_RIGHTBRACE 27
++#define KEY_ENTER 28
++#define KEY_LEFTCTRL 29
++#define KEY_A 30
++#define KEY_S 31
++#define KEY_D 32
++#define KEY_F 33
++#define KEY_G 34
++#define KEY_H 35
++#define KEY_J 36
++#define KEY_K 37
++#define KEY_L 38
++#define KEY_SEMICOLON 39
++#define KEY_APOSTROPHE 40
++#define KEY_GRAVE 41
++#define KEY_LEFTSHIFT 42
++#define KEY_BACKSLASH 43
++#define KEY_Z 44
++#define KEY_X 45
++#define KEY_C 46
++#define KEY_V 47
++#define KEY_B 48
++#define KEY_N 49
++#define KEY_M 50
++#define KEY_COMMA 51
++#define KEY_DOT 52
++#define KEY_SLASH 53
++#define KEY_RIGHTSHIFT 54
++#define KEY_KPASTERISK 55
++#define KEY_LEFTALT 56
++#define KEY_SPACE 57
++#define KEY_CAPSLOCK 58
++#define KEY_F1 59
++#define KEY_F2 60
++#define KEY_F3 61
++#define KEY_F4 62
++#define KEY_F5 63
++#define KEY_F6 64
++#define KEY_F7 65
++#define KEY_F8 66
++#define KEY_F9 67
++#define KEY_F10 68
++#define KEY_NUMLOCK 69
++#define KEY_SCROLLLOCK 70
++#define KEY_KP7 71
++#define KEY_KP8 72
++#define KEY_KP9 73
++#define KEY_KPMINUS 74
++#define KEY_KP4 75
++#define KEY_KP5 76
++#define KEY_KP6 77
++#define KEY_KPPLUS 78
++#define KEY_KP1 79
++#define KEY_KP2 80
++#define KEY_KP3 81
++#define KEY_KP0 82
++#define KEY_KPDOT 83
++
++#define KEY_ZENKAKUHANKAKU 85
++#define KEY_102ND 86
++#define KEY_F11 87
++#define KEY_F12 88
++#define KEY_RO 89
++#define KEY_KATAKANA 90
++#define KEY_HIRAGANA 91
++#define KEY_HENKAN 92
++#define KEY_KATAKANAHIRAGANA 93
++#define KEY_MUHENKAN 94
++#define KEY_KPJPCOMMA 95
++#define KEY_KPENTER 96
++#define KEY_RIGHTCTRL 97
++#define KEY_KPSLASH 98
++#define KEY_SYSRQ 99
++#define KEY_RIGHTALT 100
++#define KEY_LINEFEED 101
++#define KEY_HOME 102
++#define KEY_UP 103
++#define KEY_PAGEUP 104
++#define KEY_LEFT 105
++#define KEY_RIGHT 106
++#define KEY_END 107
++#define KEY_DOWN 108
++#define KEY_PAGEDOWN 109
++#define KEY_INSERT 110
++#define KEY_DELETE 111
++#define KEY_MACRO 112
++#define KEY_MUTE 113
++#define KEY_VOLUMEDOWN 114
++#define KEY_VOLUMEUP 115
++#define KEY_POWER 116 /* SC System Power Down */
++#define KEY_KPEQUAL 117
++#define KEY_KPPLUSMINUS 118
++#define KEY_PAUSE 119
++#define KEY_SCALE 120 /* AL Compiz Scale (Expose) */
++
++#define KEY_KPCOMMA 121
++#define KEY_HANGEUL 122
++#define KEY_HANGUEL KEY_HANGEUL
++#define KEY_HANJA 123
++#define KEY_YEN 124
++#define KEY_LEFTMETA 125
++#define KEY_RIGHTMETA 126
++#define KEY_COMPOSE 127
++
++#define KEY_STOP 128 /* AC Stop */
++#define KEY_AGAIN 129
++#define KEY_PROPS 130 /* AC Properties */
++#define KEY_UNDO 131 /* AC Undo */
++#define KEY_FRONT 132
++#define KEY_COPY 133 /* AC Copy */
++#define KEY_OPEN 134 /* AC Open */
++#define KEY_PASTE 135 /* AC Paste */
++#define KEY_FIND 136 /* AC Search */
++#define KEY_CUT 137 /* AC Cut */
++#define KEY_HELP 138 /* AL Integrated Help Center */
++#define KEY_MENU 139 /* Menu (show menu) */
++#define KEY_CALC 140 /* AL Calculator */
++#define KEY_SETUP 141
++#define KEY_SLEEP 142 /* SC System Sleep */
++#define KEY_WAKEUP 143 /* System Wake Up */
++#define KEY_FILE 144 /* AL Local Machine Browser */
++#define KEY_SENDFILE 145
++#define KEY_DELETEFILE 146
++#define KEY_XFER 147
++#define KEY_PROG1 148
++#define KEY_PROG2 149
++#define KEY_WWW 150 /* AL Internet Browser */
++#define KEY_MSDOS 151
++#define KEY_COFFEE 152 /* AL Terminal Lock/Screensaver */
++#define KEY_SCREENLOCK KEY_COFFEE
++#define KEY_DIRECTION 153
++#define KEY_CYCLEWINDOWS 154
++#define KEY_MAIL 155
++#define KEY_BOOKMARKS 156 /* AC Bookmarks */
++#define KEY_COMPUTER 157
++#define KEY_BACK 158 /* AC Back */
++#define KEY_FORWARD 159 /* AC Forward */
++#define KEY_CLOSECD 160
++#define KEY_EJECTCD 161
++#define KEY_EJECTCLOSECD 162
++#define KEY_NEXTSONG 163
++#define KEY_PLAYPAUSE 164
++#define KEY_PREVIOUSSONG 165
++#define KEY_STOPCD 166
++#define KEY_RECORD 167
++#define KEY_REWIND 168
++#define KEY_PHONE 169 /* Media Select Telephone */
++#define KEY_ISO 170
++#define KEY_CONFIG 171 /* AL Consumer Control Configuration */
++#define KEY_HOMEPAGE 172 /* AC Home */
++#define KEY_REFRESH 173 /* AC Refresh */
++#define KEY_EXIT 174 /* AC Exit */
++#define KEY_MOVE 175
++#define KEY_EDIT 176
++#define KEY_SCROLLUP 177
++#define KEY_SCROLLDOWN 178
++#define KEY_KPLEFTPAREN 179
++#define KEY_KPRIGHTPAREN 180
++#define KEY_NEW 181 /* AC New */
++#define KEY_REDO 182 /* AC Redo/Repeat */
++
++#define KEY_F13 183
++#define KEY_F14 184
++#define KEY_F15 185
++#define KEY_F16 186
++#define KEY_F17 187
++#define KEY_F18 188
++#define KEY_F19 189
++#define KEY_F20 190
++#define KEY_F21 191
++#define KEY_F22 192
++#define KEY_F23 193
++#define KEY_F24 194
++
++#define KEY_PLAYCD 200
++#define KEY_PAUSECD 201
++#define KEY_PROG3 202
++#define KEY_PROG4 203
++#define KEY_DASHBOARD 204 /* AL Dashboard */
++#define KEY_SUSPEND 205
++#define KEY_CLOSE 206 /* AC Close */
++#define KEY_PLAY 207
++#define KEY_FASTFORWARD 208
++#define KEY_BASSBOOST 209
++#define KEY_PRINT 210 /* AC Print */
++#define KEY_HP 211
++#define KEY_CAMERA 212
++#define KEY_SOUND 213
++#define KEY_QUESTION 214
++#define KEY_EMAIL 215
++#define KEY_CHAT 216
++#define KEY_SEARCH 217
++#define KEY_CONNECT 218
++#define KEY_FINANCE 219 /* AL Checkbook/Finance */
++#define KEY_SPORT 220
++#define KEY_SHOP 221
++#define KEY_ALTERASE 222
++#define KEY_CANCEL 223 /* AC Cancel */
++#define KEY_BRIGHTNESSDOWN 224
++#define KEY_BRIGHTNESSUP 225
++#define KEY_MEDIA 226
++
++#define KEY_SWITCHVIDEOMODE 227 /* Cycle between available video
++ outputs (Monitor/LCD/TV-out/etc) */
++#define KEY_KBDILLUMTOGGLE 228
++#define KEY_KBDILLUMDOWN 229
++#define KEY_KBDILLUMUP 230
++
++#define KEY_SEND 231 /* AC Send */
++#define KEY_REPLY 232 /* AC Reply */
++#define KEY_FORWARDMAIL 233 /* AC Forward Msg */
++#define KEY_SAVE 234 /* AC Save */
++#define KEY_DOCUMENTS 235
++
++#define KEY_BATTERY 236
++
++#define KEY_BLUETOOTH 237
++#define KEY_WLAN 238
++#define KEY_UWB 239
++
++#define KEY_UNKNOWN 240
++
++#define KEY_VIDEO_NEXT 241 /* drive next video source */
++#define KEY_VIDEO_PREV 242 /* drive previous video source */
++#define KEY_BRIGHTNESS_CYCLE 243 /* brightness up, after max is min */
++#define KEY_BRIGHTNESS_ZERO 244 /* brightness off, use ambient */
++#define KEY_DISPLAY_OFF 245 /* display device to off state */
++
++#define KEY_WIMAX 246
++#define KEY_RFKILL 247 /* Key that controls all radios */
++
++#define KEY_MICMUTE 248 /* Mute / unmute the microphone */
++
++/* Code 255 is reserved for special needs of AT keyboard driver */
++
++#define BTN_MISC 0x100
++#define BTN_0 0x100
++#define BTN_1 0x101
++#define BTN_2 0x102
++#define BTN_3 0x103
++#define BTN_4 0x104
++#define BTN_5 0x105
++#define BTN_6 0x106
++#define BTN_7 0x107
++#define BTN_8 0x108
++#define BTN_9 0x109
++
++#define BTN_MOUSE 0x110
++#define BTN_LEFT 0x110
++#define BTN_RIGHT 0x111
++#define BTN_MIDDLE 0x112
++#define BTN_SIDE 0x113
++#define BTN_EXTRA 0x114
++#define BTN_FORWARD 0x115
++#define BTN_BACK 0x116
++#define BTN_TASK 0x117
++
++#define BTN_JOYSTICK 0x120
++#define BTN_TRIGGER 0x120
++#define BTN_THUMB 0x121
++#define BTN_THUMB2 0x122
++#define BTN_TOP 0x123
++#define BTN_TOP2 0x124
++#define BTN_PINKIE 0x125
++#define BTN_BASE 0x126
++#define BTN_BASE2 0x127
++#define BTN_BASE3 0x128
++#define BTN_BASE4 0x129
++#define BTN_BASE5 0x12a
++#define BTN_BASE6 0x12b
++#define BTN_DEAD 0x12f
++
++#define BTN_GAMEPAD 0x130
++#define BTN_SOUTH 0x130
++#define BTN_A BTN_SOUTH
++#define BTN_EAST 0x131
++#define BTN_B BTN_EAST
++#define BTN_C 0x132
++#define BTN_NORTH 0x133
++#define BTN_X BTN_NORTH
++#define BTN_WEST 0x134
++#define BTN_Y BTN_WEST
++#define BTN_Z 0x135
++#define BTN_TL 0x136
++#define BTN_TR 0x137
++#define BTN_TL2 0x138
++#define BTN_TR2 0x139
++#define BTN_SELECT 0x13a
++#define BTN_START 0x13b
++#define BTN_MODE 0x13c
++#define BTN_THUMBL 0x13d
++#define BTN_THUMBR 0x13e
++
++#define BTN_DIGI 0x140
++#define BTN_TOOL_PEN 0x140
++#define BTN_TOOL_RUBBER 0x141
++#define BTN_TOOL_BRUSH 0x142
++#define BTN_TOOL_PENCIL 0x143
++#define BTN_TOOL_AIRBRUSH 0x144
++#define BTN_TOOL_FINGER 0x145
++#define BTN_TOOL_MOUSE 0x146
++#define BTN_TOOL_LENS 0x147
++#define BTN_TOOL_QUINTTAP 0x148 /* Five fingers on trackpad */
++#define BTN_TOUCH 0x14a
++#define BTN_STYLUS 0x14b
++#define BTN_STYLUS2 0x14c
++#define BTN_TOOL_DOUBLETAP 0x14d
++#define BTN_TOOL_TRIPLETAP 0x14e
++#define BTN_TOOL_QUADTAP 0x14f /* Four fingers on trackpad */
++
++#define BTN_WHEEL 0x150
++#define BTN_GEAR_DOWN 0x150
++#define BTN_GEAR_UP 0x151
++
++#define KEY_OK 0x160
++#define KEY_SELECT 0x161
++#define KEY_GOTO 0x162
++#define KEY_CLEAR 0x163
++#define KEY_POWER2 0x164
++#define KEY_OPTION 0x165
++#define KEY_INFO 0x166 /* AL OEM Features/Tips/Tutorial */
++#define KEY_TIME 0x167
++#define KEY_VENDOR 0x168
++#define KEY_ARCHIVE 0x169
++#define KEY_PROGRAM 0x16a /* Media Select Program Guide */
++#define KEY_CHANNEL 0x16b
++#define KEY_FAVORITES 0x16c
++#define KEY_EPG 0x16d
++#define KEY_PVR 0x16e /* Media Select Home */
++#define KEY_MHP 0x16f
++#define KEY_LANGUAGE 0x170
++#define KEY_TITLE 0x171
++#define KEY_SUBTITLE 0x172
++#define KEY_ANGLE 0x173
++#define KEY_ZOOM 0x174
++#define KEY_MODE 0x175
++#define KEY_KEYBOARD 0x176
++#define KEY_SCREEN 0x177
++#define KEY_PC 0x178 /* Media Select Computer */
++#define KEY_TV 0x179 /* Media Select TV */
++#define KEY_TV2 0x17a /* Media Select Cable */
++#define KEY_VCR 0x17b /* Media Select VCR */
++#define KEY_VCR2 0x17c /* VCR Plus */
++#define KEY_SAT 0x17d /* Media Select Satellite */
++#define KEY_SAT2 0x17e
++#define KEY_CD 0x17f /* Media Select CD */
++#define KEY_TAPE 0x180 /* Media Select Tape */
++#define KEY_RADIO 0x181
++#define KEY_TUNER 0x182 /* Media Select Tuner */
++#define KEY_PLAYER 0x183
++#define KEY_TEXT 0x184
++#define KEY_DVD 0x185 /* Media Select DVD */
++#define KEY_AUX 0x186
++#define KEY_MP3 0x187
++#define KEY_AUDIO 0x188 /* AL Audio Browser */
++#define KEY_VIDEO 0x189 /* AL Movie Browser */
++#define KEY_DIRECTORY 0x18a
++#define KEY_LIST 0x18b
++#define KEY_MEMO 0x18c /* Media Select Messages */
++#define KEY_CALENDAR 0x18d
++#define KEY_RED 0x18e
++#define KEY_GREEN 0x18f
++#define KEY_YELLOW 0x190
++#define KEY_BLUE 0x191
++#define KEY_CHANNELUP 0x192 /* Channel Increment */
++#define KEY_CHANNELDOWN 0x193 /* Channel Decrement */
++#define KEY_FIRST 0x194
++#define KEY_LAST 0x195 /* Recall Last */
++#define KEY_AB 0x196
++#define KEY_NEXT 0x197
++#define KEY_RESTART 0x198
++#define KEY_SLOW 0x199
++#define KEY_SHUFFLE 0x19a
++#define KEY_BREAK 0x19b
++#define KEY_PREVIOUS 0x19c
++#define KEY_DIGITS 0x19d
++#define KEY_TEEN 0x19e
++#define KEY_TWEN 0x19f
++#define KEY_VIDEOPHONE 0x1a0 /* Media Select Video Phone */
++#define KEY_GAMES 0x1a1 /* Media Select Games */
++#define KEY_ZOOMIN 0x1a2 /* AC Zoom In */
++#define KEY_ZOOMOUT 0x1a3 /* AC Zoom Out */
++#define KEY_ZOOMRESET 0x1a4 /* AC Zoom */
++#define KEY_WORDPROCESSOR 0x1a5 /* AL Word Processor */
++#define KEY_EDITOR 0x1a6 /* AL Text Editor */
++#define KEY_SPREADSHEET 0x1a7 /* AL Spreadsheet */
++#define KEY_GRAPHICSEDITOR 0x1a8 /* AL Graphics Editor */
++#define KEY_PRESENTATION 0x1a9 /* AL Presentation App */
++#define KEY_DATABASE 0x1aa /* AL Database App */
++#define KEY_NEWS 0x1ab /* AL Newsreader */
++#define KEY_VOICEMAIL 0x1ac /* AL Voicemail */
++#define KEY_ADDRESSBOOK 0x1ad /* AL Contacts/Address Book */
++#define KEY_MESSENGER 0x1ae /* AL Instant Messaging */
++#define KEY_DISPLAYTOGGLE 0x1af /* Turn display (LCD) on and off */
++#define KEY_SPELLCHECK 0x1b0 /* AL Spell Check */
++#define KEY_LOGOFF 0x1b1 /* AL Logoff */
++
++#define KEY_DOLLAR 0x1b2
++#define KEY_EURO 0x1b3
++
++#define KEY_FRAMEBACK 0x1b4 /* Consumer - transport controls */
++#define KEY_FRAMEFORWARD 0x1b5
++#define KEY_CONTEXT_MENU 0x1b6 /* GenDesc - system context menu */
++#define KEY_MEDIA_REPEAT 0x1b7 /* Consumer - transport control */
++#define KEY_10CHANNELSUP 0x1b8 /* 10 channels up (10+) */
++#define KEY_10CHANNELSDOWN 0x1b9 /* 10 channels down (10-) */
++#define KEY_IMAGES 0x1ba /* AL Image Browser */
++
++#define KEY_DEL_EOL 0x1c0
++#define KEY_DEL_EOS 0x1c1
++#define KEY_INS_LINE 0x1c2
++#define KEY_DEL_LINE 0x1c3
++
++#define KEY_FN 0x1d0
++#define KEY_FN_ESC 0x1d1
++#define KEY_FN_F1 0x1d2
++#define KEY_FN_F2 0x1d3
++#define KEY_FN_F3 0x1d4
++#define KEY_FN_F4 0x1d5
++#define KEY_FN_F5 0x1d6
++#define KEY_FN_F6 0x1d7
++#define KEY_FN_F7 0x1d8
++#define KEY_FN_F8 0x1d9
++#define KEY_FN_F9 0x1da
++#define KEY_FN_F10 0x1db
++#define KEY_FN_F11 0x1dc
++#define KEY_FN_F12 0x1dd
++#define KEY_FN_1 0x1de
++#define KEY_FN_2 0x1df
++#define KEY_FN_D 0x1e0
++#define KEY_FN_E 0x1e1
++#define KEY_FN_F 0x1e2
++#define KEY_FN_S 0x1e3
++#define KEY_FN_B 0x1e4
++
++#define KEY_BRL_DOT1 0x1f1
++#define KEY_BRL_DOT2 0x1f2
++#define KEY_BRL_DOT3 0x1f3
++#define KEY_BRL_DOT4 0x1f4
++#define KEY_BRL_DOT5 0x1f5
++#define KEY_BRL_DOT6 0x1f6
++#define KEY_BRL_DOT7 0x1f7
++#define KEY_BRL_DOT8 0x1f8
++#define KEY_BRL_DOT9 0x1f9
++#define KEY_BRL_DOT10 0x1fa
++
++#define KEY_NUMERIC_0 0x200 /* used by phones, remote controls, */
++#define KEY_NUMERIC_1 0x201 /* and other keypads */
++#define KEY_NUMERIC_2 0x202
++#define KEY_NUMERIC_3 0x203
++#define KEY_NUMERIC_4 0x204
++#define KEY_NUMERIC_5 0x205
++#define KEY_NUMERIC_6 0x206
++#define KEY_NUMERIC_7 0x207
++#define KEY_NUMERIC_8 0x208
++#define KEY_NUMERIC_9 0x209
++#define KEY_NUMERIC_STAR 0x20a
++#define KEY_NUMERIC_POUND 0x20b
++
++#define KEY_CAMERA_FOCUS 0x210
++#define KEY_WPS_BUTTON 0x211 /* WiFi Protected Setup key */
++
++#define KEY_TOUCHPAD_TOGGLE 0x212 /* Request switch touchpad on or off */
++#define KEY_TOUCHPAD_ON 0x213
++#define KEY_TOUCHPAD_OFF 0x214
++
++#define KEY_CAMERA_ZOOMIN 0x215
++#define KEY_CAMERA_ZOOMOUT 0x216
++#define KEY_CAMERA_UP 0x217
++#define KEY_CAMERA_DOWN 0x218
++#define KEY_CAMERA_LEFT 0x219
++#define KEY_CAMERA_RIGHT 0x21a
++
++#define KEY_ATTENDANT_ON 0x21b
++#define KEY_ATTENDANT_OFF 0x21c
++#define KEY_ATTENDANT_TOGGLE 0x21d /* Attendant call on or off */
++#define KEY_LIGHTS_TOGGLE 0x21e /* Reading light on or off */
++
++#define BTN_DPAD_UP 0x220
++#define BTN_DPAD_DOWN 0x221
++#define BTN_DPAD_LEFT 0x222
++#define BTN_DPAD_RIGHT 0x223
++
++#define MATRIX_KEY(row, col, code) \
++ ((((row) & 0xFF) << 24) | (((col) & 0xFF) << 16) | ((code) & 0xFFFF))
++
++#endif /* _DT_BINDINGS_INPUT_INPUT_H */
+--
+1.8.5.rc3
+
--- /dev/null
+From 21dfa652bafb9328887b254a9ff78f0d3c3efc74 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 2 Oct 2013 15:06:25 +0900
+Subject: ARM: shmobile: Genmai defconfig
+
+Add a defconfig for the Genmai board. In the future this board will
+use a shared defconfig for multiplatform, but until CCF is implemented
+this will be used.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a6b1135265e9aa28f3860337413eb5011acf9528)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/genmai_defconfig | 116 ++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 116 insertions(+)
+ create mode 100644 arch/arm/configs/genmai_defconfig
+
+diff --git a/arch/arm/configs/genmai_defconfig b/arch/arm/configs/genmai_defconfig
+new file mode 100644
+index 000000000000..69b1531a4c80
+--- /dev/null
++++ b/arch/arm/configs/genmai_defconfig
+@@ -0,0 +1,116 @@
++CONFIG_SYSVIPC=y
++CONFIG_NO_HZ=y
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_LOG_BUF_SHIFT=16
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_EMBEDDED=y
++CONFIG_PERF_EVENTS=y
++CONFIG_SLAB=y
++# CONFIG_LBDAF is not set
++# CONFIG_BLK_DEV_BSG is not set
++# CONFIG_IOSCHED_DEADLINE is not set
++# CONFIG_IOSCHED_CFQ is not set
++CONFIG_ARCH_SHMOBILE=y
++CONFIG_ARCH_R7S72100=y
++CONFIG_MACH_GENMAI=y
++# CONFIG_SH_TIMER_CMT is not set
++# CONFIG_SH_TIMER_MTU2 is not set
++# CONFIG_SH_TIMER_TMU is not set
++# CONFIG_EM_TIMER_STI is not set
++CONFIG_ARM_ERRATA_430973=y
++CONFIG_ARM_ERRATA_458693=y
++CONFIG_ARM_ERRATA_460075=y
++CONFIG_ARM_ERRATA_743622=y
++CONFIG_ARM_ERRATA_754322=y
++CONFIG_AEABI=y
++# CONFIG_OABI_COMPAT is not set
++CONFIG_FORCE_MAX_ZONEORDER=13
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_ARM_APPENDED_DTB=y
++CONFIG_KEXEC=y
++CONFIG_AUTO_ZRELADDR=y
++CONFIG_VFP=y
++CONFIG_NEON=y
++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
++CONFIG_PM_RUNTIME=y
++CONFIG_NET=y
++CONFIG_PACKET=y
++CONFIG_UNIX=y
++CONFIG_INET=y
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_WIRELESS is not set
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_NETDEVICES=y
++# CONFIG_NET_CORE is not set
++# CONFIG_NET_VENDOR_ARC is not set
++# CONFIG_NET_CADENCE is not set
++# CONFIG_NET_VENDOR_BROADCOM is not set
++# CONFIG_NET_VENDOR_CIRRUS is not set
++# CONFIG_NET_VENDOR_FARADAY is not set
++# CONFIG_NET_VENDOR_INTEL is not set
++# CONFIG_NET_VENDOR_MARVELL is not set
++# CONFIG_NET_VENDOR_MICREL is not set
++# CONFIG_NET_VENDOR_NATSEMI is not set
++CONFIG_SH_ETH=y
++# CONFIG_NET_VENDOR_SEEQ is not set
++# CONFIG_NET_VENDOR_SMSC is not set
++# CONFIG_NET_VENDOR_STMICRO is not set
++# CONFIG_NET_VENDOR_VIA is not set
++# CONFIG_NET_VENDOR_WIZNET is not set
++# CONFIG_WLAN is not set
++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
++CONFIG_INPUT_EVDEV=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_INPUT_MOUSE is not set
++# CONFIG_SERIO is not set
++# CONFIG_LEGACY_PTYS is not set
++CONFIG_SERIAL_SH_SCI=y
++CONFIG_SERIAL_SH_SCI_NR_UARTS=10
++CONFIG_SERIAL_SH_SCI_CONSOLE=y
++# CONFIG_HW_RANDOM is not set
++CONFIG_I2C_SH_MOBILE=y
++# CONFIG_HWMON is not set
++CONFIG_THERMAL=y
++CONFIG_RCAR_THERMAL=y
++CONFIG_REGULATOR=y
++CONFIG_REGULATOR_FIXED_VOLTAGE=y
++CONFIG_DRM=y
++CONFIG_DRM_RCAR_DU=y
++# CONFIG_USB_SUPPORT is not set
++CONFIG_MMC=y
++CONFIG_MMC_SDHI=y
++CONFIG_MMC_SH_MMCIF=y
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++CONFIG_RTC_CLASS=y
++CONFIG_DMADEVICES=y
++CONFIG_SH_DMAE=y
++# CONFIG_IOMMU_SUPPORT is not set
++# CONFIG_DNOTIFY is not set
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_TMPFS=y
++CONFIG_CONFIGFS_FS=y
++# CONFIG_MISC_FILESYSTEMS is not set
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3_ACL=y
++CONFIG_NFS_V4=y
++CONFIG_NFS_V4_1=y
++CONFIG_ROOT_NFS=y
++CONFIG_NLS_CODEPAGE_437=y
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_ENABLE_WARN_DEPRECATED is not set
++# CONFIG_ENABLE_MUST_CHECK is not set
++# CONFIG_ARM_UNWIND is not set
++# CONFIG_CRYPTO_ANSI_CPRNG is not set
++# CONFIG_CRYPTO_HW is not set
+--
+1.8.5.rc3
+
--- /dev/null
+From 3ce8970280773544a3229e7e426fe85c9ede8548 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 3 Oct 2013 18:30:30 -0700
+Subject: ARM: shmobile: bockw: enable CONFIG_REGULATOR
+
+CONFIG_REGULATOR is required from MMCIF and SMSC
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 03248fde88e37b1b043b640b1bae4fb14d4d3f23)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/bockw_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
+index b38cd107f82d..6583683492bd 100644
+--- a/arch/arm/configs/bockw_defconfig
++++ b/arch/arm/configs/bockw_defconfig
+@@ -82,6 +82,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
+ # CONFIG_HWMON is not set
+ CONFIG_I2C=y
+ CONFIG_I2C_RCAR=y
++CONFIG_REGULATOR=y
+ CONFIG_MEDIA_SUPPORT=y
+ CONFIG_MEDIA_CAMERA_SUPPORT=y
+ CONFIG_V4L_PLATFORM_DRIVERS=y
+--
+1.8.5.rc3
+
--- /dev/null
+From 42a8843edd22778e4b7d145aa72d749c67b74d2b Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 10 Oct 2013 15:12:17 +0900
+Subject: ARM: shmobile: bockw: Do not set command line in defconfig
+
+As a set towards moving shmobile towards multi-platform
+the kernel command line should be set in the DTB rather than
+in the kernel config.
+
+bockw already has the command line present in its DTS file
+but it was being overrirden by the kernel config.
+
+A side effect of this change is that "rw" is now present
+on the command line which allows a boot using nfs root to
+succeed in the case where userspace expects to be able
+to write to the root filesystem.
+
+Signed-off-by: Simon Horman <horms@verge.net.au>
+(cherry picked from commit 851f0cda469fdba6371ab2e268462aeb8393f08e)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/bockw_defconfig | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
+index 6583683492bd..b35301fa9685 100644
+--- a/arch/arm/configs/bockw_defconfig
++++ b/arch/arm/configs/bockw_defconfig
+@@ -27,8 +27,6 @@ CONFIG_HIGHMEM=y
+ CONFIG_ZBOOT_ROM_TEXT=0x0
+ CONFIG_ZBOOT_ROM_BSS=0x0
+ CONFIG_ARM_APPENDED_DTB=y
+-CONFIG_CMDLINE="console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp"
+-CONFIG_CMDLINE_FORCE=y
+ # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+ # CONFIG_SUSPEND is not set
+ CONFIG_PM_RUNTIME=y
+--
+1.8.5.rc3
+
--- /dev/null
+From 14e57c4ff32b05ff4d87628e34789a022d7805b4 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 10 Oct 2013 15:12:17 +0900
+Subject: ARM: shmobile: marzen: Do not set command line in defconfig
+
+As a set towards moving shmobile towards multi-platform
+the kernel command line should be set in the DTB rather than
+in the kernel config.
+
+marzen already has the command line present in its DTS file
+but it was being overrirden by the kernel config.
+
+Signed-off-by: Simon Horman <horms@verge.net.au>
+(cherry picked from commit 7a14b78831d34b63032de1bb4d05221ed20cb0cf)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/marzen_defconfig | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
+index 5cc6360340b1..103b8755d1a6 100644
+--- a/arch/arm/configs/marzen_defconfig
++++ b/arch/arm/configs/marzen_defconfig
+@@ -30,8 +30,6 @@ CONFIG_HIGHMEM=y
+ CONFIG_ZBOOT_ROM_TEXT=0x0
+ CONFIG_ZBOOT_ROM_BSS=0x0
+ CONFIG_ARM_APPENDED_DTB=y
+-CONFIG_CMDLINE="console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on"
+-CONFIG_CMDLINE_FORCE=y
+ CONFIG_KEXEC=y
+ # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+ CONFIG_PM_RUNTIME=y
+--
+1.8.5.rc3
+
--- /dev/null
+From 307724b979f48db2c0defa1d219ac4a462e98705 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 10 Oct 2013 15:12:17 +0900
+Subject: ARM: shmobile: bockw: Do not disable CONFIG_INOTIFY_USER in defconfig
+
+CONFIG_INOTIFY_USER is required for udev to function.
+This change brings the bockw defconfig into line with
+other shmobile defconfigs.
+
+Signed-off-by: Simon Horman <horms@verge.net.au>
+(cherry picked from commit 5cff9680d4919a521d071b4cea33aad50a60fefa)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/bockw_defconfig | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
+index b35301fa9685..63e8bcd0b2be 100644
+--- a/arch/arm/configs/bockw_defconfig
++++ b/arch/arm/configs/bockw_defconfig
+@@ -111,7 +111,6 @@ CONFIG_UIO=y
+ CONFIG_UIO_PDRV_GENIRQ=y
+ # CONFIG_IOMMU_SUPPORT is not set
+ # CONFIG_DNOTIFY is not set
+-# CONFIG_INOTIFY_USER is not set
+ CONFIG_TMPFS=y
+ # CONFIG_MISC_FILESYSTEMS is not set
+ CONFIG_NFS_FS=y
+--
+1.8.5.rc3
+
--- /dev/null
+From 3bf7274e18622f74a7eccf202060d6645d26eb2f Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 10 Oct 2013 15:12:17 +0900
+Subject: ARM: shmobile: marzen: Do not disable CONFIG_INOTIFY_USER in
+ defconfig
+
+CONFIG_INOTIFY_USER is required for udev to function.
+This change brings the marzen defconfig into line with
+other shmobile defconfigs.
+
+Signed-off-by: Simon Horman <horms@verge.net.au>
+(cherry picked from commit 96ffa476493d90f2c0583ed90640acc9ef9fff06)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/marzen_defconfig | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
+index 103b8755d1a6..ebaaeada733d 100644
+--- a/arch/arm/configs/marzen_defconfig
++++ b/arch/arm/configs/marzen_defconfig
+@@ -108,7 +108,6 @@ CONFIG_UIO=y
+ CONFIG_UIO_PDRV_GENIRQ=y
+ # CONFIG_IOMMU_SUPPORT is not set
+ # CONFIG_DNOTIFY is not set
+-# CONFIG_INOTIFY_USER is not set
+ CONFIG_TMPFS=y
+ # CONFIG_MISC_FILESYSTEMS is not set
+ CONFIG_NFS_FS=y
+--
+1.8.5.rc3
+
--- /dev/null
+From 27744dddf8d85429f86d0bde88225b5364a52132 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 10 Oct 2013 15:12:17 +0900
+Subject: ARM: shmobile: bockw: Enable CONFIG_VFP in defconfig
+
+CONFIG_VFP is required to boot into a Debian armhf user-space.
+This change brings the bockw defconfig into line with
+other shmobile defconfigs.
+
+Signed-off-by: Simon Horman <horms@verge.net.au>
+(cherry picked from commit 5a14cbb732a6a4eff2a0be59deba6fdb890253b8)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/bockw_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
+index 63e8bcd0b2be..8b5866e6292d 100644
+--- a/arch/arm/configs/bockw_defconfig
++++ b/arch/arm/configs/bockw_defconfig
+@@ -27,6 +27,7 @@ CONFIG_HIGHMEM=y
+ CONFIG_ZBOOT_ROM_TEXT=0x0
+ CONFIG_ZBOOT_ROM_BSS=0x0
+ CONFIG_ARM_APPENDED_DTB=y
++CONFIG_VFP=y
+ # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+ # CONFIG_SUSPEND is not set
+ CONFIG_PM_RUNTIME=y
+--
+1.8.5.rc3
+
--- /dev/null
+From c8b11537d271467b715f7537f3b0cd38f2b2684c Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 10 Oct 2013 15:12:17 +0900
+Subject: ARM: shmobile: marzen: Enable CONFIG_VFP in defconfig
+
+CONFIG_VFP is required to boot into a Debian armhf user-space.
+This change brings the marzen defconfig into line with
+other shmobile defconfigs.
+
+Signed-off-by: Simon Horman <horms@verge.net.au>
+(cherry picked from commit 8f1c35732942035ea9bfff6d6848490b0131d140)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/marzen_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
+index ebaaeada733d..39e2dfebcf50 100644
+--- a/arch/arm/configs/marzen_defconfig
++++ b/arch/arm/configs/marzen_defconfig
+@@ -30,6 +30,7 @@ CONFIG_HIGHMEM=y
+ CONFIG_ZBOOT_ROM_TEXT=0x0
+ CONFIG_ZBOOT_ROM_BSS=0x0
+ CONFIG_ARM_APPENDED_DTB=y
++CONFIG_VFP=y
+ CONFIG_KEXEC=y
+ # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+ CONFIG_PM_RUNTIME=y
+--
+1.8.5.rc3
+
--- /dev/null
+From aacd944580c5a453bee70159754047870733ef02 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 10 Oct 2013 15:12:17 +0900
+Subject: ARM: shmobile: bockw: Do not enable CONFIG_DEVTMPFS defconfig
+
+This change brings the bockw defconfig into line with
+other shmobile defconfigs.
+
+Signed-off-by: Simon Horman <horms@verge.net.au>
+(cherry picked from commit e14ee5deab24200e4b70fe31a8c806f0acd3d37c)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/bockw_defconfig | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
+index 8b5866e6292d..01721fafcea1 100644
+--- a/arch/arm/configs/bockw_defconfig
++++ b/arch/arm/configs/bockw_defconfig
+@@ -43,8 +43,6 @@ CONFIG_IP_PNP_DHCP=y
+ # CONFIG_INET_DIAG is not set
+ # CONFIG_IPV6 is not set
+ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+-CONFIG_DEVTMPFS=y
+-CONFIG_DEVTMPFS_MOUNT=y
+ # CONFIG_STANDALONE is not set
+ # CONFIG_PREVENT_FIRMWARE_BUILD is not set
+ # CONFIG_FW_LOADER is not set
+--
+1.8.5.rc3
+
--- /dev/null
+From cd7fcf8b5521a06f22a0d980a1ac3cd6dc23c74b Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 10 Oct 2013 15:12:17 +0900
+Subject: ARM: shmobile: marzen: Do not enable CONFIG_DEVTMPFS defconfig
+
+This change brings the marzen defconfig into line with
+other shmobile defconfigs.
+
+Signed-off-by: Simon Horman <horms@verge.net.au>
+(cherry picked from commit 41307133da4b6f242ecbb45950b9d043c0b21b96)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/marzen_defconfig | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
+index 39e2dfebcf50..3f0f41f8ba30 100644
+--- a/arch/arm/configs/marzen_defconfig
++++ b/arch/arm/configs/marzen_defconfig
+@@ -42,8 +42,6 @@ CONFIG_IP_PNP_DHCP=y
+ # CONFIG_IPV6 is not set
+ # CONFIG_WIRELESS is not set
+ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+-CONFIG_DEVTMPFS=y
+-CONFIG_DEVTMPFS_MOUNT=y
+ # CONFIG_STANDALONE is not set
+ # CONFIG_PREVENT_FIRMWARE_BUILD is not set
+ # CONFIG_FW_LOADER is not set
+--
+1.8.5.rc3
+
--- /dev/null
+From fa48a7f83e1e49aa8ceda399d6b107f0a506c5f9 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 10 Oct 2013 15:12:17 +0900
+Subject: ARM: shmobile: bockw: Enable CONFIG_PACKET in defconfig
+
+CONFIG_PACKET is required for the ISC dhcpd daemon function.
+This change brings the bockw defconfig into line with
+other shmobile defconfigs.
+
+Signed-off-by: Simon Horman <horms@verge.net.au>
+(cherry picked from commit 66d0a50ea15a5a05372e9f8bb0fa7bdc873e4179)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/bockw_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
+index 01721fafcea1..191decba86c4 100644
+--- a/arch/arm/configs/bockw_defconfig
++++ b/arch/arm/configs/bockw_defconfig
+@@ -32,6 +32,7 @@ CONFIG_VFP=y
+ # CONFIG_SUSPEND is not set
+ CONFIG_PM_RUNTIME=y
+ CONFIG_NET=y
++CONFIG_PACKET=y
+ CONFIG_UNIX=y
+ CONFIG_INET=y
+ CONFIG_IP_PNP=y
+--
+1.8.5.rc3
+
--- /dev/null
+From 0da98a41ea04b1786dfc06622733471d47c68110 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 10 Oct 2013 15:12:17 +0900
+Subject: ARM: shmobile: marzen: Enable CONFIG_PACKET in defconfig
+
+CONFIG_PACKET is required for the ISC dhcpd daemon function.
+This change brings the marzen defconfig into line with
+other shmobile defconfigs.
+
+Signed-off-by: Simon Horman <horms@verge.net.au>
+(cherry picked from commit d4df4b2716336d24e243013c5e64b867c18ccc29)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/marzen_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
+index 3f0f41f8ba30..a423badba241 100644
+--- a/arch/arm/configs/marzen_defconfig
++++ b/arch/arm/configs/marzen_defconfig
+@@ -35,6 +35,7 @@ CONFIG_KEXEC=y
+ # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+ CONFIG_PM_RUNTIME=y
+ CONFIG_NET=y
++CONFIG_PACKET=y
+ CONFIG_UNIX=y
+ CONFIG_INET=y
+ CONFIG_IP_PNP=y
+--
+1.8.5.rc3
+
--- /dev/null
+From e659527897a782e60ae3f1f1b663e87aab2079db Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 10 Oct 2013 15:12:17 +0900
+Subject: ARM: shmobile: marzen: Do not enable CONFIG_SMC911X in defconfig
+
+CONFIG_SMC911X is not needed by marzen.
+It appears to have been accidently enabled as well
+as CONFIG_SMSC911X which is needed by marzen.
+
+Signed-off-by: Simon Horman <horms@verge.net.au>
+(cherry picked from commit f3a3d2cfb7fb10e2e23d02abb5459ff974f2c8bd)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/marzen_defconfig | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
+index a423badba241..9ce38f6931e5 100644
+--- a/arch/arm/configs/marzen_defconfig
++++ b/arch/arm/configs/marzen_defconfig
+@@ -59,7 +59,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_NET_VENDOR_MICREL is not set
+ # CONFIG_NET_VENDOR_NATSEMI is not set
+ # CONFIG_NET_VENDOR_SEEQ is not set
+-CONFIG_SMC911X=y
+ CONFIG_SMSC911X=y
+ # CONFIG_NET_VENDOR_STMICRO is not set
+ # CONFIG_WLAN is not set
+--
+1.8.5.rc3
+
--- /dev/null
+From 31b2e124bea58f8651026bf53066e6416b553169 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sun, 29 Sep 2013 00:12:33 +0400
+Subject: ARM: shmobile: marzen: enable HPB-DMAC in defconfig
+
+Enable HPB-DMAC driver in 'marzen_defconfig'.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 96c4f31f955bd35e33bae1e11a5e614f5c7163cd)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/marzen_defconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
+index 9ce38f6931e5..dd4aced59d3c 100644
+--- a/arch/arm/configs/marzen_defconfig
++++ b/arch/arm/configs/marzen_defconfig
+@@ -103,6 +103,8 @@ CONFIG_USB_STORAGE=y
+ CONFIG_NEW_LEDS=y
+ CONFIG_LEDS_CLASS=y
+ CONFIG_LEDS_GPIO=y
++CONFIG_DMADEVICES=y
++CONFIG_RCAR_HPB_DMAE=y
+ CONFIG_UIO=y
+ CONFIG_UIO_PDRV_GENIRQ=y
+ # CONFIG_IOMMU_SUPPORT is not set
+--
+1.8.5.rc3
+
--- /dev/null
+From a91c6ab32bdd0bc7397f36acf6eca8902fb0c057 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sun, 29 Sep 2013 00:11:28 +0400
+Subject: ARM: shmobile: bockw: enable HPB-DMAC in defconfig
+
+Enable HPB-DMAC driver in 'bockw_defconfig'.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 885484af398d11c21e4927dc33a2994927de6c5a)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/bockw_defconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
+index 191decba86c4..8110d8a653f7 100644
+--- a/arch/arm/configs/bockw_defconfig
++++ b/arch/arm/configs/bockw_defconfig
+@@ -107,6 +107,8 @@ CONFIG_MMC_SDHI=y
+ CONFIG_MMC_SH_MMCIF=y
+ CONFIG_RTC_CLASS=y
+ CONFIG_RTC_DRV_RX8581=y
++CONFIG_DMADEVICES=y
++CONFIG_RCAR_HPB_DMAE=y
+ CONFIG_UIO=y
+ CONFIG_UIO_PDRV_GENIRQ=y
+ # CONFIG_IOMMU_SUPPORT is not set
+--
+1.8.5.rc3
+
--- /dev/null
+From 2fae4feecea5a2dc694de19538ef3df6efc05e23 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Sat, 9 Nov 2013 08:47:45 +0900
+Subject: ARM: shmobile: kzm9d: Enable AUTO_ZRELADDR in defconfig
+
+This is required to allow the load address to be supplied
+as an environment variable when building a uImage.
+
+LOADADDR=0x40008000 ARCH=arm make uImage
+
+This is necessary since "ARM: shmobile: Remove legacy KZM9D board code"
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 577092b3d11530acd8467074f6ea7e2dd36b5028)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/kzm9d_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/configs/kzm9d_defconfig b/arch/arm/configs/kzm9d_defconfig
+index 6c37f4a98eb8..e6aed23ac083 100644
+--- a/arch/arm/configs/kzm9d_defconfig
++++ b/arch/arm/configs/kzm9d_defconfig
+@@ -32,6 +32,7 @@ CONFIG_FORCE_MAX_ZONEORDER=13
+ CONFIG_ZBOOT_ROM_TEXT=0x0
+ CONFIG_ZBOOT_ROM_BSS=0x0
+ CONFIG_ARM_APPENDED_DTB=y
++CONFIG_AUTO_ZRELADDR=y
+ CONFIG_VFP=y
+ # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+ CONFIG_PM_RUNTIME=y
+--
+1.8.5.rc3
+
--- /dev/null
+From d28cdfb53b1cb42280e2716e24fbde2768e6703b Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 7 Oct 2013 22:58:08 -0700
+Subject: ARM: shmobile: ape6evm: don't use named resource for MMCIF
+
+sh_mmcif driver doesn't care resource name.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 61a4fd12d43426fa52fb05dbf21efa057b4a7e78)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-ape6evm.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
+index 0fa068e30a30..94adf6199300 100644
+--- a/arch/arm/mach-shmobile/board-ape6evm.c
++++ b/arch/arm/mach-shmobile/board-ape6evm.c
+@@ -168,7 +168,7 @@ static const struct sh_mmcif_plat_data mmcif0_pdata __initconst = {
+ };
+
+ static const struct resource mmcif0_resources[] __initconst = {
+- DEFINE_RES_MEM_NAMED(0xee200000, 0x100, "MMCIF0"),
++ DEFINE_RES_MEM(0xee200000, 0x100),
+ DEFINE_RES_IRQ(gic_spi(169)),
+ };
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 4015ede46452d9d8e73fdb6868a6d6c8598c7223 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 7 Oct 2013 22:58:20 -0700
+Subject: ARM: shmobile: ape6evm: don't use named resource for SDHI
+
+sh_mobile_sdhi driver doesn't care resource name.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e33e6968ccffc50e788a7a98613985410262332f)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-ape6evm.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
+index 94adf6199300..fe071a9130b7 100644
+--- a/arch/arm/mach-shmobile/board-ape6evm.c
++++ b/arch/arm/mach-shmobile/board-ape6evm.c
+@@ -179,7 +179,7 @@ static const struct sh_mobile_sdhi_info sdhi0_pdata __initconst = {
+ };
+
+ static const struct resource sdhi0_resources[] __initconst = {
+- DEFINE_RES_MEM_NAMED(0xee100000, 0x100, "SDHI0"),
++ DEFINE_RES_MEM(0xee100000, 0x100),
+ DEFINE_RES_IRQ(gic_spi(165)),
+ };
+
+@@ -191,7 +191,7 @@ static const struct sh_mobile_sdhi_info sdhi1_pdata __initconst = {
+ };
+
+ static const struct resource sdhi1_resources[] __initconst = {
+- DEFINE_RES_MEM_NAMED(0xee120000, 0x100, "SDHI1"),
++ DEFINE_RES_MEM(0xee120000, 0x100),
+ DEFINE_RES_IRQ(gic_spi(166)),
+ };
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 0cec77374e2c36801b72d9dc06a4c838eb622c98 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 7 Oct 2013 22:58:30 -0700
+Subject: ARM: shmobile: lager: don't use named resource for MMCIF
+
+sh_mmcif driver doesn't care resource name.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b7b42df6c9400ae09453f894b06d9e7719058948)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
+index d83ed6556f7d..475a9a7b70e2 100644
+--- a/arch/arm/mach-shmobile/board-lager.c
++++ b/arch/arm/mach-shmobile/board-lager.c
+@@ -148,7 +148,7 @@ static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
+ };
+
+ static const struct resource mmcif1_resources[] __initconst = {
+- DEFINE_RES_MEM_NAMED(0xee220000, 0x80, "MMCIF1"),
++ DEFINE_RES_MEM(0xee220000, 0x80),
+ DEFINE_RES_IRQ(gic_spi(170)),
+ };
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 75dc6dee446f36a722f5c5121361cc9d80c2a109 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 7 Oct 2013 22:58:42 -0700
+Subject: ARM: shmobile: sh73a0: don't use named resource for TMU
+
+sh_tmu driver doesn't care resource name.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bd6dfe584097e38272705fe00d2892d272b54bce)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-sh73a0.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
+index 22de17417fd7..b7ce68e029a5 100644
+--- a/arch/arm/mach-shmobile/setup-sh73a0.c
++++ b/arch/arm/mach-shmobile/setup-sh73a0.c
+@@ -273,7 +273,7 @@ static struct sh_timer_config tmu00_platform_data = {
+ };
+
+ static struct resource tmu00_resources[] = {
+- [0] = DEFINE_RES_MEM_NAMED(0xfff60008, 0xc, "TMU00"),
++ [0] = DEFINE_RES_MEM(0xfff60008, 0xc),
+ [1] = {
+ .start = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */
+ .flags = IORESOURCE_IRQ,
+@@ -298,7 +298,7 @@ static struct sh_timer_config tmu01_platform_data = {
+ };
+
+ static struct resource tmu01_resources[] = {
+- [0] = DEFINE_RES_MEM_NAMED(0xfff60014, 0xc, "TMU00"),
++ [0] = DEFINE_RES_MEM(0xfff60014, 0xc),
+ [1] = {
+ .start = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */
+ .flags = IORESOURCE_IRQ,
+--
+1.8.5.rc3
+
--- /dev/null
+From 80d83ef74e6715a77b4f2692ad524b8ffea42f26 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 7 Oct 2013 22:58:55 -0700
+Subject: ARM: shmobile: sh73a0: don't use named resource for I2C
+
+i2c-sh_mobile driver doesn't care resource name.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8e85524bf5a2a6bf35a5011bd1cd116650da5c47)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-sh73a0.c | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
+index b7ce68e029a5..c51580138612 100644
+--- a/arch/arm/mach-shmobile/setup-sh73a0.c
++++ b/arch/arm/mach-shmobile/setup-sh73a0.c
+@@ -316,7 +316,7 @@ static struct platform_device tmu01_device = {
+ };
+
+ static struct resource i2c0_resources[] = {
+- [0] = DEFINE_RES_MEM_NAMED(0xe6820000, 0x426, "IIC0"),
++ [0] = DEFINE_RES_MEM(0xe6820000, 0x426),
+ [1] = {
+ .start = gic_spi(167),
+ .end = gic_spi(170),
+@@ -325,7 +325,7 @@ static struct resource i2c0_resources[] = {
+ };
+
+ static struct resource i2c1_resources[] = {
+- [0] = DEFINE_RES_MEM_NAMED(0xe6822000, 0x426, "IIC1"),
++ [0] = DEFINE_RES_MEM(0xe6822000, 0x426),
+ [1] = {
+ .start = gic_spi(51),
+ .end = gic_spi(54),
+@@ -334,7 +334,7 @@ static struct resource i2c1_resources[] = {
+ };
+
+ static struct resource i2c2_resources[] = {
+- [0] = DEFINE_RES_MEM_NAMED(0xe6824000, 0x426, "IIC2"),
++ [0] = DEFINE_RES_MEM(0xe6824000, 0x426),
+ [1] = {
+ .start = gic_spi(171),
+ .end = gic_spi(174),
+@@ -343,7 +343,7 @@ static struct resource i2c2_resources[] = {
+ };
+
+ static struct resource i2c3_resources[] = {
+- [0] = DEFINE_RES_MEM_NAMED(0xe6826000, 0x426, "IIC3"),
++ [0] = DEFINE_RES_MEM(0xe6826000, 0x426),
+ [1] = {
+ .start = gic_spi(183),
+ .end = gic_spi(186),
+@@ -352,7 +352,7 @@ static struct resource i2c3_resources[] = {
+ };
+
+ static struct resource i2c4_resources[] = {
+- [0] = DEFINE_RES_MEM_NAMED(0xe6828000, 0x426, "IIC4"),
++ [0] = DEFINE_RES_MEM(0xe6828000, 0x426),
+ [1] = {
+ .start = gic_spi(187),
+ .end = gic_spi(190),
+--
+1.8.5.rc3
+
--- /dev/null
+From 5e9e64df8e5bbed8052396eb86b2ea66afadfe1f Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 7 Oct 2013 22:59:06 -0700
+Subject: ARM: shmobile: sh73a0: don't use named resource for IPMMU
+
+shmobile-ipmmu driver doesn't care resource name.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6244cd7341ea234c2850c1b6907d216db2582f64)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-sh73a0.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
+index c51580138612..65151c48cbd4 100644
+--- a/arch/arm/mach-shmobile/setup-sh73a0.c
++++ b/arch/arm/mach-shmobile/setup-sh73a0.c
+@@ -722,7 +722,7 @@ static struct platform_device pmu_device = {
+
+ /* an IPMMU module for ICB */
+ static struct resource ipmmu_resources[] = {
+- DEFINE_RES_MEM_NAMED(0xfe951000, 0x100, "IPMMU"),
++ DEFINE_RES_MEM(0xfe951000, 0x100),
+ };
+
+ static const char * const ipmmu_dev_names[] = {
+--
+1.8.5.rc3
+
--- /dev/null
+From 2485ec0d745fb3fba6600b135bc130786c9276cb Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 10 Oct 2013 23:34:53 -0700
+Subject: ARM: shmobile: bockw: header cleanup
+
+linux/pinctrl/machine.h is no longer needed
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 22e247ef146b9a13c836a005e04ce909e3e16966)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-bockw-reference.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
+index ae88fdad4b3a..1687df9b267f 100644
+--- a/arch/arm/mach-shmobile/board-bockw-reference.c
++++ b/arch/arm/mach-shmobile/board-bockw-reference.c
+@@ -19,7 +19,6 @@
+ */
+
+ #include <linux/of_platform.h>
+-#include <linux/pinctrl/machine.h>
+ #include <mach/common.h>
+ #include <mach/r8a7778.h>
+ #include <asm/mach/arch.h>
+--
+1.8.5.rc3
+
--- /dev/null
+From 6bf3d520cc10b69cac1460e690fedc7f1b685536 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 14 Oct 2013 19:45:36 -0700
+Subject: ARM: shmobile: r8a7779: cleanup registration of VIN
+
+VIN driver which needs platform data at the time of
+registration is used from Marzen only.
+Now, ARM/shmobile aims to support DT,
+and the C code base board support will be removed
+if DT support is completed.
+Current driver registration method which needs platform data
+and which is not shared complicates codes.
+This means legacy C code cleanup after DT supporting
+will be more complicated
+This patch registers it on board code as cleanup C code
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4bd4c5b32b851b07d81209e1dc0c8b20b283f2e2)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-marzen.c | 24 +++++++++++++++--
+ arch/arm/mach-shmobile/include/mach/r8a7779.h | 2 --
+ arch/arm/mach-shmobile/setup-r8a7779.c | 37 ---------------------------
+ 3 files changed, 22 insertions(+), 41 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
+index da1352f5f71b..fa102f7d149c 100644
+--- a/arch/arm/mach-shmobile/board-marzen.c
++++ b/arch/arm/mach-shmobile/board-marzen.c
+@@ -259,10 +259,30 @@ static struct platform_device leds_device = {
+ },
+ };
+
++/* VIN */
+ static struct rcar_vin_platform_data vin_platform_data __initdata = {
+ .flags = RCAR_VIN_BT656,
+ };
+
++#define MARZEN_VIN(idx) \
++static struct resource vin##idx##_resources[] __initdata = { \
++ DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000), \
++ DEFINE_RES_IRQ(gic_iid(0x5f + (idx))), \
++}; \
++ \
++static struct platform_device_info vin##idx##_info __initdata = { \
++ .parent = &platform_bus, \
++ .name = "r8a7779-vin", \
++ .id = idx, \
++ .res = vin##idx##_resources, \
++ .num_res = ARRAY_SIZE(vin##idx##_resources), \
++ .dma_mask = DMA_BIT_MASK(32), \
++ .data = &vin_platform_data, \
++ .size_data = sizeof(vin_platform_data), \
++}
++MARZEN_VIN(1);
++MARZEN_VIN(3);
++
+ #define MARZEN_CAMERA(idx) \
+ static struct i2c_board_info camera##idx##_info = { \
+ I2C_BOARD_INFO("adv7180", 0x20 + (idx)), \
+@@ -367,8 +387,8 @@ static void __init marzen_init(void)
+ r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
+
+ r8a7779_add_standard_devices();
+- r8a7779_add_vin_device(1, &vin_platform_data);
+- r8a7779_add_vin_device(3, &vin_platform_data);
++ platform_device_register_full(&vin1_info);
++ platform_device_register_full(&vin3_info);
+ platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
+ marzen_add_du_device();
+ }
+diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
+index 17af34ed89c8..905420a2f11f 100644
+--- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
++++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
+@@ -41,8 +41,6 @@ extern void r8a7779_add_early_devices(void);
+ extern void r8a7779_add_standard_devices(void);
+ extern void r8a7779_add_standard_devices_dt(void);
+ extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata);
+-extern void r8a7779_add_vin_device(int idx,
+- struct rcar_vin_platform_data *pdata);
+ extern void r8a7779_init_late(void);
+ extern void r8a7779_clock_init(void);
+ extern void r8a7779_pinmux_init(void);
+diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
+index 13049e9d691c..51a43c52c611 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7779.c
++++ b/arch/arm/mach-shmobile/setup-r8a7779.c
+@@ -610,33 +610,6 @@ static struct resource ether_resources[] __initdata = {
+ },
+ };
+
+-#define R8A7779_VIN(idx) \
+-static struct resource vin##idx##_resources[] __initdata = { \
+- DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000), \
+- DEFINE_RES_IRQ(gic_iid(0x5f + (idx))), \
+-}; \
+- \
+-static struct platform_device_info vin##idx##_info __initdata = { \
+- .parent = &platform_bus, \
+- .name = "r8a7779-vin", \
+- .id = idx, \
+- .res = vin##idx##_resources, \
+- .num_res = ARRAY_SIZE(vin##idx##_resources), \
+- .dma_mask = DMA_BIT_MASK(32), \
+-}
+-
+-R8A7779_VIN(0);
+-R8A7779_VIN(1);
+-R8A7779_VIN(2);
+-R8A7779_VIN(3);
+-
+-static struct platform_device_info *vin_info_table[] __initdata = {
+- &vin0_info,
+- &vin1_info,
+- &vin2_info,
+- &vin3_info,
+-};
+-
+ /* HPB-DMA */
+
+ /* Asynchronous mode register bits */
+@@ -833,16 +806,6 @@ void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
+ pdata, sizeof(*pdata));
+ }
+
+-void __init r8a7779_add_vin_device(int id, struct rcar_vin_platform_data *pdata)
+-{
+- BUG_ON(id < 0 || id > 3);
+-
+- vin_info_table[id]->data = pdata;
+- vin_info_table[id]->size_data = sizeof(*pdata);
+-
+- platform_device_register_full(vin_info_table[id]);
+-}
+-
+ /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
+ void __init __weak r8a7779_register_twd(void) { }
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 60ff52cfb7daed8b53c1098b28d4c56ddd857df7 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 17 Oct 2013 06:58:19 +0900
+Subject: ARM: shmobile: Cosmetic update of Lager DT Reference
+
+Clean up the Lager DT reference board code to make it match
+Koelsch DT reference including using the rcar-gen2 header.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 20c6125fc9d98492e5ed1668d1ea72289c8ff94c)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager-reference.c | 5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
+index 1a1a4a888632..7df9ea0839db 100644
+--- a/arch/arm/mach-shmobile/board-lager-reference.c
++++ b/arch/arm/mach-shmobile/board-lager-reference.c
+@@ -20,16 +20,15 @@
+
+ #include <linux/init.h>
+ #include <linux/of_platform.h>
++#include <mach/rcar-gen2.h>
+ #include <mach/r8a7790.h>
+ #include <asm/mach/arch.h>
+
+ static void __init lager_add_standard_devices(void)
+ {
+- /* clocks are setup late during boot in the case of DT */
+ r8a7790_clock_init();
+-
+ r8a7790_add_dt_devices();
+- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
++ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ }
+
+ static const char *lager_boards_compat_dt[] __initdata = {
+--
+1.8.5.rc3
+
--- /dev/null
+From f1cea81115bb05dfb6e9f9c96d747abf7552f266 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 17 Oct 2013 06:51:46 +0900
+Subject: ARM: shmobile: Add r8a7790_register_pfc() function
+
+Break out the r8a7790 PFC platform device creation code
+to increase readability and follow same style as r8a7791.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8d0b3bf79bfa1dc7d3e2a9dc2b6f2ceea353687f)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7790.c | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
+index c47bcebbcb00..3543c3bacb75 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7790.c
++++ b/arch/arm/mach-shmobile/setup-r8a7790.c
+@@ -34,6 +34,10 @@ static const struct resource pfc_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6060000, 0x250),
+ };
+
++#define r8a7790_register_pfc() \
++ platform_device_register_simple("pfc-r8a7790", -1, pfc_resources, \
++ ARRAY_SIZE(pfc_resources))
++
+ #define R8A7790_GPIO(idx) \
+ static const struct resource r8a7790_gpio##idx##_resources[] __initconst = { \
+ DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50), \
+@@ -65,8 +69,7 @@ R8A7790_GPIO(5);
+
+ void __init r8a7790_pinmux_init(void)
+ {
+- platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
+- ARRAY_SIZE(pfc_resources));
++ r8a7790_register_pfc();
+ r8a7790_register_gpio(0);
+ r8a7790_register_gpio(1);
+ r8a7790_register_gpio(2);
+--
+1.8.5.rc3
+
--- /dev/null
+From 25b8451b27d8d3065376771fb2f1a2461b7a07d7 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 31 Oct 2013 18:00:03 -0700
+Subject: ARM: shmobile: r8a7779: camera-rcar header cleanup
+
+<linux/platform_data/camera-rcar.h> is needed on Marzen,
+not setup-r8a7779.c
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2f3927e815e82874af76db51f8d2c2a596bc6cee)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-marzen.c | 1 +
+ arch/arm/mach-shmobile/include/mach/r8a7779.h | 1 -
+ 2 files changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
+index fa102f7d149c..4f9e3ec42ddc 100644
+--- a/arch/arm/mach-shmobile/board-marzen.c
++++ b/arch/arm/mach-shmobile/board-marzen.c
+@@ -29,6 +29,7 @@
+ #include <linux/leds.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/pinctrl/machine.h>
++#include <linux/platform_data/camera-rcar.h>
+ #include <linux/platform_data/gpio-rcar.h>
+ #include <linux/platform_data/rcar-du.h>
+ #include <linux/platform_data/usb-rcar-phy.h>
+diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
+index 905420a2f11f..1cab247ff255 100644
+--- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
++++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
+@@ -4,7 +4,6 @@
+ #include <linux/sh_clk.h>
+ #include <linux/pm_domain.h>
+ #include <linux/sh_eth.h>
+-#include <linux/platform_data/camera-rcar.h>
+
+ /* HPB-DMA slave IDs */
+ enum {
+--
+1.8.5.rc3
+
--- /dev/null
+From 05e4a9447c71bbfc04c84a218c3257c8555d91c1 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 6 Nov 2013 13:58:55 +0900
+Subject: ARM: shmobile: r8a7790: Correct typo in clocks
+
+This is the r8a7790 SoC not the r8a77a4 SoC and
+clocks are updated in r8a7790_clock_init not r8a73a4_clock_init.
+
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7d947813d4dbb8cfee0ed2c75b27f65cb2c54434)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7790.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
+index a64f965c7da1..fa1b4773677a 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7790.c
++++ b/arch/arm/mach-shmobile/clock-r8a7790.c
+@@ -77,7 +77,7 @@ static struct sh_clk_ops followparent_clk_ops = {
+ };
+
+ static struct clk main_clk = {
+- /* .parent will be set r8a73a4_clock_init */
++ /* .parent will be set r8a7790_clock_init */
+ .ops = &followparent_clk_ops,
+ };
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 4fb28ed5f3c1f4cc0e97710e3aba8be69840595e Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 11 Nov 2013 20:23:36 -0800
+Subject: ARM: shmobile: r8a7779: cleanup registration of sh_eth
+
+sh_eth driver which needs platform data at the time of
+registration is not used.
+Now, ARM/shmobile aims to support DT,
+and the C code base board support will be removed
+if DT support is completed.
+Current driver registration method which needs platform data
+and which is not shared complicates codes.
+This means legacy C code cleanup after DT supporting
+will be more complicated
+This patch removes r8a7779_add_ether_device()
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit be15182068582bc38281329d86d106adaca63fda)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/include/mach/r8a7779.h | 2 --
+ arch/arm/mach-shmobile/setup-r8a7779.c | 20 --------------------
+ 2 files changed, 22 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
+index 1cab247ff255..5014145f272e 100644
+--- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
++++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
+@@ -3,7 +3,6 @@
+
+ #include <linux/sh_clk.h>
+ #include <linux/pm_domain.h>
+-#include <linux/sh_eth.h>
+
+ /* HPB-DMA slave IDs */
+ enum {
+@@ -39,7 +38,6 @@ extern void r8a7779_earlytimer_init(void);
+ extern void r8a7779_add_early_devices(void);
+ extern void r8a7779_add_standard_devices(void);
+ extern void r8a7779_add_standard_devices_dt(void);
+-extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata);
+ extern void r8a7779_init_late(void);
+ extern void r8a7779_clock_init(void);
+ extern void r8a7779_pinmux_init(void);
+diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
+index 51a43c52c611..8f9453152fb9 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7779.c
++++ b/arch/arm/mach-shmobile/setup-r8a7779.c
+@@ -598,18 +598,6 @@ static struct platform_device ohci1_device = {
+ .resource = ohci1_resources,
+ };
+
+-/* Ether */
+-static struct resource ether_resources[] __initdata = {
+- {
+- .start = 0xfde00000,
+- .end = 0xfde003ff,
+- .flags = IORESOURCE_MEM,
+- }, {
+- .start = gic_iid(0xb4),
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+ /* HPB-DMA */
+
+ /* Asynchronous mode register bits */
+@@ -798,14 +786,6 @@ void __init r8a7779_add_standard_devices(void)
+ r8a7779_register_hpb_dmae();
+ }
+
+-void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
+-{
+- platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
+- ether_resources,
+- ARRAY_SIZE(ether_resources),
+- pdata, sizeof(*pdata));
+-}
+-
+ /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
+ void __init __weak r8a7779_register_twd(void) { }
+
+--
+1.8.5.rc3
+
--- /dev/null
+From c46d80b87952f6a4b3bf42abd6d20875119bd9b1 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 19 Nov 2013 01:04:57 -0800
+Subject: ARM: shmobile: sh73a0: tidyup clock table order
+
+SuperH lookups clock is using CLKDEV_CON/DEV/ICK_ID() macro
+for a long term.
+But in these days, the ICK clock is defined in random place.
+This patch arranges it.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 99b7835e0d9653d0cd61c2b16416556dc72b8f55)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-sh73a0.c | 14 ++++++++------
+ 1 file changed, 8 insertions(+), 6 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
+index c92c023f0d27..2aeec468cf7c 100644
+--- a/arch/arm/mach-shmobile/clock-sh73a0.c
++++ b/arch/arm/mach-shmobile/clock-sh73a0.c
+@@ -625,12 +625,6 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_CON_ID("sdhi0_clk", &div6_clks[DIV6_SDHI0]),
+ CLKDEV_CON_ID("sdhi1_clk", &div6_clks[DIV6_SDHI1]),
+ CLKDEV_CON_ID("sdhi2_clk", &div6_clks[DIV6_SDHI2]),
+- CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
+- CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
+- CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
+- CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
+- CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
+- CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
+
+ /* MSTP32 clocks */
+ CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
+@@ -680,6 +674,14 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
+ CLKDEV_DEV_ID("e6828000.i2c", &mstp_clks[MSTP410]), /* I2C4 */
+ CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
++
++ /* ICK */
++ CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
++ CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
++ CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
++ CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
++ CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
++ CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
+ };
+
+ void __init sh73a0_clock_init(void)
+--
+1.8.5.rc3
+
--- /dev/null
+From 4c02fba070f82d5d07ad7701d406ad5e2a69b423 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 19 Nov 2013 01:05:10 -0800
+Subject: ARM: shmobile: r7s72100: tidyup clock table order
+
+SuperH lookups clock is using CLKDEV_CON/DEV/ICK_ID() macro
+for a long term.
+But in these days, the ICK clock is defined in random place.
+This patch arranges it.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 204aa273a7b7f2861ecc592c1fd722e7b51b6134)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r7s72100.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
+index 4aba20ca127e..0814a508fd61 100644
+--- a/arch/arm/mach-shmobile/clock-r7s72100.c
++++ b/arch/arm/mach-shmobile/clock-r7s72100.c
+@@ -170,6 +170,9 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
+
+ /* MSTP clocks */
++ CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
++
++ /* ICK */
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP47]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP46]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP45]),
+--
+1.8.5.rc3
+
--- /dev/null
+From 7629d6863509b356b8632e587f8d89607a53e338 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 19 Nov 2013 01:05:33 -0800
+Subject: ARM: shmobile: sh7372: tidyup clock table order
+
+SuperH lookups clock is using CLKDEV_CON/DEV/ICK_ID() macro
+for a long term.
+But in these days, the ICK clock is defined in random place.
+This patch arranges it.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8af3f18b7b42e32387b54d2e2f8300589b0198e9)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-sh7372.c | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
+index 5390c6bbbc02..28489978b09c 100644
+--- a/arch/arm/mach-shmobile/clock-sh7372.c
++++ b/arch/arm/mach-shmobile/clock-sh7372.c
+@@ -504,10 +504,6 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
+ CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
+ CLKDEV_CON_ID("hdmi_clk", &div6_reparent_clks[DIV6_HDMI]),
+- CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
+- CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
+- CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
+- CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
+
+ /* MSTP32 clocks */
+ CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
+@@ -574,6 +570,11 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
+ CLKDEV_DEV_ID("sh_cmt.2", &mstp_clks[MSTP400]), /* CMT2 */
+
++ /* ICK */
++ CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
++ CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
++ CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
++ CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
+ CLKDEV_ICK_ID("hdmi", "sh_mobile_lcdc_fb.1",
+ &div6_reparent_clks[DIV6_HDMI]),
+ CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]),
+--
+1.8.5.rc3
+
--- /dev/null
+From 7cf7d0d64536e1e6caa5c27aecce7d365b48b39d Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 6 Nov 2013 09:41:09 +0900
+Subject: ARM: shmobile: lager: phy fixup needs CONFIG_PHYLIB
+
+Do not build the phy fixup unless CONFIG_PHYLIB is enabled.
+
+Other than not being useful it is also not possible to link
+the code under this condition as phy_register_fixup_for_id(),
+mdiobus_read() and mdiobus_write() are absent.
+
+arch/arm/mach-shmobile/built-in.o: In function `lager_ksz8041_fixup':
+board-lager.c:(.text+0xb8): undefined reference to `mdiobus_read'
+board-lager.c:(.text+0xd4): undefined reference to `mdiobus_write'
+arch/arm/mach-shmobile/built-in.o: In function `lager_init':
+board-lager.c:(.init.text+0xafc): undefined reference to `phy_register_fixup_for_id'
+
+This problem was introduced by 48c8b96f21817aad
+("ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup")
+
+Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6802cdc58d4fe66cffd6cd04ee55e65dd61eeeeb)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
+index 475a9a7b70e2..4301c3812a13 100644
+--- a/arch/arm/mach-shmobile/board-lager.c
++++ b/arch/arm/mach-shmobile/board-lager.c
+@@ -245,7 +245,9 @@ static void __init lager_init(void)
+ {
+ lager_add_standard_devices();
+
+- phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
++ if (IS_ENABLED(CONFIG_PHYLIB))
++ phy_register_fixup_for_id("r8a7790-ether-ff:01",
++ lager_ksz8041_fixup);
+ }
+
+ static const char *lager_boards_compat_dt[] __initdata = {
+--
+1.8.5.rc3
+
--- /dev/null
+From 01f94eac50e2175cec451d8da843856a5d0a9c3f Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 21 Nov 2013 14:19:29 +0900
+Subject: ARM: shmobile: r8a7790: Fix GPIO resources in DTS
+
+The r8a7790 GPIO resources are currently incorrect. Fix that
+by making them match the English r8a7790 v0.6 data sheet.
+
+Tested with GPIO LED using Lager DT reference.
+
+This problem has been present since GPIOs were added to the r8a7790 SoC by
+f98e10c88aa95bf7 ("ARM: shmobile: r8a7790: Add GPIO controller devices to
+device tree") in v3.12-rc1.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 23de2278ebc3a2f971ce45ca5e5e35c9d5a74040)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 24 ++++++++++++------------
+ 1 file changed, 12 insertions(+), 12 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index ee845fad939b..46e1d7ef163f 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -87,9 +87,9 @@
+ interrupts = <1 9 0xf04>;
+ };
+
+- gpio0: gpio@ffc40000 {
++ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+- reg = <0 0xffc40000 0 0x2c>;
++ reg = <0 0xe6050000 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 4 0x4>;
+ #gpio-cells = <2>;
+@@ -99,9 +99,9 @@
+ interrupt-controller;
+ };
+
+- gpio1: gpio@ffc41000 {
++ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+- reg = <0 0xffc41000 0 0x2c>;
++ reg = <0 0xe6051000 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 5 0x4>;
+ #gpio-cells = <2>;
+@@ -111,9 +111,9 @@
+ interrupt-controller;
+ };
+
+- gpio2: gpio@ffc42000 {
++ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+- reg = <0 0xffc42000 0 0x2c>;
++ reg = <0 0xe6052000 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 6 0x4>;
+ #gpio-cells = <2>;
+@@ -123,9 +123,9 @@
+ interrupt-controller;
+ };
+
+- gpio3: gpio@ffc43000 {
++ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+- reg = <0 0xffc43000 0 0x2c>;
++ reg = <0 0xe6053000 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 7 0x4>;
+ #gpio-cells = <2>;
+@@ -135,9 +135,9 @@
+ interrupt-controller;
+ };
+
+- gpio4: gpio@ffc44000 {
++ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+- reg = <0 0xffc44000 0 0x2c>;
++ reg = <0 0xe6054000 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 8 0x4>;
+ #gpio-cells = <2>;
+@@ -147,9 +147,9 @@
+ interrupt-controller;
+ };
+
+- gpio5: gpio@ffc45000 {
++ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+- reg = <0 0xffc45000 0 0x2c>;
++ reg = <0 0xe6055000 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 9 0x4>;
+ #gpio-cells = <2>;
+--
+1.8.5.rc3
+
--- /dev/null
+From ba6783c52b27541b7d2e07cb4faef11276919643 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 3 Oct 2013 23:43:54 -0700
+Subject: ARM: shmobile: r8a7778: add I2C clock for DT
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 10ef80fa225935ddf44371913c737a387956479a)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7778.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
+index fb6af83858e3..a77089fb0707 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7778.c
++++ b/arch/arm/mach-shmobile/clock-r8a7778.c
+@@ -183,9 +183,13 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
+ CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP100]), /* USB FUNC */
+ CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
++ CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
+ CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
++ CLKDEV_DEV_ID("ffc71000.i2c", &mstp_clks[MSTP029]), /* I2C1 */
+ CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
++ CLKDEV_DEV_ID("ffc72000.i2c", &mstp_clks[MSTP028]), /* I2C2 */
+ CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
++ CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
+ CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
+ CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
+ CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
+--
+1.8.5.rc3
+
--- /dev/null
+From ea9fcab2ab2628df8b2c4b3bfc9799ca81cee652 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 3 Oct 2013 23:45:03 -0700
+Subject: ARM: shmobile: r8a7779: add I2C clock for DT
+
+10e8d4f6dddb0f9dc408c2f2bde8399b243a42ca
+(ARM: mach-shmobile: r8a7779: Minimal setup using DT)
+added I2C driver for DT, but it didn't add clock.
+This patch adds missing clock for I2C
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b918b68123718f262abcac6509dc8c05ee47e851)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7779.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
+index 1f7080fab0a5..badb8b7142fb 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7779.c
++++ b/arch/arm/mach-shmobile/clock-r8a7779.c
+@@ -184,9 +184,13 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
+ CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP016]), /* TMU02 */
+ CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
++ CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
+ CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
++ CLKDEV_DEV_ID("ffc71000.i2c", &mstp_clks[MSTP029]), /* I2C1 */
+ CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
++ CLKDEV_DEV_ID("ffc72000.i2c", &mstp_clks[MSTP028]), /* I2C2 */
+ CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
++ CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
+ CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
+ CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
+ CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
+--
+1.8.5.rc3
+
--- /dev/null
+From 1565279d65bbd12cff4c2c3b6e357fee5a8a7ea2 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 8 Oct 2013 12:16:08 +0900
+Subject: ARM: shmobile: Select IRQC in case of the r8a7791 SoC
+
+The r8a7791 contains IRQC hardware so make sure
+the driver gets built by selecting RENESAS_IRQC.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e08d287afb76b3b6925f7261918fa611a7e0b3ca)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index a4a4b75109b2..ff7c4ce8a99f 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -100,6 +100,7 @@ config ARCH_R8A7791
+ select ARM_GIC
+ select CPU_V7
+ select SH_CLK_CPG
++ select RENESAS_IRQC
+
+ config ARCH_EMEV2
+ bool "Emma Mobile EV2"
+--
+1.8.5.rc3
+
--- /dev/null
+From 090714c4c280d32eea7040a979fc8d659e8d3861 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 8 Oct 2013 12:39:10 +0900
+Subject: ARM: shmobile: r8a7791 PFC platform device support
+
+Add a platform device for the r8a7791 PFC device.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 35040127be095487ce1e2f6a487a65b92d794b7f)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/include/mach/r8a7791.h | 1 +
+ arch/arm/mach-shmobile/setup-r8a7791.c | 13 +++++++++++++
+ 2 files changed, 14 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h
+index 051ead3c286e..200fa699f730 100644
+--- a/arch/arm/mach-shmobile/include/mach/r8a7791.h
++++ b/arch/arm/mach-shmobile/include/mach/r8a7791.h
+@@ -4,6 +4,7 @@
+ void r8a7791_add_standard_devices(void);
+ void r8a7791_add_dt_devices(void);
+ void r8a7791_clock_init(void);
++void r8a7791_pinmux_init(void);
+ void r8a7791_init_early(void);
+ extern struct smp_operations r8a7791_smp_ops;
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
+index d9393d61ee27..84cad8cb6af4 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7791.c
++++ b/arch/arm/mach-shmobile/setup-r8a7791.c
+@@ -31,6 +31,19 @@
+ #include <mach/rcar-gen2.h>
+ #include <asm/mach/arch.h>
+
++static const struct resource pfc_resources[] __initconst = {
++ DEFINE_RES_MEM(0xe6060000, 0x250),
++};
++
++#define r8a7791_register_pfc() \
++ platform_device_register_simple("pfc-r8a7791", -1, pfc_resources, \
++ ARRAY_SIZE(pfc_resources))
++
++void __init r8a7791_pinmux_init(void)
++{
++ r8a7791_register_pfc();
++}
++
+ #define SCIF_COMMON(scif_type, baseaddr, irq) \
+ .type = scif_type, \
+ .mapbase = baseaddr, \
+--
+1.8.5.rc3
+
--- /dev/null
+From aa44d7cf79d69878209fc0d1dba4f1c4f47b1b64 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 8 Oct 2013 12:39:20 +0900
+Subject: ARM: shmobile: Select GPIO in case of the r8a7791 SoC
+
+Make it possible to build GPIO on r8a7791.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit cc3a17d799481c502485d8c0770b888c3b4d788d)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index ff7c4ce8a99f..4e1cc76f001b 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -97,6 +97,7 @@ config ARCH_R8A7790
+
+ config ARCH_R8A7791
+ bool "R-Car M2 (R8A77910)"
++ select ARCH_WANT_OPTIONAL_GPIOLIB
+ select ARM_GIC
+ select CPU_V7
+ select SH_CLK_CPG
+--
+1.8.5.rc3
+
--- /dev/null
+From 2a8153e2d7d33952d09f5c203e7b5bfa23061480 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 8 Oct 2013 12:39:39 +0900
+Subject: ARM: shmobile: r8a7791 GPIO platform device support
+
+Add GPIO controller platform devices for the r8a7791 SoC.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 93ff916305517f909ba616414d3ce1e55e6a4e43)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7791.c | 40 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
+index 84cad8cb6af4..59dd442f48ae 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7791.c
++++ b/arch/arm/mach-shmobile/setup-r8a7791.c
+@@ -22,6 +22,7 @@
+ #include <linux/irq.h>
+ #include <linux/kernel.h>
+ #include <linux/of_platform.h>
++#include <linux/platform_data/gpio-rcar.h>
+ #include <linux/platform_data/irq-renesas-irqc.h>
+ #include <linux/serial_sci.h>
+ #include <linux/sh_timer.h>
+@@ -39,9 +40,48 @@ static const struct resource pfc_resources[] __initconst = {
+ platform_device_register_simple("pfc-r8a7791", -1, pfc_resources, \
+ ARRAY_SIZE(pfc_resources))
+
++#define R8A7791_GPIO(idx, base, nr) \
++static const struct resource r8a7791_gpio##idx##_resources[] __initconst = { \
++ DEFINE_RES_MEM((base), 0x50), \
++ DEFINE_RES_IRQ(gic_spi(4 + (idx))), \
++}; \
++ \
++static const struct gpio_rcar_config \
++r8a7791_gpio##idx##_platform_data __initconst = { \
++ .gpio_base = 32 * (idx), \
++ .irq_base = 0, \
++ .number_of_pins = (nr), \
++ .pctl_name = "pfc-r8a7791", \
++ .has_both_edge_trigger = 1, \
++}; \
++
++R8A7791_GPIO(0, 0xe6050000, 32);
++R8A7791_GPIO(1, 0xe6051000, 32);
++R8A7791_GPIO(2, 0xe6052000, 32);
++R8A7791_GPIO(3, 0xe6053000, 32);
++R8A7791_GPIO(4, 0xe6054000, 32);
++R8A7791_GPIO(5, 0xe6055000, 32);
++R8A7791_GPIO(6, 0xe6055400, 32);
++R8A7791_GPIO(7, 0xe6055800, 26);
++
++#define r8a7791_register_gpio(idx) \
++ platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
++ r8a7791_gpio##idx##_resources, \
++ ARRAY_SIZE(r8a7791_gpio##idx##_resources), \
++ &r8a7791_gpio##idx##_platform_data, \
++ sizeof(r8a7791_gpio##idx##_platform_data))
++
+ void __init r8a7791_pinmux_init(void)
+ {
+ r8a7791_register_pfc();
++ r8a7791_register_gpio(0);
++ r8a7791_register_gpio(1);
++ r8a7791_register_gpio(2);
++ r8a7791_register_gpio(3);
++ r8a7791_register_gpio(4);
++ r8a7791_register_gpio(5);
++ r8a7791_register_gpio(6);
++ r8a7791_register_gpio(7);
+ }
+
+ #define SCIF_COMMON(scif_type, baseaddr, irq) \
+--
+1.8.5.rc3
+
--- /dev/null
+From 0c8bb1baaaa6731752a47bf96830d02740e3e472 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 7 Oct 2013 22:59:23 -0700
+Subject: ARM: shmobile: r8a73a4: don't use named irq for DMAEngine
+
+sh-dma-engine driver doesn't care irq name.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1a936a38561b6b12c5075f704d97688ae56ceb05)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a73a4.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
+index b0f2749071be..cc94b64c2ef5 100644
+--- a/arch/arm/mach-shmobile/setup-r8a73a4.c
++++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
+@@ -275,7 +275,7 @@ static const struct sh_dmae_pdata dma_pdata = {
+
+ static struct resource dma_resources[] = {
+ DEFINE_RES_MEM(0xe6700020, 0x89e0),
+- DEFINE_RES_IRQ_NAMED(gic_spi(220), "error_irq"),
++ DEFINE_RES_IRQ(gic_spi(220)),
+ {
+ /* IRQ for channels 0-19 */
+ .start = gic_spi(200),
+--
+1.8.5.rc3
+
--- /dev/null
+From 8b82539c6d63b7be518723c092e420ce40bd4e32 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 10 Oct 2013 07:57:42 +0900
+Subject: ARM: shmobile: Select GPIO in case of the r7s72100 SoC
+
+The r7s72100 contains GPIO controllers so make sure the GPIO
+subsystem can be built by selecting ARCH_WANT_OPTIONAL_GPIOLIB.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 091b258c325592074386e092ee3fff343458550d)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index 4e1cc76f001b..c604ef1cd9d1 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -111,6 +111,7 @@ config ARCH_EMEV2
+
+ config ARCH_R7S72100
+ bool "RZ/A1H (R7S72100)"
++ select ARCH_WANT_OPTIONAL_GPIOLIB
+ select ARM_GIC
+ select CPU_V7
+ select SH_CLK_CPG
+--
+1.8.5.rc3
+
--- /dev/null
+From 9295cf501cfa98e5d2c07f5b2cf006ea0fa65649 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 3 Oct 2013 18:32:10 -0700
+Subject: ARM: shmobile: r8a7778: add MMCIF clock support for DT
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ecf2b14fb93ca305ca54f89cfedba91e5aa3ff85)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7778.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
+index a77089fb0707..e04371505c04 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7778.c
++++ b/arch/arm/mach-shmobile/clock-r8a7778.c
+@@ -173,6 +173,7 @@ static struct clk_lookup lookups[] = {
+
+ /* MSTP32 clocks */
+ CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
++ CLKDEV_DEV_ID("ffe4e000.mmcif", &mstp_clks[MSTP331]), /* MMC */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
+--
+1.8.5.rc3
+
--- /dev/null
+From 048bbd6e70876c42424305785dd233f78cb29c12 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 10 Oct 2013 23:35:17 -0700
+Subject: ARM: shmobile: r8a7778: add SDHI clock support for DT
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 67c01c3e0ff8d2e8d16e20574ad9a8342df58924)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7778.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
+index e04371505c04..011564fd87b1 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7778.c
++++ b/arch/arm/mach-shmobile/clock-r8a7778.c
+@@ -175,8 +175,11 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
+ CLKDEV_DEV_ID("ffe4e000.mmcif", &mstp_clks[MSTP331]), /* MMC */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
++ CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
++ CLKDEV_DEV_ID("ffe4d000.sdhi", &mstp_clks[MSTP322]), /* SDHI1 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
++ CLKDEV_DEV_ID("ffe4f000.sdhi", &mstp_clks[MSTP321]), /* SDHI2 */
+ CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */
+ CLKDEV_DEV_ID("r8a7778-vin.0", &mstp_clks[MSTP110]), /* VIN0 */
+ CLKDEV_DEV_ID("r8a7778-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
+--
+1.8.5.rc3
+
--- /dev/null
+From 7cb2659f384ce2b0bbd0a8e7d2837f6596271241 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 10 Oct 2013 23:36:10 -0700
+Subject: ARM: shmobile: r8a7779: add SDHI clock support for DT
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ac0ddd9d0baa68e952428325d42cc50a80b18761)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7779.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
+index badb8b7142fb..5c83259183d0 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7779.c
++++ b/arch/arm/mach-shmobile/clock-r8a7779.c
+@@ -201,9 +201,13 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
+ CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
++ CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
++ CLKDEV_DEV_ID("ffe4d000.sdhi", &mstp_clks[MSTP322]), /* SDHI1 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
++ CLKDEV_DEV_ID("ffe4e000.sdhi", &mstp_clks[MSTP321]), /* SDHI2 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */
++ CLKDEV_DEV_ID("ffe4f000.sdhi", &mstp_clks[MSTP320]), /* SDHI3 */
+ CLKDEV_DEV_ID("rcar-du-r8a7779", &mstp_clks[MSTP103]), /* DU */
+ };
+
+--
+1.8.5.rc3
+
--- /dev/null
+From ba80f2ca65bb30c00e3443d706fbe65392911a62 Mon Sep 17 00:00:00 2001
+From: Valentine Barshak <valentine.barshak@cogentembedded.com>
+Date: Thu, 10 Oct 2013 02:14:46 +0400
+Subject: ARM: shmobile: r8a7790: Add USBHS clock support
+
+This adds USBHS clock support.
+
+Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 65779cb40f26b3b8638729a5216dad771216ce2a)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
+index fa1b4773677a..b472e2875f18 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7790.c
++++ b/arch/arm/mach-shmobile/clock-r8a7790.c
+@@ -186,6 +186,7 @@ enum {
+ MSTP813,
+ MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
+ MSTP717, MSTP716,
++ MSTP704,
+ MSTP522,
+ MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
+ MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
+@@ -208,6 +209,7 @@ static struct clk mstp_clks[MSTP_NR] = {
+ [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
+ [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
+ [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
++ [MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HSUSB */
+ [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
+ [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
+ [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
+@@ -296,6 +298,8 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
+ CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
+ CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
++ CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
++ CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
+ };
+
+ #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
+--
+1.8.5.rc3
+
--- /dev/null
+From 20f8a1ebbe1bfdfea95969e962d350f0d71f3863 Mon Sep 17 00:00:00 2001
+From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
+Date: Tue, 22 Oct 2013 11:21:11 +0900
+Subject: ARM: shmobile: r8a7790: add QSPI support
+
+Adds support for QSPI on the r8a7790.
+
+Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3dd3b1cf068a64a71f1b40319ca33fcb50842bc0)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7790.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
+index b472e2875f18..571bffdf6089 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7790.c
++++ b/arch/arm/mach-shmobile/clock-r8a7790.c
+@@ -183,6 +183,7 @@ static struct clk div6_clks[DIV6_NR] = {
+ /* MSTP */
+ enum {
+ MSTP931, MSTP930, MSTP929, MSTP928,
++ MSTP917,
+ MSTP813,
+ MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
+ MSTP717, MSTP716,
+@@ -199,6 +200,7 @@ static struct clk mstp_clks[MSTP_NR] = {
+ [MSTP930] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 30, 0), /* I2C1 */
+ [MSTP929] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 29, 0), /* I2C2 */
+ [MSTP928] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 28, 0), /* I2C3 */
++ [MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
+ [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
+ [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
+ [MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
+@@ -298,6 +300,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
+ CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
+ CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
++ CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
+ CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
+ CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From a1d5b2d89ec8281dbaedb197d9223c976bda5d8e Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 6 Nov 2013 19:43:32 +0900
+Subject: ARM: shmobile: Enable MTU2 on r7s72100
+
+Add MTU2 as r7s72100 system timer.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d18e06116d5e7b277e73e3bdc6e08208aabcedc7)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r7s72100.c | 1 +
+ arch/arm/mach-shmobile/setup-r7s72100.c | 22 ++++++++++++++++++++++
+ 2 files changed, 23 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
+index 0814a508fd61..7b457aed8253 100644
+--- a/arch/arm/mach-shmobile/clock-r7s72100.c
++++ b/arch/arm/mach-shmobile/clock-r7s72100.c
+@@ -181,6 +181,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
++ CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
+ };
+
+ void __init r7s72100_clock_init(void)
+diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
+index d4eb509a1c87..55f0b9c7c482 100644
+--- a/arch/arm/mach-shmobile/setup-r7s72100.c
++++ b/arch/arm/mach-shmobile/setup-r7s72100.c
+@@ -22,6 +22,7 @@
+ #include <linux/kernel.h>
+ #include <linux/of_platform.h>
+ #include <linux/serial_sci.h>
++#include <linux/sh_timer.h>
+ #include <mach/common.h>
+ #include <mach/irqs.h>
+ #include <mach/r7s72100.h>
+@@ -58,6 +59,26 @@ static inline void r7s72100_register_scif(int idx)
+ sizeof(struct plat_sci_port));
+ }
+
++
++static struct sh_timer_config mtu2_0_platform_data __initdata = {
++ .name = "MTU2_0",
++ .timer_bit = 0,
++ .channel_offset = -0x80,
++ .clockevent_rating = 200,
++};
++
++static struct resource mtu2_0_resources[] __initdata = {
++ DEFINE_RES_MEM(0xfcff0300, 0x27),
++ DEFINE_RES_IRQ(gic_iid(139)), /* MTU2 TGI0A */
++};
++
++#define r7s72100_register_mtu2(idx) \
++ platform_device_register_resndata(&platform_bus, "sh_mtu2", \
++ idx, mtu2_##idx##_resources, \
++ ARRAY_SIZE(mtu2_##idx##_resources), \
++ &mtu2_##idx##_platform_data, \
++ sizeof(struct sh_timer_config))
++
+ void __init r7s72100_add_dt_devices(void)
+ {
+ r7s72100_register_scif(SCIF0);
+@@ -68,6 +89,7 @@ void __init r7s72100_add_dt_devices(void)
+ r7s72100_register_scif(SCIF5);
+ r7s72100_register_scif(SCIF6);
+ r7s72100_register_scif(SCIF7);
++ r7s72100_register_mtu2(0);
+ }
+
+ void __init r7s72100_init_early(void)
+--
+1.8.5.rc3
+
--- /dev/null
+From 8bef90559c69796b88215d23b9e351db022a7ba5 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 7 Nov 2013 08:21:11 +0900
+Subject: ARM: shmobile: Add shared EMEV2 code for ->init_machine()
+
+Add a SoC specific function that initializes
+clocks and starts DT probing in case of EMEV2.
+
+This EMEV2 SoC support code may be built for
+either legacy SHMOBILE or SMOBILE_MULTI.
+
+The change allows us to support existing board
+specific KZM9D DTB with these SoC specific
+DT_MACHINE_START() callbacks.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a3153e6cbaa878c52bcd547f24f89282c660e2e7)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-emev2.c | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
+index 3ad531caf4f0..2d64b95dcc43 100644
+--- a/arch/arm/mach-shmobile/setup-emev2.c
++++ b/arch/arm/mach-shmobile/setup-emev2.c
+@@ -16,6 +16,7 @@
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
++#include <linux/clk-provider.h>
+ #include <linux/kernel.h>
+ #include <linux/init.h>
+ #include <linux/interrupt.h>
+@@ -197,6 +198,16 @@ void __init emev2_init_delay(void)
+
+ #ifdef CONFIG_USE_OF
+
++static void __init emev2_add_standard_devices_dt(void)
++{
++#ifdef CONFIG_COMMON_CLK
++ of_clk_init(NULL);
++#else
++ emev2_clock_init();
++#endif
++ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
++}
++
+ static const char *emev2_boards_compat_dt[] __initdata = {
+ "renesas,emev2",
+ NULL,
+@@ -206,6 +217,7 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
+ .smp = smp_ops(emev2_smp_ops),
+ .map_io = emev2_map_io,
+ .init_early = emev2_init_delay,
++ .init_machine = emev2_add_standard_devices_dt,
+ .dt_compat = emev2_boards_compat_dt,
+ MACHINE_END
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 0e41f32aa5d5d6c987ec6de1aa8530fd17d08bd3 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 7 Nov 2013 08:21:20 +0900
+Subject: ARM: shmobile: Use ->init_late() in shared EMEV2 case
+
+Hook up shmobile_init_late() to enable various
+code such as suspend-to-RAM and CPUIdle.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3f348e1c3f47f4c0c21cb1f4c1d6af4ea02d59e8)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-emev2.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
+index 2d64b95dcc43..4d39bf49aae2 100644
+--- a/arch/arm/mach-shmobile/setup-emev2.c
++++ b/arch/arm/mach-shmobile/setup-emev2.c
+@@ -218,6 +218,7 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
+ .map_io = emev2_map_io,
+ .init_early = emev2_init_delay,
+ .init_machine = emev2_add_standard_devices_dt,
++ .init_late = shmobile_init_late,
+ .dt_compat = emev2_boards_compat_dt,
+ MACHINE_END
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 78faf583949a6c4508016a4de0dcf6e92b7be9fe Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 7 Nov 2013 08:21:29 +0900
+Subject: ARM: shmobile: Remove legacy KZM9D board code
+
+Remove the C and platform device version of KZM9D.
+
+The DT version of KZM9D board support can now instead
+directly be used with SoC specific code in setup-emev2.c.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 786deb29e7b7c356342f9f3566a6eafae2ce0c81)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 6 ---
+ arch/arm/mach-shmobile/Makefile | 1 -
+ arch/arm/mach-shmobile/Makefile.boot | 1 -
+ arch/arm/mach-shmobile/board-kzm9d.c | 92 ------------------------------------
+ 4 files changed, 100 deletions(-)
+ delete mode 100644 arch/arm/mach-shmobile/board-kzm9d.c
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index c604ef1cd9d1..564e0ade3472 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -234,12 +234,6 @@ config MACH_KOELSCH
+ depends on ARCH_R8A7791
+ select USE_OF
+
+-config MACH_KZM9D
+- bool "KZM9D board"
+- depends on ARCH_EMEV2
+- select REGULATOR_FIXED_VOLTAGE if REGULATOR
+- select USE_OF
+-
+ config MACH_KZM9G
+ bool "KZM-A9-GT board"
+ depends on ARCH_SH73A0
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index 51db2bcafabf..c7e877499dc2 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -71,7 +71,6 @@ obj-$(CONFIG_MACH_LAGER_REFERENCE) += board-lager-reference.o
+ obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
+ obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
+ obj-$(CONFIG_MACH_KOELSCH) += board-koelsch.o
+-obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o
+ obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
+ obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o
+ endif
+diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
+index 391d72a5536c..4f30e3dc0919 100644
+--- a/arch/arm/mach-shmobile/Makefile.boot
++++ b/arch/arm/mach-shmobile/Makefile.boot
+@@ -8,7 +8,6 @@ loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
+ loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
+ loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
+ loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
+-loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
+ loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
+ loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
+ loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
+diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
+deleted file mode 100644
+index 30c2cc695b12..000000000000
+--- a/arch/arm/mach-shmobile/board-kzm9d.c
++++ /dev/null
+@@ -1,92 +0,0 @@
+-/*
+- * kzm9d board support
+- *
+- * Copyright (C) 2012 Renesas Solutions Corp.
+- * Copyright (C) 2012 Magnus Damm
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+- */
+-
+-#include <linux/kernel.h>
+-#include <linux/interrupt.h>
+-#include <linux/platform_device.h>
+-#include <linux/regulator/fixed.h>
+-#include <linux/regulator/machine.h>
+-#include <linux/smsc911x.h>
+-#include <mach/common.h>
+-#include <mach/emev2.h>
+-#include <asm/mach-types.h>
+-#include <asm/mach/arch.h>
+-
+-/* Dummy supplies, where voltage doesn't matter */
+-static struct regulator_consumer_supply dummy_supplies[] = {
+- REGULATOR_SUPPLY("vddvario", "smsc911x"),
+- REGULATOR_SUPPLY("vdd33a", "smsc911x"),
+-};
+-
+-/* Ether */
+-static struct resource smsc911x_resources[] = {
+- [0] = {
+- .start = 0x20000000,
+- .end = 0x2000ffff,
+- .flags = IORESOURCE_MEM,
+- },
+- [1] = {
+- .start = EMEV2_GPIO_IRQ(1),
+- .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
+- },
+-};
+-
+-static struct smsc911x_platform_config smsc911x_platdata = {
+- .flags = SMSC911X_USE_32BIT,
+- .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
+- .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
+-};
+-
+-static struct platform_device smsc91x_device = {
+- .name = "smsc911x",
+- .id = -1,
+- .dev = {
+- .platform_data = &smsc911x_platdata,
+- },
+- .num_resources = ARRAY_SIZE(smsc911x_resources),
+- .resource = smsc911x_resources,
+-};
+-
+-static struct platform_device *kzm9d_devices[] __initdata = {
+- &smsc91x_device,
+-};
+-
+-void __init kzm9d_add_standard_devices(void)
+-{
+- regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
+-
+- emev2_add_standard_devices();
+-
+- platform_add_devices(kzm9d_devices, ARRAY_SIZE(kzm9d_devices));
+-}
+-
+-static const char *kzm9d_boards_compat_dt[] __initdata = {
+- "renesas,kzm9d",
+- NULL,
+-};
+-
+-DT_MACHINE_START(KZM9D_DT, "kzm9d")
+- .smp = smp_ops(emev2_smp_ops),
+- .map_io = emev2_map_io,
+- .init_early = emev2_init_delay,
+- .init_machine = kzm9d_add_standard_devices,
+- .init_late = shmobile_init_late,
+- .dt_compat = kzm9d_boards_compat_dt,
+-MACHINE_END
+--
+1.8.5.rc3
+
--- /dev/null
+From 6915d2628773cc1786f835c6dbf8ab1ff8517418 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 7 Nov 2013 08:21:38 +0900
+Subject: ARM: shmobile: Remove legacy platform devices from EMEV2 SoC code
+
+Now when KZM9D legacy C board support code is
+gone then remove emev2_add_standard_devices()
+and all the platform devices from setup-emev2.c.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 59032702ead9056231f273e0e99655c2f2280491)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/include/mach/emev2.h | 5 -
+ arch/arm/mach-shmobile/setup-emev2.c | 148 ----------------------------
+ 2 files changed, 153 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
+index c2eb7568d9be..fcb142a14e07 100644
+--- a/arch/arm/mach-shmobile/include/mach/emev2.h
++++ b/arch/arm/mach-shmobile/include/mach/emev2.h
+@@ -3,12 +3,7 @@
+
+ extern void emev2_map_io(void);
+ extern void emev2_init_delay(void);
+-extern void emev2_add_standard_devices(void);
+ extern void emev2_clock_init(void);
+-
+-#define EMEV2_GPIO_BASE 200
+-#define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n))
+-
+ extern struct smp_operations emev2_smp_ops;
+
+ #endif /* __ASM_EMEV2_H__ */
+diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
+index 4d39bf49aae2..e7031b071274 100644
+--- a/arch/arm/mach-shmobile/setup-emev2.c
++++ b/arch/arm/mach-shmobile/setup-emev2.c
+@@ -19,22 +19,12 @@
+ #include <linux/clk-provider.h>
+ #include <linux/kernel.h>
+ #include <linux/init.h>
+-#include <linux/interrupt.h>
+-#include <linux/irq.h>
+-#include <linux/platform_device.h>
+-#include <linux/platform_data/gpio-em.h>
+ #include <linux/of_platform.h>
+-#include <linux/delay.h>
+-#include <linux/input.h>
+-#include <linux/io.h>
+-#include <linux/irqchip/arm-gic.h>
+ #include <mach/common.h>
+ #include <mach/emev2.h>
+-#include <mach/irqs.h>
+ #include <asm/mach-types.h>
+ #include <asm/mach/arch.h>
+ #include <asm/mach/map.h>
+-#include <asm/mach/time.h>
+
+ static struct map_desc emev2_io_desc[] __initdata = {
+ #ifdef CONFIG_SMP
+@@ -53,144 +43,6 @@ void __init emev2_map_io(void)
+ iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc));
+ }
+
+-/* UART */
+-static struct resource uart0_resources[] = {
+- DEFINE_RES_MEM(0xe1020000, 0x38),
+- DEFINE_RES_IRQ(40),
+-};
+-
+-static struct resource uart1_resources[] = {
+- DEFINE_RES_MEM(0xe1030000, 0x38),
+- DEFINE_RES_IRQ(41),
+-};
+-
+-static struct resource uart2_resources[] = {
+- DEFINE_RES_MEM(0xe1040000, 0x38),
+- DEFINE_RES_IRQ(42),
+-};
+-
+-static struct resource uart3_resources[] = {
+- DEFINE_RES_MEM(0xe1050000, 0x38),
+- DEFINE_RES_IRQ(43),
+-};
+-
+-#define emev2_register_uart(idx) \
+- platform_device_register_simple("serial8250-em", idx, \
+- uart##idx##_resources, \
+- ARRAY_SIZE(uart##idx##_resources))
+-
+-/* STI */
+-static struct resource sti_resources[] = {
+- DEFINE_RES_MEM(0xe0180000, 0x54),
+- DEFINE_RES_IRQ(157),
+-};
+-
+-#define emev2_register_sti() \
+- platform_device_register_simple("em_sti", 0, \
+- sti_resources, \
+- ARRAY_SIZE(sti_resources))
+-
+-/* GIO */
+-static struct gpio_em_config gio0_config = {
+- .gpio_base = 0,
+- .irq_base = EMEV2_GPIO_IRQ(0),
+- .number_of_pins = 32,
+-};
+-
+-static struct resource gio0_resources[] = {
+- DEFINE_RES_MEM(0xe0050000, 0x2c),
+- DEFINE_RES_MEM(0xe0050040, 0x20),
+- DEFINE_RES_IRQ(99),
+- DEFINE_RES_IRQ(100),
+-};
+-
+-static struct gpio_em_config gio1_config = {
+- .gpio_base = 32,
+- .irq_base = EMEV2_GPIO_IRQ(32),
+- .number_of_pins = 32,
+-};
+-
+-static struct resource gio1_resources[] = {
+- DEFINE_RES_MEM(0xe0050080, 0x2c),
+- DEFINE_RES_MEM(0xe00500c0, 0x20),
+- DEFINE_RES_IRQ(101),
+- DEFINE_RES_IRQ(102),
+-};
+-
+-static struct gpio_em_config gio2_config = {
+- .gpio_base = 64,
+- .irq_base = EMEV2_GPIO_IRQ(64),
+- .number_of_pins = 32,
+-};
+-
+-static struct resource gio2_resources[] = {
+- DEFINE_RES_MEM(0xe0050100, 0x2c),
+- DEFINE_RES_MEM(0xe0050140, 0x20),
+- DEFINE_RES_IRQ(103),
+- DEFINE_RES_IRQ(104),
+-};
+-
+-static struct gpio_em_config gio3_config = {
+- .gpio_base = 96,
+- .irq_base = EMEV2_GPIO_IRQ(96),
+- .number_of_pins = 32,
+-};
+-
+-static struct resource gio3_resources[] = {
+- DEFINE_RES_MEM(0xe0050180, 0x2c),
+- DEFINE_RES_MEM(0xe00501c0, 0x20),
+- DEFINE_RES_IRQ(105),
+- DEFINE_RES_IRQ(106),
+-};
+-
+-static struct gpio_em_config gio4_config = {
+- .gpio_base = 128,
+- .irq_base = EMEV2_GPIO_IRQ(128),
+- .number_of_pins = 31,
+-};
+-
+-static struct resource gio4_resources[] = {
+- DEFINE_RES_MEM(0xe0050200, 0x2c),
+- DEFINE_RES_MEM(0xe0050240, 0x20),
+- DEFINE_RES_IRQ(107),
+- DEFINE_RES_IRQ(108),
+-};
+-
+-#define emev2_register_gio(idx) \
+- platform_device_register_resndata(&platform_bus, "em_gio", \
+- idx, gio##idx##_resources, \
+- ARRAY_SIZE(gio##idx##_resources), \
+- &gio##idx##_config, \
+- sizeof(struct gpio_em_config))
+-
+-static struct resource pmu_resources[] = {
+- DEFINE_RES_IRQ(152),
+- DEFINE_RES_IRQ(153),
+-};
+-
+-#define emev2_register_pmu() \
+- platform_device_register_simple("arm-pmu", -1, \
+- pmu_resources, \
+- ARRAY_SIZE(pmu_resources))
+-
+-void __init emev2_add_standard_devices(void)
+-{
+- if (!IS_ENABLED(CONFIG_COMMON_CLK))
+- emev2_clock_init();
+-
+- emev2_register_uart(0);
+- emev2_register_uart(1);
+- emev2_register_uart(2);
+- emev2_register_uart(3);
+- emev2_register_sti();
+- emev2_register_gio(0);
+- emev2_register_gio(1);
+- emev2_register_gio(2);
+- emev2_register_gio(3);
+- emev2_register_gio(4);
+- emev2_register_pmu();
+-}
+-
+ void __init emev2_init_delay(void)
+ {
+ shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
+--
+1.8.5.rc3
+
--- /dev/null
+From 2149eaea3f8816f3db0fbcdbdaab836a848e4489 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 31 Oct 2013 18:22:39 -0700
+Subject: ARM: shmobile: r8a7778: add HSPI clock support for DT
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6c334d232ab446cc6388430a019fc1072599b718)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7778.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
+index 011564fd87b1..54064346dafb 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7778.c
++++ b/arch/arm/mach-shmobile/clock-r8a7778.c
+@@ -203,8 +203,11 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
+ CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
+ CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
++ CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
+ CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
++ CLKDEV_DEV_ID("fffc8000.spi", &mstp_clks[MSTP007]), /* HSPI1 */
+ CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
++ CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
+ CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP008]), /* SRU */
+
+ CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP012]),
+--
+1.8.5.rc3
+
--- /dev/null
+From b5cf4396d28096d0cc9743a0736420770fcfb2aa Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Fri, 8 Nov 2013 19:09:34 +0900
+Subject: ARM: shmobile: Select USE_OF on EMEV2
+
+Now when the legacy KZM9D board code is gone, make sure
+USE_OF is selected in case of the EMEV2 SoC.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 81fd1b68796aadae70751ba8805b34b20df09e1b)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 1 +
+ arch/arm/mach-shmobile/setup-emev2.c | 4 ----
+ 2 files changed, 1 insertion(+), 4 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index 564e0ade3472..180b71fd86f8 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -108,6 +108,7 @@ config ARCH_EMEV2
+ select ARCH_WANT_OPTIONAL_GPIOLIB
+ select ARM_GIC
+ select CPU_V7
++ select USE_OF
+
+ config ARCH_R7S72100
+ bool "RZ/A1H (R7S72100)"
+diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
+index e7031b071274..c8f2a1a69a52 100644
+--- a/arch/arm/mach-shmobile/setup-emev2.c
++++ b/arch/arm/mach-shmobile/setup-emev2.c
+@@ -48,8 +48,6 @@ void __init emev2_init_delay(void)
+ shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
+ }
+
+-#ifdef CONFIG_USE_OF
+-
+ static void __init emev2_add_standard_devices_dt(void)
+ {
+ #ifdef CONFIG_COMMON_CLK
+@@ -73,5 +71,3 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
+ .init_late = shmobile_init_late,
+ .dt_compat = emev2_boards_compat_dt,
+ MACHINE_END
+-
+-#endif /* CONFIG_USE_OF */
+--
+1.8.5.rc3
+
--- /dev/null
+From 31254618a94942b471b7c6fdb796f19a7e2089da Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 13 Nov 2013 14:01:42 +0100
+Subject: ARM: shmobile: r8a7791: Add DU and LVDS clocks
+
+The ZX parent clock isn't implemented yet, add it as well.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit cf4f85ccd5c235123a8a1827d2265da5c33a1bb0)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7791.c | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
+index c9a26f16ce5b..fda7c6cb6921 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7791.c
++++ b/arch/arm/mach-shmobile/clock-r8a7791.c
+@@ -103,6 +103,7 @@ SH_FIXED_RATIO_CLK_SET(hp_clk, pll1_clk, 1, 12);
+ SH_FIXED_RATIO_CLK_SET(p_clk, pll1_clk, 1, 24);
+ SH_FIXED_RATIO_CLK_SET(rclk_clk, pll1_clk, 1, (48 * 1024));
+ SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15);
++SH_FIXED_RATIO_CLK_SET(zx_clk, pll1_clk, 1, 3);
+
+ static struct clk *main_clks[] = {
+ &extal_clk,
+@@ -116,11 +117,12 @@ static struct clk *main_clks[] = {
+ &rclk_clk,
+ &mp_clk,
+ &cp_clk,
++ &zx_clk,
+ };
+
+ /* MSTP */
+ enum {
+- MSTP721, MSTP720,
++ MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
+ MSTP719, MSTP718, MSTP715, MSTP714,
+ MSTP216, MSTP207, MSTP206,
+ MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
+@@ -129,6 +131,9 @@ enum {
+ };
+
+ static struct clk mstp_clks[MSTP_NR] = {
++ [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
++ [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
++ [MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
+ [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
+ [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
+ [MSTP719] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 19, 0), /* SCIF2 */
+@@ -164,6 +169,9 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_CON_ID("peripheral_clk", &hp_clk),
+
+ /* MSTP */
++ CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7791", &mstp_clks[MSTP726]),
++ CLKDEV_ICK_ID("du.0", "rcar-du-r8a7791", &mstp_clks[MSTP724]),
++ CLKDEV_ICK_ID("du.1", "rcar-du-r8a7791", &mstp_clks[MSTP723]),
+ CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
+ CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
+ CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), /* SCIFB0 */
+--
+1.8.5.rc3
+
--- /dev/null
+From 5bc7df8fede63d6a3b97d710ae26d1bf02bc1881 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 9 Nov 2013 13:33:48 +0100
+Subject: ARM: Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY
+
+SH-Mobile platforms are transitioning from non-multiplatform to
+multiplatform kernel. A new ARCH_SHMOBILE_MULTI configuration symbol has
+been created to group all multiplatform-enabled SH-Mobile SoCs. The
+existing ARCH_SHMOBILE configuration symbol groups SoCs that haven't
+been converted yet.
+
+This arrangement works fine for the arch/ code, but lots of drivers
+needed on both ARCH_SHMOBILE and ARCH_SHMOBILE_MULTI depend on
+ARCH_SHMOBILE only. In order to avoid changing them, rename
+ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY, and create a new boolean
+ARCH_SHMOBILE configuration symbol that is selected by both
+ARCH_SHMOBILE_LEGACY and ARCH_SHMOBILE_MULTI.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bf98c1eac1d4a6bcf00532e4fa41d8126cd6c187)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ arch/arm/Kconfig
+ arch/arm/Makefile
+ arch/arm/boot/dts/Makefile
+ drivers/Makefile
+---
+ arch/arm/Kconfig | 14 ++++++++------
+ arch/arm/Makefile | 1 -
+ arch/arm/boot/compressed/Makefile | 2 +-
+ arch/arm/boot/dts/Makefile | 2 +-
+ arch/arm/configs/ape6evm_defconfig | 2 +-
+ arch/arm/configs/armadillo800eva_defconfig | 2 +-
+ arch/arm/configs/bockw_defconfig | 2 +-
+ arch/arm/configs/koelsch_defconfig | 2 +-
+ arch/arm/configs/kzm9d_defconfig | 2 +-
+ arch/arm/configs/kzm9g_defconfig | 2 +-
+ arch/arm/configs/lager_defconfig | 2 +-
+ arch/arm/configs/mackerel_defconfig | 2 +-
+ arch/arm/configs/marzen_defconfig | 2 +-
+ arch/arm/mach-shmobile/Kconfig | 8 ++++++--
+ drivers/Makefile | 2 +-
+ 15 files changed, 26 insertions(+), 21 deletions(-)
+
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index 9e4b5fd241cd..e965fda96875 100644
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -632,8 +632,9 @@ config ARCH_MSM
+ stack and controls some vital subsystems
+ (clock and power control, etc).
+
+-config ARCH_SHMOBILE
+- bool "Renesas SH-Mobile / R-Mobile"
++config ARCH_SHMOBILE_LEGACY
++ bool "Renesas SH-Mobile / R-Mobile (non-multiplatform)"
++ select ARCH_SHMOBILE
+ select ARM_PATCH_PHYS_VIRT
+ select CLKDEV_LOOKUP
+ select GENERIC_CLOCKEVENTS
+@@ -649,7 +650,8 @@ config ARCH_SHMOBILE
+ select PM_GENERIC_DOMAINS if PM
+ select SPARSE_IRQ
+ help
+- Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
++ Support for Renesas's SH-Mobile and R-Mobile ARM platforms using
++ a non-multiplatform kernel.
+
+ config ARCH_RPC
+ bool "RiscPC"
+@@ -1601,7 +1603,7 @@ config HZ
+ default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
+ ARCH_S5PV210 || ARCH_EXYNOS4
+ default AT91_TIMER_HZ if ARCH_AT91
+- default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
++ default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
+ default 100
+
+ config SCHED_HRTICK
+@@ -1734,8 +1736,8 @@ config HW_PERF_EVENTS
+ source "mm/Kconfig"
+
+ config FORCE_MAX_ZONEORDER
+- int "Maximum zone order" if ARCH_SHMOBILE
+- range 11 64 if ARCH_SHMOBILE
++ int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
++ range 11 64 if ARCH_SHMOBILE_LEGACY
+ default "12" if SOC_AM33XX
+ default "9" if SA1111
+ default "11"
+diff --git a/arch/arm/Makefile b/arch/arm/Makefile
+index f56df13da7b2..1ba358ba16b8 100644
+--- a/arch/arm/Makefile
++++ b/arch/arm/Makefile
+@@ -181,7 +181,6 @@ machine-$(CONFIG_ARCH_EXYNOS) += exynos
+ machine-$(CONFIG_ARCH_SA1100) += sa1100
+ machine-$(CONFIG_ARCH_SHARK) += shark
+ machine-$(CONFIG_ARCH_SHMOBILE) += shmobile
+-machine-$(CONFIG_ARCH_SHMOBILE_MULTI) += shmobile
+ machine-$(CONFIG_ARCH_TEGRA) += tegra
+ machine-$(CONFIG_ARCH_U300) += u300
+ machine-$(CONFIG_ARCH_U8500) += ux500
+diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
+index 120b83bfde20..e60f192571ce 100644
+--- a/arch/arm/boot/compressed/Makefile
++++ b/arch/arm/boot/compressed/Makefile
+@@ -68,7 +68,7 @@ else
+ endif
+ endif
+
+-ifeq ($(CONFIG_ARCH_SHMOBILE),y)
++ifeq ($(CONFIG_ARCH_SHMOBILE_LEGACY),y)
+ OBJS += head-shmobile.o
+ endif
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 5df751b250a1..3ced87adb39d 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -159,7 +159,7 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
+ hrefprev60.dtb \
+ hrefv60plus.dtb \
+ ccu9540.dtb
+-dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
++dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
+ r7s72100-genmai.dtb \
+ r8a7740-armadillo800eva.dtb \
+ r8a7778-bockw.dtb \
+diff --git a/arch/arm/configs/ape6evm_defconfig b/arch/arm/configs/ape6evm_defconfig
+index 1ce39940795d..cb26c62dc722 100644
+--- a/arch/arm/configs/ape6evm_defconfig
++++ b/arch/arm/configs/ape6evm_defconfig
+@@ -13,7 +13,7 @@ CONFIG_EMBEDDED=y
+ CONFIG_PERF_EVENTS=y
+ CONFIG_SLAB=y
+ # CONFIG_BLOCK is not set
+-CONFIG_ARCH_SHMOBILE=y
++CONFIG_ARCH_SHMOBILE_LEGACY=y
+ CONFIG_ARCH_R8A73A4=y
+ CONFIG_MACH_APE6EVM=y
+ # CONFIG_ARM_THUMB is not set
+diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig
+index fae939d3d7f0..5abf1a2e3160 100644
+--- a/arch/arm/configs/armadillo800eva_defconfig
++++ b/arch/arm/configs/armadillo800eva_defconfig
+@@ -15,7 +15,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
+ # CONFIG_BLK_DEV_BSG is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+ # CONFIG_IOSCHED_CFQ is not set
+-CONFIG_ARCH_SHMOBILE=y
++CONFIG_ARCH_SHMOBILE_LEGACY=y
+ CONFIG_ARCH_R8A7740=y
+ CONFIG_MACH_ARMADILLO800EVA=y
+ # CONFIG_SH_TIMER_TMU is not set
+diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
+index 8110d8a653f7..80cff50beb34 100644
+--- a/arch/arm/configs/bockw_defconfig
++++ b/arch/arm/configs/bockw_defconfig
+@@ -8,7 +8,7 @@ CONFIG_SYSCTL_SYSCALL=y
+ CONFIG_EMBEDDED=y
+ CONFIG_SLAB=y
+ # CONFIG_IOSCHED_CFQ is not set
+-CONFIG_ARCH_SHMOBILE=y
++CONFIG_ARCH_SHMOBILE_LEGACY=y
+ CONFIG_ARCH_R8A7778=y
+ CONFIG_MACH_BOCKW=y
+ CONFIG_MEMORY_START=0x60000000
+diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
+index 825c16dee8a0..7fd65a01ec7e 100644
+--- a/arch/arm/configs/koelsch_defconfig
++++ b/arch/arm/configs/koelsch_defconfig
+@@ -9,7 +9,7 @@ CONFIG_EMBEDDED=y
+ CONFIG_PERF_EVENTS=y
+ CONFIG_SLAB=y
+ # CONFIG_BLOCK is not set
+-CONFIG_ARCH_SHMOBILE=y
++CONFIG_ARCH_SHMOBILE_LEGACY=y
+ CONFIG_ARCH_R8A7791=y
+ CONFIG_MACH_KOELSCH=y
+ # CONFIG_SWP_EMULATE is not set
+diff --git a/arch/arm/configs/kzm9d_defconfig b/arch/arm/configs/kzm9d_defconfig
+index e6aed23ac083..e42ce3756af3 100644
+--- a/arch/arm/configs/kzm9d_defconfig
++++ b/arch/arm/configs/kzm9d_defconfig
+@@ -13,7 +13,7 @@ CONFIG_SLAB=y
+ # CONFIG_BLK_DEV_BSG is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+ # CONFIG_IOSCHED_CFQ is not set
+-CONFIG_ARCH_SHMOBILE=y
++CONFIG_ARCH_SHMOBILE_LEGACY=y
+ CONFIG_ARCH_EMEV2=y
+ CONFIG_MACH_KZM9D=y
+ CONFIG_MEMORY_START=0x40000000
+diff --git a/arch/arm/configs/kzm9g_defconfig b/arch/arm/configs/kzm9g_defconfig
+index 1ad028023a64..9934dbc23d64 100644
+--- a/arch/arm/configs/kzm9g_defconfig
++++ b/arch/arm/configs/kzm9g_defconfig
+@@ -22,7 +22,7 @@ CONFIG_MODULE_UNLOAD=y
+ # CONFIG_BLK_DEV_BSG is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+ # CONFIG_IOSCHED_CFQ is not set
+-CONFIG_ARCH_SHMOBILE=y
++CONFIG_ARCH_SHMOBILE_LEGACY=y
+ CONFIG_ARCH_SH73A0=y
+ CONFIG_MACH_KZM9G=y
+ CONFIG_MEMORY_START=0x41000000
+diff --git a/arch/arm/configs/lager_defconfig b/arch/arm/configs/lager_defconfig
+index 35bff5e0d57a..35dc8b2be47f 100644
+--- a/arch/arm/configs/lager_defconfig
++++ b/arch/arm/configs/lager_defconfig
+@@ -12,7 +12,7 @@ CONFIG_SLAB=y
+ # CONFIG_BLK_DEV_BSG is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+ # CONFIG_IOSCHED_CFQ is not set
+-CONFIG_ARCH_SHMOBILE=y
++CONFIG_ARCH_SHMOBILE_LEGACY=y
+ CONFIG_ARCH_R8A7790=y
+ CONFIG_MACH_LAGER=y
+ # CONFIG_SH_TIMER_TMU is not set
+diff --git a/arch/arm/configs/mackerel_defconfig b/arch/arm/configs/mackerel_defconfig
+index 9fb11895b2e2..a61e1653fc5e 100644
+--- a/arch/arm/configs/mackerel_defconfig
++++ b/arch/arm/configs/mackerel_defconfig
+@@ -14,7 +14,7 @@ CONFIG_MODULE_UNLOAD=y
+ # CONFIG_BLK_DEV_BSG is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+ # CONFIG_IOSCHED_CFQ is not set
+-CONFIG_ARCH_SHMOBILE=y
++CONFIG_ARCH_SHMOBILE_LEGACY=y
+ CONFIG_ARCH_SH7372=y
+ CONFIG_MACH_MACKEREL=y
+ CONFIG_MEMORY_SIZE=0x10000000
+diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
+index dd4aced59d3c..f21bd405cc2a 100644
+--- a/arch/arm/configs/marzen_defconfig
++++ b/arch/arm/configs/marzen_defconfig
+@@ -9,7 +9,7 @@ CONFIG_SYSCTL_SYSCALL=y
+ CONFIG_EMBEDDED=y
+ CONFIG_SLAB=y
+ # CONFIG_IOSCHED_CFQ is not set
+-CONFIG_ARCH_SHMOBILE=y
++CONFIG_ARCH_SHMOBILE_LEGACY=y
+ CONFIG_ARCH_R8A7779=y
+ CONFIG_MACH_MARZEN=y
+ CONFIG_MEMORY_START=0x60000000
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index 180b71fd86f8..1b7df173db0e 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -1,6 +1,10 @@
++config ARCH_SHMOBILE
++ bool
++
+ config ARCH_SHMOBILE_MULTI
+ bool "SH-Mobile Series" if ARCH_MULTI_V7
+ depends on MMU
++ select ARCH_SHMOBILE
+ select CPU_V7
+ select GENERIC_CLOCKEVENTS
+ select HAVE_ARM_SCU if SMP
+@@ -30,7 +34,7 @@ config MACH_KZM9D
+ comment "SH-Mobile System Configuration"
+ endif
+
+-if ARCH_SHMOBILE
++if ARCH_SHMOBILE_LEGACY
+
+ comment "SH-Mobile System Type"
+
+@@ -272,7 +276,7 @@ source "drivers/sh/Kconfig"
+
+ endif
+
+-if ARCH_SHMOBILE || ARCH_SHMOBILE_MULTI
++if ARCH_SHMOBILE
+
+ menu "Timer and clock configuration"
+
+diff --git a/drivers/Makefile b/drivers/Makefile
+index 130abc1dfd65..4548367a2cb2 100644
+--- a/drivers/Makefile
++++ b/drivers/Makefile
+@@ -116,7 +116,7 @@ obj-$(CONFIG_SGI_SN) += sn/
+ obj-y += firmware/
+ obj-$(CONFIG_CRYPTO) += crypto/
+ obj-$(CONFIG_SUPERH) += sh/
+-obj-$(CONFIG_ARCH_SHMOBILE) += sh/
++obj-$(CONFIG_ARCH_SHMOBILE_LEGACY) += sh/
+ obj-$(CONFIG_SSBI) += ssbi/
+ ifndef CONFIG_ARCH_USES_GETTIMEOFFSET
+ obj-y += clocksource/
+--
+1.8.5.rc3
+
--- /dev/null
+From eaff5fc99d6b3659ff2e38e2d62e62994e41fbbf Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 16:59:39 +0900
+Subject: ARM: shmobile: Add r8a7790 clocks for thermal devices
+
+Add the r8a7790 DT thermal device to the legacy clocks.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9654fd7322c378d5955b179c49bbedb3e1de55f3)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7790.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
+index 571bffdf6089..d6669e946eef 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7790.c
++++ b/arch/arm/mach-shmobile/clock-r8a7790.c
+@@ -286,6 +286,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP929]),
+ CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
+ CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
++ CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
+ CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
+ CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
+ CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
+--
+1.8.5.rc3
+
--- /dev/null
+From 34cc86bfa01e28222923957f75584f0dccb64148 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 16:59:56 +0900
+Subject: ARM: shmobile: Add r8a7791 thermal platform device
+
+Add a thermal platform device for the legacy case
+on the r8a7791 SoC. This keeps the r8a7791 in sync
+with the r8a7790 sister device.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 887e8407704bac6c3d22620b7afe65dc4adbbcae)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7791.c | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
+index 59dd442f48ae..cddca99b434f 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7791.c
++++ b/arch/arm/mach-shmobile/setup-r8a7791.c
+@@ -189,6 +189,17 @@ static struct resource irqc0_resources[] = {
+ &irqc##idx##_data, \
+ sizeof(struct renesas_irqc_config))
+
++static const struct resource thermal_resources[] __initconst = {
++ DEFINE_RES_MEM(0xe61f0000, 0x14),
++ DEFINE_RES_MEM(0xe61f0100, 0x38),
++ DEFINE_RES_IRQ(gic_spi(69)),
++};
++
++#define r8a7791_register_thermal() \
++ platform_device_register_simple("rcar_thermal", -1, \
++ thermal_resources, \
++ ARRAY_SIZE(thermal_resources))
++
+ void __init r8a7791_add_dt_devices(void)
+ {
+ r8a7791_register_scif(SCIFA0);
+@@ -213,6 +224,7 @@ void __init r8a7791_add_standard_devices(void)
+ {
+ r8a7791_add_dt_devices();
+ r8a7791_register_irqc(0);
++ r8a7791_register_thermal();
+ }
+
+ void __init r8a7791_init_early(void)
+--
+1.8.5.rc3
+
--- /dev/null
+From e83caf0f56d8c7aa2260c5fad3ca3b59792d723e Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 17:00:05 +0900
+Subject: ARM: shmobile: Add r8a7791 clocks for thermal devices
+
+Add the r8a7791 thermal device as legacy clocks.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8476cee684a68564d315043953fe090b36e9cfd2)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7791.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
+index fda7c6cb6921..ff2d60d55bd5 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7791.c
++++ b/arch/arm/mach-shmobile/clock-r8a7791.c
+@@ -124,6 +124,7 @@ static struct clk *main_clks[] = {
+ enum {
+ MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
+ MSTP719, MSTP718, MSTP715, MSTP714,
++ MSTP522,
+ MSTP216, MSTP207, MSTP206,
+ MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
+ MSTP124,
+@@ -140,6 +141,7 @@ static struct clk mstp_clks[MSTP_NR] = {
+ [MSTP718] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 18, 0), /* SCIF3 */
+ [MSTP715] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 15, 0), /* SCIF4 */
+ [MSTP714] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 14, 0), /* SCIF5 */
++ [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
+ [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
+ [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
+ [MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */
+@@ -188,6 +190,8 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
+ CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
+ CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
++ CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
++ CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
+ };
+
+ #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
+--
+1.8.5.rc3
+
--- /dev/null
+From eca5e076aea7678a163a700d882a6f2436499baf Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 19 Nov 2013 01:04:20 -0800
+Subject: ARM: shmobile: r8a7790: care EXTAL divider settings
+
+EXTAL clock frequency needs 1/2 when
+(MD14, MD13, MD19) = (1, x, x).
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 31ac8e47e9060a9b27ac955d387264b3b6b76bec)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
+index d6669e946eef..3f483f8734fa 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7790.c
++++ b/arch/arm/mach-shmobile/clock-r8a7790.c
+@@ -329,10 +329,10 @@ void __init r8a7790_clock_init(void)
+ R8A7790_CLOCK_ROOT(20, &extal_clk, 130, 156, 80, 66);
+ break;
+ case MD(14):
+- R8A7790_CLOCK_ROOT(26, &extal_div2_clk, 200, 240, 122, 102);
++ R8A7790_CLOCK_ROOT(26 / 2, &extal_div2_clk, 200, 240, 122, 102);
+ break;
+ case MD(13) | MD(14):
+- R8A7790_CLOCK_ROOT(30, &extal_div2_clk, 172, 208, 106, 88);
++ R8A7790_CLOCK_ROOT(30 / 2, &extal_div2_clk, 172, 208, 106, 88);
+ break;
+ }
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 86e7fcc93c5b0eb89be3cb88d3288965dc422655 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 19 Nov 2013 01:04:35 -0800
+Subject: ARM: shmobile: r8a7790: fixup I2C clock source
+
+I2C clock is based on P clock, not HP clock
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d59f4be9d0c2acf6bf16b4f8361593b4bbb4490b)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7790.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
+index 3f483f8734fa..ec6b394add4a 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7790.c
++++ b/arch/arm/mach-shmobile/clock-r8a7790.c
+@@ -196,10 +196,10 @@ enum {
+ };
+
+ static struct clk mstp_clks[MSTP_NR] = {
+- [MSTP931] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 31, 0), /* I2C0 */
+- [MSTP930] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 30, 0), /* I2C1 */
+- [MSTP929] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 29, 0), /* I2C2 */
+- [MSTP928] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 28, 0), /* I2C3 */
++ [MSTP931] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 31, 0), /* I2C0 */
++ [MSTP930] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 30, 0), /* I2C1 */
++ [MSTP929] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 29, 0), /* I2C2 */
++ [MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */
+ [MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
+ [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
+ [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
+--
+1.8.5.rc3
+
--- /dev/null
+From bf3921a6b9fb00dae9f3aaf6c248f96266e96a65 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 19 Nov 2013 01:05:23 -0800
+Subject: ARM: shmobile: r8a7790: tidyup clock table order
+
+SuperH lookups clock is using CLKDEV_CON/DEV/ICK_ID() macro
+for a long term.
+But in these days, the ICK clock is defined in random place.
+This patch arranges it.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit eb7a91749fc1c4fa4f011dad40e3faf4c0ca27b0)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7790.c | 13 ++++++++-----
+ 1 file changed, 8 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
+index ec6b394add4a..8c280611e3c7 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7790.c
++++ b/arch/arm/mach-shmobile/clock-r8a7790.c
+@@ -266,11 +266,6 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]),
+
+ /* MSTP */
+- CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
+- CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
+- CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
+- CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
+- CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
+ CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
+ CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
+ CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
+@@ -303,7 +298,15 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+ CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
+ CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
++
++ /* ICK */
+ CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
++ CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
++ CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
++ CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
++ CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
++ CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
++
+ };
+
+ #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
+--
+1.8.5.rc3
+
--- /dev/null
+From 6cd0dbbc5c20fb49b2100dec33f2da91813c5826 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 10 Dec 2013 16:43:16 +0900
+Subject: ARM: shmobile: Select AUTO_ZRELADDR for EMEV2
+
+Since ("ARM: shmobile: Remove legacy KZM9D board code")
+It is now necessary for AUTO_ZRELADDR to be selected
+in order for the kernel to build with kzm9d_defconfig.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 42a1ba525dd74552f68f3aee0756d16987ad719e)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index 1b7df173db0e..aa9017bb750c 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -113,6 +113,7 @@ config ARCH_EMEV2
+ select ARM_GIC
+ select CPU_V7
+ select USE_OF
++ select AUTO_ZRELADDR
+
+ config ARCH_R7S72100
+ bool "RZ/A1H (R7S72100)"
+--
+1.8.5.rc3
+
--- /dev/null
+From 000737319bb9ee085fdf3d42ee2a1e5ae8c46428 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 20 Nov 2013 23:25:32 -0800
+Subject: ARM: shmobile: r8a7778: add HPBIFx DMAEngine support
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b42831843e66688a18a65f0d24e79473b76905db)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/include/mach/r8a7778.h | 18 ++++++++++
+ arch/arm/mach-shmobile/setup-r8a7778.c | 51 +++++++++++++++++++++++++++
+ 2 files changed, 69 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
+index 441886c9714b..b497f932d04f 100644
+--- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
++++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
+@@ -27,6 +27,24 @@ enum {
+ HPBDMA_SLAVE_DUMMY,
+ HPBDMA_SLAVE_SDHI0_TX,
+ HPBDMA_SLAVE_SDHI0_RX,
++ HPBDMA_SLAVE_HPBIF0_TX,
++ HPBDMA_SLAVE_HPBIF0_RX,
++ HPBDMA_SLAVE_HPBIF1_TX,
++ HPBDMA_SLAVE_HPBIF1_RX,
++ HPBDMA_SLAVE_HPBIF2_TX,
++ HPBDMA_SLAVE_HPBIF2_RX,
++ HPBDMA_SLAVE_HPBIF3_TX,
++ HPBDMA_SLAVE_HPBIF3_RX,
++ HPBDMA_SLAVE_HPBIF4_TX,
++ HPBDMA_SLAVE_HPBIF4_RX,
++ HPBDMA_SLAVE_HPBIF5_TX,
++ HPBDMA_SLAVE_HPBIF5_RX,
++ HPBDMA_SLAVE_HPBIF6_TX,
++ HPBDMA_SLAVE_HPBIF6_RX,
++ HPBDMA_SLAVE_HPBIF7_TX,
++ HPBDMA_SLAVE_HPBIF7_RX,
++ HPBDMA_SLAVE_HPBIF8_TX,
++ HPBDMA_SLAVE_HPBIF8_RX,
+ };
+
+ extern void r8a7778_add_standard_devices(void);
+diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
+index 03fcc5974ef9..81701cfb6cc6 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7778.c
++++ b/arch/arm/mach-shmobile/setup-r8a7778.c
+@@ -319,6 +319,29 @@ void __init r8a7778_add_dt_devices(void)
+ #define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE BIT(1) /* SDHI0 */
+ #define HPB_DMAE_ASYNCMDR_ASMD21_MULTI 0 /* SDHI0 */
+
++#define HPBDMA_HPBIF(_id) \
++{ \
++ .id = HPBDMA_SLAVE_HPBIF## _id ##_TX, \
++ .addr = 0xffda0000 + (_id * 0x1000), \
++ .dcr = HPB_DMAE_DCR_CT | \
++ HPB_DMAE_DCR_DIP | \
++ HPB_DMAE_DCR_SPDS_32BIT | \
++ HPB_DMAE_DCR_DMDL | \
++ HPB_DMAE_DCR_DPDS_32BIT, \
++ .port = 0x1111, \
++ .dma_ch = (28 + _id), \
++}, { \
++ .id = HPBDMA_SLAVE_HPBIF## _id ##_RX, \
++ .addr = 0xffda0000 + (_id * 0x1000), \
++ .dcr = HPB_DMAE_DCR_CT | \
++ HPB_DMAE_DCR_DIP | \
++ HPB_DMAE_DCR_SMDL | \
++ HPB_DMAE_DCR_SPDS_32BIT | \
++ HPB_DMAE_DCR_DPDS_32BIT, \
++ .port = 0x1111, \
++ .dma_ch = (28 + _id), \
++}
++
+ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
+ {
+ .id = HPBDMA_SLAVE_SDHI0_TX,
+@@ -349,11 +372,39 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
+ .flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
+ .dma_ch = 22,
+ },
++
++ HPBDMA_HPBIF(0),
++ HPBDMA_HPBIF(1),
++ HPBDMA_HPBIF(2),
++ HPBDMA_HPBIF(3),
++ HPBDMA_HPBIF(4),
++ HPBDMA_HPBIF(5),
++ HPBDMA_HPBIF(6),
++ HPBDMA_HPBIF(7),
++ HPBDMA_HPBIF(8),
+ };
+
+ static const struct hpb_dmae_channel hpb_dmae_channels[] = {
+ HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
+ HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_TX), /* ch. 28 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_RX), /* ch. 28 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_TX), /* ch. 29 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_RX), /* ch. 29 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_TX), /* ch. 30 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_RX), /* ch. 30 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_TX), /* ch. 31 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_RX), /* ch. 31 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_TX), /* ch. 32 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_RX), /* ch. 32 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_TX), /* ch. 33 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_RX), /* ch. 33 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_TX), /* ch. 34 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_RX), /* ch. 34 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_TX), /* ch. 35 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_RX), /* ch. 35 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_TX), /* ch. 36 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_RX), /* ch. 36 */
+ };
+
+ static struct hpb_dmae_pdata dma_platform_data __initdata = {
+--
+1.8.5.rc3
+
--- /dev/null
+From 1c24087299925bf277b2f94ed58c1052e9660fc1 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Dec 2013 18:17:18 -0800
+Subject: ARM: shmobile: r8a7790: add SSI MSTP clocks
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b3cc52eb9e9cdb4fab9340ca285f8d9685f5db30)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7790.c | 25 +++++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
+index 8c280611e3c7..80cd8f31fa3c 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7790.c
++++ b/arch/arm/mach-shmobile/clock-r8a7790.c
+@@ -53,6 +53,7 @@
+ #define SMSTPCR7 0xe615014c
+ #define SMSTPCR8 0xe6150990
+ #define SMSTPCR9 0xe6150994
++#define SMSTPCR10 0xe6150998
+
+ #define SDCKCR 0xE6150074
+ #define SD2CKCR 0xE6150078
+@@ -182,6 +183,8 @@ static struct clk div6_clks[DIV6_NR] = {
+
+ /* MSTP */
+ enum {
++ MSTP1015, MSTP1014, MSTP1013, MSTP1012, MSTP1011, MSTP1010,
++ MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005,
+ MSTP931, MSTP930, MSTP929, MSTP928,
+ MSTP917,
+ MSTP813,
+@@ -196,6 +199,17 @@ enum {
+ };
+
+ static struct clk mstp_clks[MSTP_NR] = {
++ [MSTP1015] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 15, 0), /* SSI0 */
++ [MSTP1014] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 14, 0), /* SSI1 */
++ [MSTP1013] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 13, 0), /* SSI2 */
++ [MSTP1012] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 12, 0), /* SSI3 */
++ [MSTP1011] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 11, 0), /* SSI4 */
++ [MSTP1010] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 10, 0), /* SSI5 */
++ [MSTP1009] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 9, 0), /* SSI6 */
++ [MSTP1008] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 8, 0), /* SSI7 */
++ [MSTP1007] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 7, 0), /* SSI8 */
++ [MSTP1006] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 6, 0), /* SSI9 */
++ [MSTP1005] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 5, 0), /* SSI ALL */
+ [MSTP931] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 31, 0), /* I2C0 */
+ [MSTP930] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 30, 0), /* I2C1 */
+ [MSTP929] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 29, 0), /* I2C2 */
+@@ -266,6 +280,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]),
+
+ /* MSTP */
++ CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP1005]),
+ CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
+ CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
+ CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
+@@ -306,6 +321,16 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
+ CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
+ CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
++ CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]),
++ CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]),
++ CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]),
++ CLKDEV_ICK_ID("ssi.3", "rcar_sound", &mstp_clks[MSTP1012]),
++ CLKDEV_ICK_ID("ssi.4", "rcar_sound", &mstp_clks[MSTP1011]),
++ CLKDEV_ICK_ID("ssi.5", "rcar_sound", &mstp_clks[MSTP1010]),
++ CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP1009]),
++ CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP1008]),
++ CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP1007]),
++ CLKDEV_ICK_ID("ssi.9", "rcar_sound", &mstp_clks[MSTP1006]),
+
+ };
+
+--
+1.8.5.rc3
+
--- /dev/null
+From fac8d29367689fc9a3e1d12e5da753ec2cb7a814 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 3 Dec 2013 17:28:27 -0800
+Subject: ARM: shmobile: r8a7740: add FSI clock support for DT
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 605dfb0b5fd75d3255360e7ee3e701bf5aeda7b4)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7740.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
+index c826bca4024e..e9a3c6401845 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7740.c
++++ b/arch/arm/mach-shmobile/clock-r8a7740.c
+@@ -585,6 +585,7 @@ static struct clk_lookup lookups[] = {
+
+ CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]),
+ CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]),
++ CLKDEV_DEV_ID("fe1f0000.sound", &mstp_clks[MSTP328]),
+ CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]),
+ CLKDEV_DEV_ID("e6c20000.i2c", &mstp_clks[MSTP323]),
+ CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP320]),
+--
+1.8.5.rc3
+
--- /dev/null
+From ad4e0925323ee3b207136baf5b1353ce7d539323 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 26 Nov 2013 16:47:10 +0900
+Subject: ARM: shmobile: r8a7779: add HSPI clock support for DT
+
+Based on work for the r8a7778 SoC by Kuninori Morimoto.
+
+Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit fee05eb3d2ce4813b5e9a70ab888d2bc0047f4e1)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7779.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
+index 5c83259183d0..b545c8dbb818 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7779.c
++++ b/arch/arm/mach-shmobile/clock-r8a7779.c
+@@ -198,8 +198,11 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
+ CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
+ CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
++ CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
+ CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
++ CLKDEV_DEV_ID("fffc8000.spi", &mstp_clks[MSTP007]), /* HSPI1 */
+ CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
++ CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
+ CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
+--
+1.8.5.rc3
+
--- /dev/null
+From f676c340fbf3a5a163e8d211f3fd678918fbd1cd Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 3 Oct 2013 23:44:15 -0700
+Subject: ARM: shmobile: r8a7778: add I2C support on DTSI
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3acb51b9215bd99da403ecf8200f8425176b1926)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index a6308a399e2d..7a2c433fb63d 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -116,4 +116,44 @@
+ compatible = "renesas,pfc-r8a7778";
+ reg = <0xfffc000 0x118>;
+ };
++
++ i2c0: i2c@ffc70000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7778";
++ reg = <0xffc70000 0x1000>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 67 0x4>;
++ status = "disabled";
++ };
++
++ i2c1: i2c@ffc71000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7778";
++ reg = <0xffc71000 0x1000>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 78 0x4>;
++ status = "disabled";
++ };
++
++ i2c2: i2c@ffc72000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7778";
++ reg = <0xffc72000 0x1000>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 76 0x4>;
++ status = "disabled";
++ };
++
++ i2c3: i2c@ffc73000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7778";
++ reg = <0xffc73000 0x1000>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 77 0x4>;
++ status = "disabled";
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From d6b549c10180da2479c1f0dbdf9f417ae8872f5e Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 3 Oct 2013 23:44:44 -0700
+Subject: ARM: shmobile: r8a7779: tidyup I2C driver name on DTSI
+
+10e8d4f6dddb0f9dc408c2f2bde8399b243a42ca
+(ARM: mach-shmobile: r8a7779: Minimal setup using DT)
+added I2C driver, but it was SH-Mobile I2C.
+R-Car H1 needs R-Car I2C driver.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6363070ef7744ad8b6af2ef37afc913c41e82547)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779.dtsi | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
+index 19faeac3fd2e..da61d2708376 100644
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -153,7 +153,7 @@
+ i2c0: i2c@ffc70000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- compatible = "renesas,rmobile-iic";
++ compatible = "renesas,i2c-r8a7779";
+ reg = <0xffc70000 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 79 0x4>;
+@@ -163,7 +163,7 @@
+ i2c1: i2c@ffc71000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- compatible = "renesas,rmobile-iic";
++ compatible = "renesas,i2c-r8a7779";
+ reg = <0xffc71000 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 82 0x4>;
+@@ -173,7 +173,7 @@
+ i2c2: i2c@ffc72000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- compatible = "renesas,rmobile-iic";
++ compatible = "renesas,i2c-r8a7779";
+ reg = <0xffc72000 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 80 0x4>;
+@@ -183,7 +183,7 @@
+ i2c3: i2c@ffc73000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- compatible = "renesas,rmobile-iic";
++ compatible = "renesas,i2c-r8a7779";
+ reg = <0xffc73000 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 81 0x4>;
+--
+1.8.5.rc3
+
--- /dev/null
+From 3e2b983f156d84ea92a4b8efa58478a0086ec18e Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 6 Oct 2013 21:26:40 -0700
+Subject: ARM: shmobile: lager: add default PFC settings on DTS
+
+SCIF0/SCIF1 PFC setting is needed as default
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4a46beadec749d690acecc92811259cd7e85c6c4)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager-reference.dts | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
+index c462ef138922..0a3f0c60d302 100644
+--- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
++++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
+@@ -43,3 +43,18 @@
+ };
+ };
+ };
++
++&pfc {
++ pinctrl-0 = <&scif0_pins &scif1_pins>;
++ pinctrl-names = "default";
++
++ scif0_pins: scif0 {
++ renesas,groups = "scif0_data";
++ renesas,function = "scif0";
++ };
++
++ scif1_pins: scif1 {
++ renesas,groups = "scif1_data";
++ renesas,function = "scif1";
++ };
++};
+--
+1.8.5.rc3
+
--- /dev/null
+From 6e8563f8338f33d5da90405a6093db8c5a96a1f1 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 6 Oct 2013 21:26:58 -0700
+Subject: ARM: shmobile: lager: add MMCIF support on DTS
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 02b4a748c7ef37c2852478e67251a86e36d87152)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager-reference.dts | 24 ++++++++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
+index 0a3f0c60d302..75730f5d1477 100644
+--- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
++++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
+@@ -42,6 +42,15 @@
+ gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
+ };
+ };
++
++ fixedregulator3v3: fixedregulator@0 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-3.3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
+ };
+
+ &pfc {
+@@ -57,4 +66,19 @@
+ renesas,groups = "scif1_data";
+ renesas,function = "scif1";
+ };
++
++ mmc1_pins: mmc1 {
++ renesas,groups = "mmc1_data8", "mmc1_ctrl";
++ renesas,function = "mmc1";
++ };
++};
++
++&mmcif1 {
++ pinctrl-0 = <&mmc1_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&fixedregulator3v3>;
++ bus-width = <8>;
++ non-removable;
++ status = "okay";
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From ae77252e3628913c05406d35a02f81c797a250a7 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 8 Oct 2013 12:39:01 +0900
+Subject: ARM: shmobile: r8a7791 PFC device tree node
+
+Add a DT node for the r8a7791 PFC device.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 55146927a7d504dc9bef65cad9435ce04329d854)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index fea5cfef4691..765d989dfe72 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -71,4 +71,10 @@
+ <0 16 4>,
+ <0 17 4>;
+ };
++
++ pfc: pfc@e6060000 {
++ compatible = "renesas,pfc-r8a7791";
++ reg = <0 0xe6060000 0 0x250>;
++ #gpio-range-cells = <3>;
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 9d177f6d132f0649aa38fa5c0dc87f484c4d11c4 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 8 Oct 2013 12:39:30 +0900
+Subject: ARM: shmobile: r8a7791 GPIO device tree node
+
+Add GPIO controllers to the r8a7791 DTSI file.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ab87e3fc0b3532f8ff1cb08b9f3680bc98be7728)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 96 ++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 96 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 765d989dfe72..344f1f759c1a 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -46,6 +46,102 @@
+ interrupts = <1 9 0xf04>;
+ };
+
++ gpio0: gpio@ffc40000 {
++ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ reg = <0 0xffc40000 0 0x50>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 4 0x4>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 0 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ };
++
++ gpio1: gpio@ffc41000 {
++ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ reg = <0 0xffc41000 0 0x50>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 5 0x4>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 32 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ };
++
++ gpio2: gpio@ffc42000 {
++ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ reg = <0 0xffc42000 0 0x50>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 6 0x4>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 64 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ };
++
++ gpio3: gpio@ffc43000 {
++ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ reg = <0 0xffc43000 0 0x50>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 7 0x4>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 96 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ };
++
++ gpio4: gpio@ffc44000 {
++ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ reg = <0 0xffc44000 0 0x50>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 8 0x4>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 128 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ };
++
++ gpio5: gpio@ffc45000 {
++ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ reg = <0 0xffc45000 0 0x50>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 9 0x4>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 160 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ };
++
++ gpio6: gpio@ffc45400 {
++ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ reg = <0 0xffc45400 0 0x50>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 10 0x4>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 192 32>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ };
++
++ gpio7: gpio@ffc45800 {
++ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
++ reg = <0 0xffc45800 0 0x50>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 11 0x4>;
++ #gpio-cells = <2>;
++ gpio-controller;
++ gpio-ranges = <&pfc 0 224 26>;
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ };
++
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <1 13 0xf08>,
+--
+1.8.5.rc3
+
--- /dev/null
+From 8fab01003401892e28164410e619ac52496bad7c Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 8 Oct 2013 15:30:09 +0900
+Subject: ARM: shmobile: r8a7791 Koelsch DT reference DTS bits
+
+Add DTS for the DT reference version of the Koelsch board support.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1919a0a4b4a7e505fdeb99e9df449c9d90b0da0c)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/r8a7791-koelsch-reference.dts | 32 +++++++++++++++++++++++++
+ 2 files changed, 33 insertions(+)
+ create mode 100644 arch/arm/boot/dts/r8a7791-koelsch-reference.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 3ced87adb39d..f77c7660b0a8 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -168,6 +168,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
+ r8a7779-marzen.dtb \
+ r8a7779-marzen-reference.dtb \
+ r8a7791-koelsch.dtb \
++ r8a7791-koelsch-reference.dtb \
+ r8a7790-lager.dtb \
+ r8a7790-lager-reference.dtb \
+ sh73a0-kzm9g.dtb \
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
+new file mode 100644
+index 000000000000..b8a374a6bf79
+--- /dev/null
++++ b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
+@@ -0,0 +1,32 @@
++/*
++ * Device Tree Source for the Koelsch board
++ *
++ * Copyright (C) 2013 Renesas Electronics Corporation
++ * Copyright (C) 2013 Renesas Solutions Corp.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/dts-v1/;
++/include/ "r8a7791.dtsi"
++
++/ {
++ model = "Koelsch";
++ compatible = "renesas,koelsch-reference", "renesas,r8a7791";
++
++ chosen {
++ bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
++ };
++
++ memory@40000000 {
++ device_type = "memory";
++ reg = <0 0x40000000 0 0x80000000>;
++ };
++
++ lbsc {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ };
++};
+--
+1.8.5.rc3
+
--- /dev/null
+From 026711057257994e4f7325357ea54f87465a44e9 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 3 Oct 2013 19:35:41 +0200
+Subject: ARM: shmobile: r8a7778: Fix pin control device address in DT
+
+The PFC device is erroneously declared at address 0xfffc000 instead of
+0xfffc0000. Fix it.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 80d01feec9f20e30ab7a998a120bce697bb7d935)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index 7a2c433fb63d..a5822116612c 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -114,7 +114,7 @@
+
+ pfc: pfc@fffc0000 {
+ compatible = "renesas,pfc-r8a7778";
+- reg = <0xfffc000 0x118>;
++ reg = <0xfffc0000 0x118>;
+ };
+
+ i2c0: i2c@ffc70000 {
+--
+1.8.5.rc3
+
--- /dev/null
+From 1b5ab7f2352ec55ffed02d6b01d8072232e58d2b Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 3 Oct 2013 18:31:16 -0700
+Subject: ARM: shmobile: bockw: add default PFC settings on DTS
+
+SCIF0 PFC setting is needed as default
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8ed1f8a5e1fdd76b0d2b04871a33a2f90e5f8343)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778-bockw-reference.dts | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+index 969e386e852c..3c1d1f078ae5 100644
+--- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
++++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+@@ -55,3 +55,13 @@
+ &irqpin {
+ status = "okay";
+ };
++
++&pfc {
++ pinctrl-0 = <&scif0_pins>;
++ pinctrl-names = "default";
++
++ scif0_pins: scif0 {
++ renesas,groups = "scif0_data_a", "scif0_ctrl";
++ renesas,function = "scif0";
++ };
++};
+--
+1.8.5.rc3
+
--- /dev/null
+From 742c5f0f9b76d0ac5b09a99a7a94ad15566b8e37 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 3 Oct 2013 18:32:01 -0700
+Subject: ARM: shmobile: bockw: remove manual PFC settings on reference
+
+Current Bock-W reference is calling PFC initializer manually,
+but now, it can use DTS PFC.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit dbece02b3460dcc8f43b8c1827b9eb363c2ced36)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-bockw-reference.c | 12 ------------
+ 1 file changed, 12 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
+index 1687df9b267f..875cf3f3f503 100644
+--- a/arch/arm/mach-shmobile/board-bockw-reference.c
++++ b/arch/arm/mach-shmobile/board-bockw-reference.c
+@@ -27,14 +27,6 @@
+ * see board-bock.c for checking detail of dip-switch
+ */
+
+-static const struct pinctrl_map bockw_pinctrl_map[] = {
+- /* SCIF0 */
+- PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
+- "scif0_data_a", "scif0"),
+- PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
+- "scif0_ctrl", "scif0"),
+-};
+-
+ #define FPGA 0x18200000
+ #define IRQ0MR 0x30
+ #define COMCTLR 0x101c
+@@ -44,10 +36,6 @@ static void __init bockw_init(void)
+
+ r8a7778_clock_init();
+ r8a7778_init_irq_extpin_dt(1);
+-
+- pinctrl_register_mappings(bockw_pinctrl_map,
+- ARRAY_SIZE(bockw_pinctrl_map));
+- r8a7778_pinmux_init();
+ r8a7778_add_dt_devices();
+
+ fpga = ioremap_nocache(FPGA, SZ_1M);
+--
+1.8.5.rc3
+
--- /dev/null
+From 2a6574e4cb231cdc1fcd5cef306ce079a45cac35 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 3 Oct 2013 18:32:22 -0700
+Subject: ARM: shmobile: r8a7778: add MMCIF support on DTSI
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f7b901757918a99a52ef3ff281401ee1118fa7f6)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index a5822116612c..0ff38e6892f5 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -156,4 +156,12 @@
+ interrupts = <0 77 0x4>;
+ status = "disabled";
+ };
++
++ mmcif: mmcif@ffe4e000 {
++ compatible = "renesas,sh-mmcif";
++ reg = <0xffe4e000 0x100>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 61 4>;
++ status = "disabled";
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From bb45e772def6b57c61f7fc74fce1e834bcad490b Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 3 Oct 2013 18:32:34 -0700
+Subject: ARM: shmobile: bockw: add MMCIF support on DTS
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 14cdd83a6df84849c369b201ce248e0213d735e0)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778-bockw-reference.dts | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+index 3c1d1f078ae5..c6b834f01817 100644
+--- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
++++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+@@ -50,6 +50,21 @@
+ vddvario-supply = <&fixedregulator3v3>;
+ vdd33a-supply = <&fixedregulator3v3>;
+ };
++
++ mmc_pins: mmc {
++ renesas,groups = "mmc_data8", "mmc_ctrl";
++ renesas,function = "mmc";
++ };
++};
++
++&mmcif {
++ pinctrl-0 = <&mmc_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&fixedregulator3v3>;
++ bus-width = <8>;
++ broken-cd;
++ status = "okay";
+ };
+
+ &irqpin {
+--
+1.8.5.rc3
+
--- /dev/null
+From 1f12f7a99052779e5677c94c2f9bd03d5d0498da Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 10 Oct 2013 23:34:33 -0700
+Subject: ARM: shmobile: bockw: fixup MMC pin conflict on DTS
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9ebe54baf8a166384201b4a78c649106047ebc75)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778-bockw-reference.dts | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+index c6b834f01817..4d997f81f379 100644
+--- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
++++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+@@ -51,10 +51,6 @@
+ vdd33a-supply = <&fixedregulator3v3>;
+ };
+
+- mmc_pins: mmc {
+- renesas,groups = "mmc_data8", "mmc_ctrl";
+- renesas,function = "mmc";
+- };
+ };
+
+ &mmcif {
+@@ -79,4 +75,9 @@
+ renesas,groups = "scif0_data_a", "scif0_ctrl";
+ renesas,function = "scif0";
+ };
++
++ mmc_pins: mmc {
++ renesas,groups = "mmc_data8", "mmc_ctrl";
++ renesas,function = "mmc";
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 393797463e3f73ea924b4a597fb0d948577baa1f Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 10 Oct 2013 23:35:46 -0700
+Subject: ARM: shmobile: r8a7778: add SDHI support on DTSI
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 04cbd88902dd16a8f20db808ab444035be2557ac)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778.dtsi | 30 ++++++++++++++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index 0ff38e6892f5..873eeb903b2e 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -164,4 +164,34 @@
+ interrupts = <0 61 4>;
+ status = "disabled";
+ };
++
++ sdhi0: sdhi@ffe4c000 {
++ compatible = "renesas,sdhi-r8a7778";
++ reg = <0xffe4c000 0x100>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 87 4>;
++ cap-sd-highspeed;
++ cap-sdio-irq;
++ status = "disabled";
++ };
++
++ sdhi1: sdhi@ffe4d000 {
++ compatible = "renesas,sdhi-r8a7778";
++ reg = <0xffe4d000 0x100>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 88 4>;
++ cap-sd-highspeed;
++ cap-sdio-irq;
++ status = "disabled";
++ };
++
++ sdhi2: sdhi@ffe4f000 {
++ compatible = "renesas,sdhi-r8a7778";
++ reg = <0xffe4f000 0x100>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 86 4>;
++ cap-sd-highspeed;
++ cap-sdio-irq;
++ status = "disabled";
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From fd5b0635c048ebfc7543535ba040f3212e9ea8cc Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 10 Oct 2013 23:36:01 -0700
+Subject: ARM: shmobile: bockw: add SDHI support on DTS
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9d0395a5e1de5a1ea14298774006f3f285040848)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778-bockw-reference.dts | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+index 4d997f81f379..8b8208ebf0d1 100644
+--- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
++++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+@@ -80,4 +80,19 @@
+ renesas,groups = "mmc_data8", "mmc_ctrl";
+ renesas,function = "mmc";
+ };
++
++ sdhi0_pins: sdhi0 {
++ renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
++ "sdhi0_cd", "sdhi0_wp";
++ renesas,function = "sdhi0";
++ };
++};
++
++&sdhi0 {
++ pinctrl-0 = <&sdhi0_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&fixedregulator3v3>;
++ bus-width = <4>;
++ status = "okay";
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 5b64c1b9114d8460dcc149ed2c4e3192c32faf61 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 10 Oct 2013 23:36:22 -0700
+Subject: ARM: shmobile: r8a7779: add SDHI support on DTSI
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c4866e70a92d8d5fd8ea7ad2c64ddf0efa7a0700)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
+index da61d2708376..be737efb02b6 100644
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -206,4 +206,44 @@
+ interrupt-parent = <&gic>;
+ interrupts = <0 100 0x4>;
+ };
++
++ sdhi0: sdhi@ffe4c000 {
++ compatible = "renesas,sdhi-r8a7779";
++ reg = <0xffe4c000 0x100>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 104 4>;
++ cap-sd-highspeed;
++ cap-sdio-irq;
++ status = "disabled";
++ };
++
++ sdhi1: sdhi@ffe4d000 {
++ compatible = "renesas,sdhi-r8a7779";
++ reg = <0xffe4d000 0x100>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 105 4>;
++ cap-sd-highspeed;
++ cap-sdio-irq;
++ status = "disabled";
++ };
++
++ sdhi2: sdhi@ffe4e000 {
++ compatible = "renesas,sdhi-r8a7779";
++ reg = <0xffe4e000 0x100>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 107 4>;
++ cap-sd-highspeed;
++ cap-sdio-irq;
++ status = "disabled";
++ };
++
++ sdhi3: sdhi@ffe4f000 {
++ compatible = "renesas,sdhi-r8a7779";
++ reg = <0xffe4f000 0x100>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 106 4>;
++ cap-sd-highspeed;
++ cap-sdio-irq;
++ status = "disabled";
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 08f00b0c17bb8399c744193bc7fc452d8b61580e Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 10 Oct 2013 23:36:44 -0700
+Subject: ARM: shmobile: marzen: add SDHI support on DTS
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 00bf591c3faae65eb00cc8b1ce7ede08b4ccc067)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779-marzen-reference.dts | 11 ++++++++++-
+ 1 file changed, 10 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+index ab4110aa3c3b..f7578d5fd44a 100644
+--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
++++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+@@ -68,7 +68,7 @@
+ };
+
+ &pfc {
+- pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>;
++ pinctrl-0 = <&scif2_pins &scif4_pins>;
+ pinctrl-names = "default";
+
+ lan0_pins: lan0 {
+@@ -98,3 +98,12 @@
+ renesas,function = "sdhi0";
+ };
+ };
++
++&sdhi0 {
++ pinctrl-0 = <&sdhi0_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&fixedregulator3v3>;
++ bus-width = <4>;
++ status = "okay";
++};
+--
+1.8.5.rc3
+
--- /dev/null
+From 9d577d7bf1a134623b21337ae38459e73aab56a5 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 21 Oct 2013 19:35:08 -0700
+Subject: ARM: shmobile: r8a7740: tidyup DT node naming
+
+According to ePAPR spec,
+this patch tidies up DT node name and related clock.
+
+This patch also adds missing SDHI2 entry
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7d907894bfe3848a033aa19a2dbb12105300b8e5)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740.dtsi | 18 +++++++++++++++---
+ arch/arm/mach-shmobile/clock-r8a7740.c | 8 ++++----
+ 2 files changed, 19 insertions(+), 7 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
+index ae1e230f711d..4cc945a799bb 100644
+--- a/arch/arm/boot/dts/r8a7740.dtsi
++++ b/arch/arm/boot/dts/r8a7740.dtsi
+@@ -162,7 +162,7 @@
+ #pwm-cells = <3>;
+ };
+
+- mmcif0: mmcif@e6bd0000 {
++ mmcif0: mmc@e6bd0000 {
+ compatible = "renesas,sh-mmcif";
+ reg = <0xe6bd0000 0x100>;
+ interrupt-parent = <&gic>;
+@@ -171,7 +171,7 @@
+ status = "disabled";
+ };
+
+- sdhi0: sdhi@e6850000 {
++ sdhi0: sd@e6850000 {
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xe6850000 0x100>;
+ interrupt-parent = <&gic>;
+@@ -183,7 +183,7 @@
+ status = "disabled";
+ };
+
+- sdhi1: sdhi@e6860000 {
++ sdhi1: sd@e6860000 {
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xe6860000 0x100>;
+ interrupt-parent = <&gic>;
+@@ -194,4 +194,16 @@
+ cap-sdio-irq;
+ status = "disabled";
+ };
++
++ sdhi2: sd@e6870000 {
++ compatible = "renesas,sdhi-r8a7740";
++ reg = <0xe6870000 0x100>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 125 4
++ 0 126 4
++ 0 127 4>;
++ cap-sd-highspeed;
++ cap-sdio-irq;
++ status = "disabled";
++ };
+ };
+diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
+index e9a3c6401845..dd989f93498f 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7740.c
++++ b/arch/arm/mach-shmobile/clock-r8a7740.c
+@@ -590,18 +590,18 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("e6c20000.i2c", &mstp_clks[MSTP323]),
+ CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP320]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
+- CLKDEV_DEV_ID("e6850000.sdhi", &mstp_clks[MSTP314]),
++ CLKDEV_DEV_ID("e6850000.sd", &mstp_clks[MSTP314]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
+- CLKDEV_DEV_ID("e6860000.sdhi", &mstp_clks[MSTP313]),
++ CLKDEV_DEV_ID("e6860000.sd", &mstp_clks[MSTP313]),
+ CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP312]),
+- CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]),
++ CLKDEV_DEV_ID("e6bd0000.mmc", &mstp_clks[MSTP312]),
+ CLKDEV_DEV_ID("r8a7740-gether", &mstp_clks[MSTP309]),
+ CLKDEV_DEV_ID("e9a00000.sh-eth", &mstp_clks[MSTP309]),
+ CLKDEV_DEV_ID("renesas-tpu-pwm", &mstp_clks[MSTP304]),
+ CLKDEV_DEV_ID("e6600000.pwm", &mstp_clks[MSTP304]),
+
+ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]),
+- CLKDEV_DEV_ID("e6870000.sdhi", &mstp_clks[MSTP415]),
++ CLKDEV_DEV_ID("e6870000.sd", &mstp_clks[MSTP415]),
+
+ /* ICK */
+ CLKDEV_ICK_ID("host", "renesas_usbhs", &mstp_clks[MSTP416]),
+--
+1.8.5.rc3
+
--- /dev/null
+From 88cd034e849658dc1ceb49c2c7b332c80088cbfb Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 21 Oct 2013 19:35:31 -0700
+Subject: ARM: shmobile: r8a73a4: tidyup DT node naming
+
+According to ePAPR spec,
+this patch tidies up DT node name and related clock.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 43304a5f51066a7ef851732c35b4582a8d6a5bc0)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a73a4.dtsi | 10 +++++-----
+ arch/arm/mach-shmobile/clock-r8a73a4.c | 10 +++++-----
+ 2 files changed, 10 insertions(+), 10 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
+index 287e047592a0..e079c994fd70 100644
+--- a/arch/arm/boot/dts/r8a73a4.dtsi
++++ b/arch/arm/boot/dts/r8a73a4.dtsi
+@@ -219,7 +219,7 @@
+ status = "disabled";
+ };
+
+- mmcif0: mmcif@ee200000 {
++ mmcif0: mmc@ee200000 {
+ compatible = "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupt-parent = <&gic>;
+@@ -228,7 +228,7 @@
+ status = "disabled";
+ };
+
+- mmcif1: mmcif@ee220000 {
++ mmcif1: mmc@ee220000 {
+ compatible = "renesas,sh-mmcif";
+ reg = <0 0xee220000 0 0x80>;
+ interrupt-parent = <&gic>;
+@@ -244,7 +244,7 @@
+ #gpio-cells = <2>;
+ };
+
+- sdhi0: sdhi@ee100000 {
++ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a73a4";
+ reg = <0 0xee100000 0 0x100>;
+ interrupt-parent = <&gic>;
+@@ -253,7 +253,7 @@
+ status = "disabled";
+ };
+
+- sdhi1: sdhi@ee120000 {
++ sdhi1: sd@ee120000 {
+ compatible = "renesas,sdhi-r8a73a4";
+ reg = <0 0xee120000 0 0x100>;
+ interrupt-parent = <&gic>;
+@@ -262,7 +262,7 @@
+ status = "disabled";
+ };
+
+- sdhi2: sdhi@ee140000 {
++ sdhi2: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a73a4";
+ reg = <0 0xee140000 0 0x100>;
+ interrupt-parent = <&gic>;
+diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
+index 571409b611d3..7348d58f500e 100644
+--- a/arch/arm/mach-shmobile/clock-r8a73a4.c
++++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
+@@ -584,15 +584,15 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
+ CLKDEV_DEV_ID("e6520000.i2c", &mstp_clks[MSTP300]),
+ CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
+- CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
++ CLKDEV_DEV_ID("ee220000.mmc", &mstp_clks[MSTP305]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
+- CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
++ CLKDEV_DEV_ID("ee140000.sd", &mstp_clks[MSTP312]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
+- CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
++ CLKDEV_DEV_ID("ee120000.sd", &mstp_clks[MSTP313]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
+- CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
++ CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]),
+ CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
+- CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
++ CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
+ CLKDEV_DEV_ID("e6550000.i2c", &mstp_clks[MSTP316]),
+ CLKDEV_DEV_ID("e6560000.i2c", &mstp_clks[MSTP317]),
+ CLKDEV_DEV_ID("e6500000.i2c", &mstp_clks[MSTP318]),
+--
+1.8.5.rc3
+
--- /dev/null
+From 2dc368933b3f7d105a0dc9ed3a12022dbf03a4c5 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 21 Oct 2013 19:35:42 -0700
+Subject: ARM: shmobile: r8a7778: tidyup DT node naming
+
+According to ePAPR spec,
+this patch tidies up DT node name and related clock.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 14e1d9147d96e0e6cc7f14eb339a7754404b4b73)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778.dtsi | 8 ++++----
+ arch/arm/mach-shmobile/clock-r8a7778.c | 8 ++++----
+ 2 files changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index 873eeb903b2e..ca88b3bc78e0 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -157,7 +157,7 @@
+ status = "disabled";
+ };
+
+- mmcif: mmcif@ffe4e000 {
++ mmcif: mmc@ffe4e000 {
+ compatible = "renesas,sh-mmcif";
+ reg = <0xffe4e000 0x100>;
+ interrupt-parent = <&gic>;
+@@ -165,7 +165,7 @@
+ status = "disabled";
+ };
+
+- sdhi0: sdhi@ffe4c000 {
++ sdhi0: sd@ffe4c000 {
+ compatible = "renesas,sdhi-r8a7778";
+ reg = <0xffe4c000 0x100>;
+ interrupt-parent = <&gic>;
+@@ -175,7 +175,7 @@
+ status = "disabled";
+ };
+
+- sdhi1: sdhi@ffe4d000 {
++ sdhi1: sd@ffe4d000 {
+ compatible = "renesas,sdhi-r8a7778";
+ reg = <0xffe4d000 0x100>;
+ interrupt-parent = <&gic>;
+@@ -185,7 +185,7 @@
+ status = "disabled";
+ };
+
+- sdhi2: sdhi@ffe4f000 {
++ sdhi2: sd@ffe4f000 {
+ compatible = "renesas,sdhi-r8a7778";
+ reg = <0xffe4f000 0x100>;
+ interrupt-parent = <&gic>;
+diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
+index 54064346dafb..4b601bf4ede4 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7778.c
++++ b/arch/arm/mach-shmobile/clock-r8a7778.c
+@@ -173,13 +173,13 @@ static struct clk_lookup lookups[] = {
+
+ /* MSTP32 clocks */
+ CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
+- CLKDEV_DEV_ID("ffe4e000.mmcif", &mstp_clks[MSTP331]), /* MMC */
++ CLKDEV_DEV_ID("ffe4e000.mmc", &mstp_clks[MSTP331]), /* MMC */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
+- CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
++ CLKDEV_DEV_ID("ffe4c000.sd", &mstp_clks[MSTP323]), /* SDHI0 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
+- CLKDEV_DEV_ID("ffe4d000.sdhi", &mstp_clks[MSTP322]), /* SDHI1 */
++ CLKDEV_DEV_ID("ffe4d000.sd", &mstp_clks[MSTP322]), /* SDHI1 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
+- CLKDEV_DEV_ID("ffe4f000.sdhi", &mstp_clks[MSTP321]), /* SDHI2 */
++ CLKDEV_DEV_ID("ffe4f000.sd", &mstp_clks[MSTP321]), /* SDHI2 */
+ CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */
+ CLKDEV_DEV_ID("r8a7778-vin.0", &mstp_clks[MSTP110]), /* VIN0 */
+ CLKDEV_DEV_ID("r8a7778-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
+--
+1.8.5.rc3
+
--- /dev/null
+From 4fbcf56bcfe039ca0c8c928f90d192eda681cacf Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 21 Oct 2013 19:36:02 -0700
+Subject: ARM: shmobile: r8a7779: tidyup DT node naming
+
+According to ePAPR spec,
+this patch tidies up DT node name and related clock.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2624705ceb7b139cffdb409682d3e1bc480abec7)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779.dtsi | 8 ++++----
+ arch/arm/mach-shmobile/clock-r8a7779.c | 8 ++++----
+ 2 files changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
+index be737efb02b6..05fd41c6012f 100644
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -207,7 +207,7 @@
+ interrupts = <0 100 0x4>;
+ };
+
+- sdhi0: sdhi@ffe4c000 {
++ sdhi0: sd@ffe4c000 {
+ compatible = "renesas,sdhi-r8a7779";
+ reg = <0xffe4c000 0x100>;
+ interrupt-parent = <&gic>;
+@@ -217,7 +217,7 @@
+ status = "disabled";
+ };
+
+- sdhi1: sdhi@ffe4d000 {
++ sdhi1: sd@ffe4d000 {
+ compatible = "renesas,sdhi-r8a7779";
+ reg = <0xffe4d000 0x100>;
+ interrupt-parent = <&gic>;
+@@ -227,7 +227,7 @@
+ status = "disabled";
+ };
+
+- sdhi2: sdhi@ffe4e000 {
++ sdhi2: sd@ffe4e000 {
+ compatible = "renesas,sdhi-r8a7779";
+ reg = <0xffe4e000 0x100>;
+ interrupt-parent = <&gic>;
+@@ -237,7 +237,7 @@
+ status = "disabled";
+ };
+
+- sdhi3: sdhi@ffe4f000 {
++ sdhi3: sd@ffe4f000 {
+ compatible = "renesas,sdhi-r8a7779";
+ reg = <0xffe4f000 0x100>;
+ interrupt-parent = <&gic>;
+diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
+index b545c8dbb818..f1fb89b76786 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7779.c
++++ b/arch/arm/mach-shmobile/clock-r8a7779.c
+@@ -204,13 +204,13 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
+ CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
+- CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
++ CLKDEV_DEV_ID("ffe4c000.sd", &mstp_clks[MSTP323]), /* SDHI0 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
+- CLKDEV_DEV_ID("ffe4d000.sdhi", &mstp_clks[MSTP322]), /* SDHI1 */
++ CLKDEV_DEV_ID("ffe4d000.sd", &mstp_clks[MSTP322]), /* SDHI1 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
+- CLKDEV_DEV_ID("ffe4e000.sdhi", &mstp_clks[MSTP321]), /* SDHI2 */
++ CLKDEV_DEV_ID("ffe4e000.sd", &mstp_clks[MSTP321]), /* SDHI2 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */
+- CLKDEV_DEV_ID("ffe4f000.sdhi", &mstp_clks[MSTP320]), /* SDHI3 */
++ CLKDEV_DEV_ID("ffe4f000.sd", &mstp_clks[MSTP320]), /* SDHI3 */
+ CLKDEV_DEV_ID("rcar-du-r8a7779", &mstp_clks[MSTP103]), /* DU */
+ };
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 9a9ec087d399287bc0c47ee43f28d398cb30ff11 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 21 Oct 2013 19:36:13 -0700
+Subject: ARM: shmobile: r8a7790: tidyup DT node naming
+
+According to ePAPR spec,
+this patch tidies up DT node name and related clock.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b718aa448378a83c698f92073a4aa24df0d9444b)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 10 +++++-----
+ arch/arm/mach-shmobile/clock-r8a7790.c | 12 ++++++------
+ 2 files changed, 11 insertions(+), 11 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 46e1d7ef163f..839f1e761235 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -225,7 +225,7 @@
+ status = "disabled";
+ };
+
+- mmcif1: mmcif@ee220000 {
++ mmcif1: mmc@ee220000 {
+ compatible = "renesas,sh-mmcif";
+ reg = <0 0xee220000 0 0x80>;
+ interrupt-parent = <&gic>;
+@@ -239,7 +239,7 @@
+ reg = <0 0xe6060000 0 0x250>;
+ };
+
+- sdhi0: sdhi@ee100000 {
++ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7790";
+ reg = <0 0xee100000 0 0x100>;
+ interrupt-parent = <&gic>;
+@@ -248,7 +248,7 @@
+ status = "disabled";
+ };
+
+- sdhi1: sdhi@ee120000 {
++ sdhi1: sd@ee120000 {
+ compatible = "renesas,sdhi-r8a7790";
+ reg = <0 0xee120000 0 0x100>;
+ interrupt-parent = <&gic>;
+@@ -257,7 +257,7 @@
+ status = "disabled";
+ };
+
+- sdhi2: sdhi@ee140000 {
++ sdhi2: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a7790";
+ reg = <0 0xee140000 0 0x100>;
+ interrupt-parent = <&gic>;
+@@ -266,7 +266,7 @@
+ status = "disabled";
+ };
+
+- sdhi3: sdhi@ee160000 {
++ sdhi3: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a7790";
+ reg = <0 0xee160000 0 0x100>;
+ interrupt-parent = <&gic>;
+diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
+index 80cd8f31fa3c..312376d2cfd1 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7790.c
++++ b/arch/arm/mach-shmobile/clock-r8a7790.c
+@@ -298,17 +298,17 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
+ CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
+ CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
+- CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
++ CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
+ CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
+- CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
++ CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
+- CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
++ CLKDEV_DEV_ID("ee120000.sd", &mstp_clks[MSTP313]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
+- CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
++ CLKDEV_DEV_ID("ee140000.sd", &mstp_clks[MSTP312]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
+- CLKDEV_DEV_ID("ee160000.sdhi", &mstp_clks[MSTP311]),
++ CLKDEV_DEV_ID("ee160000.sd", &mstp_clks[MSTP311]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
+- CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
++ CLKDEV_DEV_ID("ee220000.mmc", &mstp_clks[MSTP305]),
+ CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
+ CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+ CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
+--
+1.8.5.rc3
+
--- /dev/null
+From ec0a1c816e1a0bce87c0af9f41b619509dcb4adc Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 21 Oct 2013 19:36:22 -0700
+Subject: ARM: shmobile: sh73a0: tidyup DT node naming
+
+According to ePAPR spec,
+this patch tidies up DT node name and related clock.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 33f6be3bf6b79c2b9b7c8cd1387e8e7d4b839d9e)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/sh73a0.dtsi | 8 ++++----
+ arch/arm/mach-shmobile/clock-sh73a0.c | 8 ++++----
+ 2 files changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
+index fcf26889a8a0..78f7201aeb24 100644
+--- a/arch/arm/boot/dts/sh73a0.dtsi
++++ b/arch/arm/boot/dts/sh73a0.dtsi
+@@ -190,7 +190,7 @@
+ status = "disabled";
+ };
+
+- mmcif: mmcif@e6bd0000 {
++ mmcif: mmc@e6bd0000 {
+ compatible = "renesas,sh-mmcif";
+ reg = <0xe6bd0000 0x100>;
+ interrupt-parent = <&gic>;
+@@ -200,7 +200,7 @@
+ status = "disabled";
+ };
+
+- sdhi0: sdhi@ee100000 {
++ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xee100000 0x100>;
+ interrupt-parent = <&gic>;
+@@ -212,7 +212,7 @@
+ };
+
+ /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
+- sdhi1: sdhi@ee120000 {
++ sdhi1: sd@ee120000 {
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xee120000 0x100>;
+ interrupt-parent = <&gic>;
+@@ -223,7 +223,7 @@
+ status = "disabled";
+ };
+
+- sdhi2: sdhi@ee140000 {
++ sdhi2: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xee140000 0x100>;
+ interrupt-parent = <&gic>;
+diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
+index 2aeec468cf7c..30d88689a960 100644
+--- a/arch/arm/mach-shmobile/clock-sh73a0.c
++++ b/arch/arm/mach-shmobile/clock-sh73a0.c
+@@ -657,13 +657,13 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("e6822000.i2c", &mstp_clks[MSTP323]), /* I2C1 */
+ CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP322]), /* USB */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
+- CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]), /* SDHI0 */
++ CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]), /* SDHI0 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
+- CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]), /* SDHI1 */
++ CLKDEV_DEV_ID("ee120000.sd", &mstp_clks[MSTP313]), /* SDHI1 */
+ CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
+- CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */
++ CLKDEV_DEV_ID("e6bd0000.mmc", &mstp_clks[MSTP312]), /* MMCIF0 */
+ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
+- CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP311]), /* SDHI2 */
++ CLKDEV_DEV_ID("ee140000.sd", &mstp_clks[MSTP311]), /* SDHI2 */
+ CLKDEV_DEV_ID("renesas-tpu-pwm.0", &mstp_clks[MSTP304]), /* TPU0 */
+ CLKDEV_DEV_ID("renesas-tpu-pwm.1", &mstp_clks[MSTP303]), /* TPU1 */
+ CLKDEV_DEV_ID("renesas-tpu-pwm.2", &mstp_clks[MSTP302]), /* TPU2 */
+--
+1.8.5.rc3
+
--- /dev/null
+From c7bdbd3c40ff0e8cddfbc304316d6d210cdd558d Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 21 Oct 2013 19:37:14 -0700
+Subject: ARM: shmobile: armadillo: tidyup DT node naming
+
+According to ePAPR spec,
+this patch tidies up DT node name.
+
+This patch removed un-used "touchscreen" label
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e63763b9b55a6833047199bd587e061520302ffc)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+index 1c56c5e56950..6a542198985d 100644
+--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
++++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+@@ -90,7 +90,7 @@
+
+ &i2c0 {
+ status = "okay";
+- touchscreen: st1232@55 {
++ touchscreen@55 {
+ compatible = "sitronix,st1232";
+ reg = <0x55>;
+ interrupt-parent = <&irqpin1>;
+@@ -105,12 +105,12 @@
+ pinctrl-0 = <&scifa1_pins>;
+ pinctrl-names = "default";
+
+- scifa1_pins: scifa1 {
++ scifa1_pins: serial1 {
+ renesas,groups = "scifa1_data";
+ renesas,function = "scifa1";
+ };
+
+- st1232_pins: st1232 {
++ st1232_pins: touchscreen {
+ renesas,groups = "intc_irq10";
+ renesas,function = "intc";
+ };
+@@ -125,7 +125,7 @@
+ renesas,function = "mmc0";
+ };
+
+- sdhi0_pins: sdhi0 {
++ sdhi0_pins: sd0 {
+ renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp";
+ renesas,function = "sdhi0";
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 6a2f35f5cf8bc9a38c1de81bbd31d4741736d7f3 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 21 Oct 2013 19:37:26 -0700
+Subject: ARM: shmobile: ape6evm: tidyup DT node naming
+
+According to ePAPR spec,
+this patch tidies up DT node name.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit eeafbdf3253f23cbd30ee5f876ee9bb696a3c207)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
+index 9443e93d3cac..25dbc1c0947d 100644
+--- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
++++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
+@@ -88,22 +88,22 @@
+ pinctrl-0 = <&scifa0_pins>;
+ pinctrl-names = "default";
+
+- scifa0_pins: scifa0 {
++ scifa0_pins: serial0 {
+ renesas,groups = "scifa0_data";
+ renesas,function = "scifa0";
+ };
+
+- mmc0_pins: mmcif {
++ mmc0_pins: mmc {
+ renesas,groups = "mmc0_data8", "mmc0_ctrl";
+ renesas,function = "mmc0";
+ };
+
+- sdhi0_pins: sdhi0 {
++ sdhi0_pins: sd0 {
+ renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
+ renesas,function = "sdhi0";
+ };
+
+- sdhi1_pins: sdhi1 {
++ sdhi1_pins: sd1 {
+ renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
+ renesas,function = "sdhi1";
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 935d5293ef8ee44ee24e2f9a484c7c4f7d9a61fb Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 21 Oct 2013 19:37:39 -0700
+Subject: ARM: shmobile: kzm9g: tidyup DT node naming
+
+According to ePAPR spec,
+this patch tidies up DT node name.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 26adf1a79e847ac147c1cc9f2c033ff5e4a73e22)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+index 8ee06dd81799..df75aea42a48 100644
+--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
++++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+@@ -205,7 +205,7 @@
+ renesas,function = "i2c3";
+ };
+
+- mmcif_pins: mmcif {
++ mmcif_pins: mmc {
+ mux {
+ renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
+ renesas,function = "mmc0";
+@@ -217,17 +217,17 @@
+ };
+ };
+
+- scifa4_pins: scifa4 {
++ scifa4_pins: serial4 {
+ renesas,groups = "scifa4_data", "scifa4_ctrl";
+ renesas,function = "scifa4";
+ };
+
+- sdhi0_pins: sdhi0 {
++ sdhi0_pins: sd0 {
+ renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";
+ renesas,function = "sdhi0";
+ };
+
+- sdhi2_pins: sdhi2 {
++ sdhi2_pins: sd2 {
+ renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
+ renesas,function = "sdhi2";
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 2f5f594e3adf2818eeb28b45cab61a48a9ee68b5 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 21 Oct 2013 19:37:48 -0700
+Subject: ARM: shmobile: bockw: tidyup DT node naming
+
+According to ePAPR spec,
+this patch tidies up DT node name.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit fb9c1ce47c2d5844ad2bf8dc8c06affa057e69c5)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778-bockw-reference.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+index 8b8208ebf0d1..9c8bd37804a6 100644
+--- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
++++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+@@ -71,7 +71,7 @@
+ pinctrl-0 = <&scif0_pins>;
+ pinctrl-names = "default";
+
+- scif0_pins: scif0 {
++ scif0_pins: serial0 {
+ renesas,groups = "scif0_data_a", "scif0_ctrl";
+ renesas,function = "scif0";
+ };
+@@ -81,7 +81,7 @@
+ renesas,function = "mmc";
+ };
+
+- sdhi0_pins: sdhi0 {
++ sdhi0_pins: sd0 {
+ renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
+ "sdhi0_cd", "sdhi0_wp";
+ renesas,function = "sdhi0";
+--
+1.8.5.rc3
+
--- /dev/null
+From 3780edbb14819e32e6bf017382c7a8c120cb1001 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 21 Oct 2013 19:38:04 -0700
+Subject: ARM: shmobile: marzen: tidyup DT node naming
+
+According to ePAPR spec,
+this patch tidies up DT node name.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6220c5197eb0820d9fd75595efa73c56a2162689)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779-marzen-reference.dts | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+index f7578d5fd44a..ce3fe9eb1606 100644
+--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
++++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+@@ -82,17 +82,17 @@
+ };
+ };
+
+- scif2_pins: scif2 {
++ scif2_pins: serial2 {
+ renesas,groups = "scif2_data_c";
+ renesas,function = "scif2";
+ };
+
+- scif4_pins: scif4 {
++ scif4_pins: serial4 {
+ renesas,groups = "scif4_data";
+ renesas,function = "scif4";
+ };
+
+- sdhi0_pins: sdhi0 {
++ sdhi0_pins: sd0 {
+ renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd",
+ "sdhi0_wp";
+ renesas,function = "sdhi0";
+--
+1.8.5.rc3
+
--- /dev/null
+From 0c12295dc6e9979785377407f146b5c8d3bc7315 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 21 Oct 2013 19:38:16 -0700
+Subject: ARM: shmobile: lager: tidyup DT node naming
+
+According to ePAPR spec,
+this patch tidies up DT node name.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f56d51fcafcb222b7cf8cdd17eedb516f3197639)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager-reference.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
+index 75730f5d1477..ec82674d8033 100644
+--- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
++++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
+@@ -57,12 +57,12 @@
+ pinctrl-0 = <&scif0_pins &scif1_pins>;
+ pinctrl-names = "default";
+
+- scif0_pins: scif0 {
++ scif0_pins: serial0 {
+ renesas,groups = "scif0_data";
+ renesas,function = "scif0";
+ };
+
+- scif1_pins: scif1 {
++ scif1_pins: serial1 {
+ renesas,groups = "scif1_data";
+ renesas,function = "scif1";
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 6ab95a679ba05cd8c97b51e63d453b9be873f8c4 Mon Sep 17 00:00:00 2001
+From: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
+Date: Tue, 8 Oct 2013 14:33:07 +0900
+Subject: ARM: shmobile: emev2: Add clock tree description in DT
+
+Add minimum clock tree description to .dts file.
+This provides same set of clocks as current sh-clkfwk version .c
+code does.
+
+Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit fdf6fd2205181485ffc0fc622be7ed93dfbce361)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/emev2.dtsi | 84 ++++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 84 insertions(+)
+
+diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
+index 9063a4434d6a..df1d4cd3917d 100644
+--- a/arch/arm/boot/dts/emev2.dtsi
++++ b/arch/arm/boot/dts/emev2.dtsi
+@@ -52,34 +52,118 @@
+ <0 121 4>;
+ };
+
++ smu@e0110000 {
++ compatible = "renesas,emev2-smu";
++ reg = <0xe0110000 0x10000>;
++ #address-cells = <2>;
++ #size-cells = <0>;
++
++ c32ki: c32ki {
++ compatible = "fixed-clock";
++ clock-frequency = <32768>;
++ #clock-cells = <0>;
++ };
++ pll3_fo: pll3_fo {
++ compatible = "fixed-factor-clock";
++ clocks = <&c32ki>;
++ clock-div = <1>;
++ clock-mult = <7000>;
++ #clock-cells = <0>;
++ };
++ usia_u0_sclkdiv: usia_u0_sclkdiv {
++ compatible = "renesas,emev2-smu-clkdiv";
++ reg = <0x610 0>;
++ clocks = <&pll3_fo>;
++ #clock-cells = <0>;
++ };
++ usib_u1_sclkdiv: usib_u1_sclkdiv {
++ compatible = "renesas,emev2-smu-clkdiv";
++ reg = <0x65c 0>;
++ clocks = <&pll3_fo>;
++ #clock-cells = <0>;
++ };
++ usib_u2_sclkdiv: usib_u2_sclkdiv {
++ compatible = "renesas,emev2-smu-clkdiv";
++ reg = <0x65c 16>;
++ clocks = <&pll3_fo>;
++ #clock-cells = <0>;
++ };
++ usib_u3_sclkdiv: usib_u3_sclkdiv {
++ compatible = "renesas,emev2-smu-clkdiv";
++ reg = <0x660 0>;
++ clocks = <&pll3_fo>;
++ #clock-cells = <0>;
++ };
++ usia_u0_sclk: usia_u0_sclk {
++ compatible = "renesas,emev2-smu-gclk";
++ reg = <0x4a0 1>;
++ clocks = <&usia_u0_sclkdiv>;
++ #clock-cells = <0>;
++ };
++ usib_u1_sclk: usib_u1_sclk {
++ compatible = "renesas,emev2-smu-gclk";
++ reg = <0x4b8 1>;
++ clocks = <&usib_u1_sclkdiv>;
++ #clock-cells = <0>;
++ };
++ usib_u2_sclk: usib_u2_sclk {
++ compatible = "renesas,emev2-smu-gclk";
++ reg = <0x4bc 1>;
++ clocks = <&usib_u2_sclkdiv>;
++ #clock-cells = <0>;
++ };
++ usib_u3_sclk: usib_u3_sclk {
++ compatible = "renesas,emev2-smu-gclk";
++ reg = <0x4c0 1>;
++ clocks = <&usib_u3_sclkdiv>;
++ #clock-cells = <0>;
++ };
++ sti_sclk: sti_sclk {
++ compatible = "renesas,emev2-smu-gclk";
++ reg = <0x528 1>;
++ clocks = <&c32ki>;
++ #clock-cells = <0>;
++ };
++ };
++
+ sti@e0180000 {
+ compatible = "renesas,em-sti";
+ reg = <0xe0180000 0x54>;
+ interrupts = <0 125 0>;
++ clocks = <&sti_sclk>;
++ clock-names = "sclk";
+ };
+
+ uart@e1020000 {
+ compatible = "renesas,em-uart";
+ reg = <0xe1020000 0x38>;
+ interrupts = <0 8 0>;
++ clocks = <&usia_u0_sclk>;
++ clock-names = "sclk";
+ };
+
+ uart@e1030000 {
+ compatible = "renesas,em-uart";
+ reg = <0xe1030000 0x38>;
+ interrupts = <0 9 0>;
++ clocks = <&usib_u1_sclk>;
++ clock-names = "sclk";
+ };
+
+ uart@e1040000 {
+ compatible = "renesas,em-uart";
+ reg = <0xe1040000 0x38>;
+ interrupts = <0 10 0>;
++ clocks = <&usib_u2_sclk>;
++ clock-names = "sclk";
+ };
+
+ uart@e1050000 {
+ compatible = "renesas,em-uart";
+ reg = <0xe1050000 0x38>;
+ interrupts = <0 11 0>;
++ clocks = <&usib_u3_sclk>;
++ clock-names = "sclk";
+ };
+
+ gpio0: gpio@e0050000 {
+--
+1.8.5.rc3
+
--- /dev/null
+From 0a36c6674dfc6a8d66caa45604a372a3c726dce2 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 3 Oct 2013 23:44:15 -0700
+Subject: ARM: shmobile: r8a7778: add I2C support on DTSI
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ae4273ec7b25c8b9c895a4aae31f2fced980b7bf)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index ca88b3bc78e0..698809f91306 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -194,4 +194,44 @@
+ cap-sdio-irq;
+ status = "disabled";
+ };
++
++ i2c0: i2c@ffc70000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7778";
++ reg = <0xffc70000 0x1000>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 67 0x4>;
++ status = "disabled";
++ };
++
++ i2c1: i2c@ffc71000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7778";
++ reg = <0xffc71000 0x1000>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 78 0x4>;
++ status = "disabled";
++ };
++
++ i2c2: i2c@ffc72000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7778";
++ reg = <0xffc72000 0x1000>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 76 0x4>;
++ status = "disabled";
++ };
++
++ i2c3: i2c@ffc73000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7778";
++ reg = <0xffc73000 0x1000>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 77 0x4>;
++ status = "disabled";
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From cf5c95418d033226663e7c1c6dacd806a67bc41e Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 31 Oct 2013 18:22:21 -0700
+Subject: ARM: shmobile: r8a7778: add HSPI suppport on DTSI
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a50da08569b2d9804575c0cf9d0b67db049afa81)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778.dtsi | 30 ++++++++++++++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index 698809f91306..819b1942aa14 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -25,6 +25,12 @@
+ };
+ };
+
++ aliases {
++ spi0 = &hspi0;
++ spi1 = &hspi1;
++ spi2 = &hspi2;
++ };
++
+ gic: interrupt-controller@fe438000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+@@ -234,4 +240,28 @@
+ interrupts = <0 77 0x4>;
+ status = "disabled";
+ };
++
++ hspi0: spi@fffc7000 {
++ compatible = "renesas,hspi";
++ reg = <0xfffc7000 0x18>;
++ interrupt-controller = <&gic>;
++ interrupts = <0 63 4>;
++ status = "disabled";
++ };
++
++ hspi1: spi@fffc8000 {
++ compatible = "renesas,hspi";
++ reg = <0xfffc8000 0x18>;
++ interrupt-controller = <&gic>;
++ interrupts = <0 84 4>;
++ status = "disabled";
++ };
++
++ hspi2: spi@fffc6000 {
++ compatible = "renesas,hspi";
++ reg = <0xfffc6000 0x18>;
++ interrupt-controller = <&gic>;
++ interrupts = <0 85 4>;
++ status = "disabled";
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 1c2b61fc488865ae149c8fce18c3fc13a1119096 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 31 Oct 2013 18:22:53 -0700
+Subject: ARM: shmobile: bockw: enable HSPI0 on DTS
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8c6639665d9771d2e84fe6e0915d46a6fbb8594e)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778-bockw-reference.dts | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+index 9c8bd37804a6..f488c48bf69e 100644
+--- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
++++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+@@ -86,6 +86,11 @@
+ "sdhi0_cd", "sdhi0_wp";
+ renesas,function = "sdhi0";
+ };
++
++ hspi0_pins: hspi0 {
++ renesas,groups = "hspi0_a";
++ renesas,function = "hspi0";
++ };
+ };
+
+ &sdhi0 {
+@@ -96,3 +101,9 @@
+ bus-width = <4>;
+ status = "okay";
+ };
++
++&hspi0 {
++ pinctrl-0 = <&hspi0_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++};
+--
+1.8.5.rc3
+
--- /dev/null
+From 690e74f1c4dd4ebaa442d4d23593a0ebc23a39db Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 9 Nov 2013 13:23:53 +0100
+Subject: ARM: shmobile: Use #include in device tree sources
+
+In order to allow usage of the preprocessor in the SoC device tree
+sources, switch from /include/ to #include.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 31c46cbf5b8bab87e89028977521c84f2d871040)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100-genmai.dts | 2 +-
+ arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 2 +-
+ arch/arm/boot/dts/r8a73a4-ape6evm.dts | 2 +-
+ arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 2 +-
+ arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 2 +-
+ arch/arm/boot/dts/r8a7778-bockw-reference.dts | 2 +-
+ arch/arm/boot/dts/r8a7778-bockw.dts | 2 +-
+ arch/arm/boot/dts/r8a7779-marzen-reference.dts | 2 +-
+ arch/arm/boot/dts/r8a7779-marzen.dts | 2 +-
+ arch/arm/boot/dts/r8a7790-lager-reference.dts | 2 +-
+ arch/arm/boot/dts/r8a7790-lager.dts | 2 +-
+ arch/arm/boot/dts/r8a7791-koelsch-reference.dts | 2 +-
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 2 +-
+ arch/arm/boot/dts/sh7372-mackerel.dts | 2 +-
+ arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 2 +-
+ arch/arm/boot/dts/sh73a0-kzm9g.dts | 2 +-
+ 16 files changed, 16 insertions(+), 16 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts
+index 1fb20f2333cc..b1deaf7e2e06 100644
+--- a/arch/arm/boot/dts/r7s72100-genmai.dts
++++ b/arch/arm/boot/dts/r7s72100-genmai.dts
+@@ -9,7 +9,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "r7s72100.dtsi"
++#include "r7s72100.dtsi"
+
+ / {
+ model = "Genmai";
+diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
+index 25dbc1c0947d..338f0cbfff7a 100644
+--- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
++++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
+@@ -9,7 +9,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "r8a73a4.dtsi"
++#include "r8a73a4.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
+
+ / {
+diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
+index 91436b58016f..7db8d79fb93c 100644
+--- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
++++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
+@@ -9,7 +9,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "r8a73a4.dtsi"
++#include "r8a73a4.dtsi"
+
+ / {
+ model = "APE6EVM";
+diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+index 6a542198985d..c7c5bcb893ca 100644
+--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
++++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+@@ -9,7 +9,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "r8a7740.dtsi"
++#include "r8a7740.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/pwm/pwm.h>
+
+diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
+index 426cd9c3e1c4..a06a11e1a840 100644
+--- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
++++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
+@@ -9,7 +9,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "r8a7740.dtsi"
++#include "r8a7740.dtsi"
+
+ / {
+ model = "armadillo 800 eva";
+diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+index f488c48bf69e..be9b75377f3e 100644
+--- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
++++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+@@ -15,7 +15,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "r8a7778.dtsi"
++#include "r8a7778.dtsi"
+
+ / {
+ model = "bockw";
+diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts
+index 12bbebc9c955..46a884d45175 100644
+--- a/arch/arm/boot/dts/r8a7778-bockw.dts
++++ b/arch/arm/boot/dts/r8a7778-bockw.dts
+@@ -15,7 +15,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "r8a7778.dtsi"
++#include "r8a7778.dtsi"
+
+ / {
+ model = "bockw";
+diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+index ce3fe9eb1606..08b9ee37ad2f 100644
+--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
++++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+@@ -10,7 +10,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "r8a7779.dtsi"
++#include "r8a7779.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
+
+ / {
+diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts
+index f3f7f7999736..a7af2c2371f2 100644
+--- a/arch/arm/boot/dts/r8a7779-marzen.dts
++++ b/arch/arm/boot/dts/r8a7779-marzen.dts
+@@ -10,7 +10,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "r8a7779.dtsi"
++#include "r8a7779.dtsi"
+
+ / {
+ model = "marzen";
+diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
+index ec82674d8033..cce7dbfc1954 100644
+--- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
++++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
+@@ -9,7 +9,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "r8a7790.dtsi"
++#include "r8a7790.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
+
+ / {
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
+index 203bd089af29..8799dfb0068e 100644
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -9,7 +9,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "r8a7790.dtsi"
++#include "r8a7790.dtsi"
+
+ / {
+ model = "Lager";
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
+index b8a374a6bf79..1a0f082b21df 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
+@@ -10,7 +10,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "r8a7791.dtsi"
++#include "r8a7791.dtsi"
+
+ / {
+ model = "Koelsch";
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
+index 1ce5250ec278..c4e8b3a0cd13 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -10,7 +10,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "r8a7791.dtsi"
++#include "r8a7791.dtsi"
+
+ / {
+ model = "Koelsch";
+diff --git a/arch/arm/boot/dts/sh7372-mackerel.dts b/arch/arm/boot/dts/sh7372-mackerel.dts
+index 8acf51e0cdae..a759a276c9a9 100644
+--- a/arch/arm/boot/dts/sh7372-mackerel.dts
++++ b/arch/arm/boot/dts/sh7372-mackerel.dts
+@@ -9,7 +9,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "sh7372.dtsi"
++#include "sh7372.dtsi"
+
+ / {
+ model = "Mackerel (AP4 EVM 2nd)";
+diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+index df75aea42a48..d5a6d74cdda0 100644
+--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
++++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+@@ -12,7 +12,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "sh73a0.dtsi"
++#include "sh73a0.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
+
+ / {
+diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts
+index 0f1ca7792c46..27c5f426d172 100644
+--- a/arch/arm/boot/dts/sh73a0-kzm9g.dts
++++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts
+@@ -9,7 +9,7 @@
+ */
+
+ /dts-v1/;
+-/include/ "sh73a0.dtsi"
++#include "sh73a0.dtsi"
+
+ / {
+ model = "KZM-A9-GT";
+--
+1.8.5.rc3
+
--- /dev/null
+From 33a088aff1b797b7b431f5153c4d94b57fbf9344 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 19 Nov 2013 03:18:25 +0100
+Subject: ARM: shmobile: Use interrupt macros in SoC DT files
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5f75e73c376c247a2c7bbe6f3fa3901b2d8f1a9c)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a73a4.dtsi | 108 ++++++++++++++++++++++++----------
+ arch/arm/boot/dts/r8a7740.dtsi | 106 +++++++++++++++++-----------------
+ arch/arm/boot/dts/r8a7778.dtsi | 44 +++++++-------
+ arch/arm/boot/dts/r8a7779.dtsi | 42 +++++++-------
+ arch/arm/boot/dts/r8a7790.dtsi | 50 +++++++++-------
+ arch/arm/boot/dts/r8a7791.dtsi | 49 ++++++++--------
+ arch/arm/boot/dts/sh73a0.dtsi | 128 +++++++++++++++++++++--------------------
+ 7 files changed, 295 insertions(+), 232 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
+index e079c994fd70..b4a6c3b43ee9 100644
+--- a/arch/arm/boot/dts/r8a73a4.dtsi
++++ b/arch/arm/boot/dts/r8a73a4.dtsi
+@@ -9,6 +9,9 @@
+ * kind, whether express or implied.
+ */
+
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++
+ / {
+ compatible = "renesas,r8a73a4";
+ interrupt-parent = <&gic>;
+@@ -36,15 +39,15 @@
+ <0 0xf1002000 0 0x1000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+- interrupts = <1 9 0xf04>;
++ interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+- interrupts = <1 13 0xf08>,
+- <1 14 0xf08>,
+- <1 11 0xf08>,
+- <1 10 0xf08>;
++ interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
++ <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
++ <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
++ <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ irqc0: interrupt-controller@e61c0000 {
+@@ -53,14 +56,38 @@
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>,
+- <0 4 4>, <0 5 4>, <0 6 4>, <0 7 4>,
+- <0 8 4>, <0 9 4>, <0 10 4>, <0 11 4>,
+- <0 12 4>, <0 13 4>, <0 14 4>, <0 15 4>,
+- <0 16 4>, <0 17 4>, <0 18 4>, <0 19 4>,
+- <0 20 4>, <0 21 4>, <0 22 4>, <0 23 4>,
+- <0 24 4>, <0 25 4>, <0 26 4>, <0 27 4>,
+- <0 28 4>, <0 29 4>, <0 30 4>, <0 31 4>;
++ interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
++ <0 1 IRQ_TYPE_LEVEL_HIGH>,
++ <0 2 IRQ_TYPE_LEVEL_HIGH>,
++ <0 3 IRQ_TYPE_LEVEL_HIGH>,
++ <0 4 IRQ_TYPE_LEVEL_HIGH>,
++ <0 5 IRQ_TYPE_LEVEL_HIGH>,
++ <0 6 IRQ_TYPE_LEVEL_HIGH>,
++ <0 7 IRQ_TYPE_LEVEL_HIGH>,
++ <0 8 IRQ_TYPE_LEVEL_HIGH>,
++ <0 9 IRQ_TYPE_LEVEL_HIGH>,
++ <0 10 IRQ_TYPE_LEVEL_HIGH>,
++ <0 11 IRQ_TYPE_LEVEL_HIGH>,
++ <0 12 IRQ_TYPE_LEVEL_HIGH>,
++ <0 13 IRQ_TYPE_LEVEL_HIGH>,
++ <0 14 IRQ_TYPE_LEVEL_HIGH>,
++ <0 15 IRQ_TYPE_LEVEL_HIGH>,
++ <0 16 IRQ_TYPE_LEVEL_HIGH>,
++ <0 17 IRQ_TYPE_LEVEL_HIGH>,
++ <0 18 IRQ_TYPE_LEVEL_HIGH>,
++ <0 19 IRQ_TYPE_LEVEL_HIGH>,
++ <0 20 IRQ_TYPE_LEVEL_HIGH>,
++ <0 21 IRQ_TYPE_LEVEL_HIGH>,
++ <0 22 IRQ_TYPE_LEVEL_HIGH>,
++ <0 23 IRQ_TYPE_LEVEL_HIGH>,
++ <0 24 IRQ_TYPE_LEVEL_HIGH>,
++ <0 25 IRQ_TYPE_LEVEL_HIGH>,
++ <0 26 IRQ_TYPE_LEVEL_HIGH>,
++ <0 27 IRQ_TYPE_LEVEL_HIGH>,
++ <0 28 IRQ_TYPE_LEVEL_HIGH>,
++ <0 29 IRQ_TYPE_LEVEL_HIGH>,
++ <0 30 IRQ_TYPE_LEVEL_HIGH>,
++ <0 31 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ irqc1: interrupt-controller@e61c0200 {
+@@ -69,13 +96,32 @@
+ interrupt-controller;
+ reg = <0 0xe61c0200 0 0x200>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 32 4>, <0 33 4>, <0 34 4>, <0 35 4>,
+- <0 36 4>, <0 37 4>, <0 38 4>, <0 39 4>,
+- <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>,
+- <0 44 4>, <0 45 4>, <0 46 4>, <0 47 4>,
+- <0 48 4>, <0 49 4>, <0 50 4>, <0 51 4>,
+- <0 52 4>, <0 53 4>, <0 54 4>, <0 55 4>,
+- <0 56 4>, <0 57 4>;
++ interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
++ <0 33 IRQ_TYPE_LEVEL_HIGH>,
++ <0 34 IRQ_TYPE_LEVEL_HIGH>,
++ <0 35 IRQ_TYPE_LEVEL_HIGH>,
++ <0 36 IRQ_TYPE_LEVEL_HIGH>,
++ <0 37 IRQ_TYPE_LEVEL_HIGH>,
++ <0 38 IRQ_TYPE_LEVEL_HIGH>,
++ <0 39 IRQ_TYPE_LEVEL_HIGH>,
++ <0 40 IRQ_TYPE_LEVEL_HIGH>,
++ <0 41 IRQ_TYPE_LEVEL_HIGH>,
++ <0 42 IRQ_TYPE_LEVEL_HIGH>,
++ <0 43 IRQ_TYPE_LEVEL_HIGH>,
++ <0 44 IRQ_TYPE_LEVEL_HIGH>,
++ <0 45 IRQ_TYPE_LEVEL_HIGH>,
++ <0 46 IRQ_TYPE_LEVEL_HIGH>,
++ <0 47 IRQ_TYPE_LEVEL_HIGH>,
++ <0 48 IRQ_TYPE_LEVEL_HIGH>,
++ <0 49 IRQ_TYPE_LEVEL_HIGH>,
++ <0 50 IRQ_TYPE_LEVEL_HIGH>,
++ <0 51 IRQ_TYPE_LEVEL_HIGH>,
++ <0 52 IRQ_TYPE_LEVEL_HIGH>,
++ <0 53 IRQ_TYPE_LEVEL_HIGH>,
++ <0 54 IRQ_TYPE_LEVEL_HIGH>,
++ <0 55 IRQ_TYPE_LEVEL_HIGH>,
++ <0 56 IRQ_TYPE_LEVEL_HIGH>,
++ <0 57 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ dmac: dma-multiplexer@0 {
+@@ -126,7 +172,7 @@
+ reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
+ <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 69 4>;
++ interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ i2c0: i2c@e6500000 {
+@@ -175,7 +221,7 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6540000 0 0x428>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 178 0x4>;
++ interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -185,7 +231,7 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x428>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 179 0x4>;
++ interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -195,7 +241,7 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6550000 0 0x428>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 184 0x4>;
++ interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -205,7 +251,7 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6560000 0 0x428>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 185 0x4>;
++ interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -215,7 +261,7 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6570000 0 0x428>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 173 0x4>;
++ interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -223,7 +269,7 @@
+ compatible = "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 169 0x4>;
++ interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+@@ -232,7 +278,7 @@
+ compatible = "renesas,sh-mmcif";
+ reg = <0 0xee220000 0 0x80>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 170 0x4>;
++ interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+@@ -248,7 +294,7 @@
+ compatible = "renesas,sdhi-r8a73a4";
+ reg = <0 0xee100000 0 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 165 4>;
++ interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+@@ -257,7 +303,7 @@
+ compatible = "renesas,sdhi-r8a73a4";
+ reg = <0 0xee120000 0 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 166 4>;
++ interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+@@ -266,7 +312,7 @@
+ compatible = "renesas,sdhi-r8a73a4";
+ reg = <0 0xee140000 0 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 167 4>;
++ interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
+index 4cc945a799bb..b1c2ed961eed 100644
+--- a/arch/arm/boot/dts/r8a7740.dtsi
++++ b/arch/arm/boot/dts/r8a7740.dtsi
+@@ -10,6 +10,8 @@
+
+ /include/ "skeleton.dtsi"
+
++#include <dt-bindings/interrupt-controller/irq.h>
++
+ / {
+ compatible = "renesas,r8a7740";
+
+@@ -34,7 +36,7 @@
+
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+- interrupts = <0 83 4>;
++ interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ /* irqpin0: IRQ0 - IRQ7 */
+@@ -48,14 +50,14 @@
+ <0xe6900040 1>,
+ <0xe6900060 1>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4>;
++ interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ /* irqpin1: IRQ8 - IRQ15 */
+@@ -69,14 +71,14 @@
+ <0xe6900044 1>,
+ <0xe6900064 1>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4>;
++ interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ /* irqpin2: IRQ16 - IRQ23 */
+@@ -90,14 +92,14 @@
+ <0xe6900048 1>,
+ <0xe6900068 1>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4>;
++ interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ /* irqpin3: IRQ24 - IRQ31 */
+@@ -111,14 +113,14 @@
+ <0xe690004c 1>,
+ <0xe690006c 1>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4
+- 0 149 0x4>;
++ interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH
++ 0 149 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ i2c0: i2c@fff20000 {
+@@ -127,10 +129,10 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0xfff20000 0x425>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 201 0x4
+- 0 202 0x4
+- 0 203 0x4
+- 0 204 0x4>;
++ interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
++ 0 202 IRQ_TYPE_LEVEL_HIGH
++ 0 203 IRQ_TYPE_LEVEL_HIGH
++ 0 204 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -140,10 +142,10 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0xe6c20000 0x425>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 70 0x4
+- 0 71 0x4
+- 0 72 0x4
+- 0 73 0x4>;
++ interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
++ 0 71 IRQ_TYPE_LEVEL_HIGH
++ 0 72 IRQ_TYPE_LEVEL_HIGH
++ 0 73 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -166,8 +168,8 @@
+ compatible = "renesas,sh-mmcif";
+ reg = <0xe6bd0000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 56 4
+- 0 57 4>;
++ interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
++ 0 57 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -175,9 +177,9 @@
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xe6850000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 117 4
+- 0 118 4
+- 0 119 4>;
++ interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
++ 0 118 IRQ_TYPE_LEVEL_HIGH
++ 0 119 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ status = "disabled";
+@@ -187,9 +189,9 @@
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xe6860000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 121 4
+- 0 122 4
+- 0 123 4>;
++ interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
++ 0 122 IRQ_TYPE_LEVEL_HIGH
++ 0 123 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ status = "disabled";
+@@ -199,9 +201,9 @@
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xe6870000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 125 4
+- 0 126 4
+- 0 127 4>;
++ interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
++ 0 126 IRQ_TYPE_LEVEL_HIGH
++ 0 127 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ status = "disabled";
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index 819b1942aa14..3314e0aeccf5 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -16,6 +16,8 @@
+
+ /include/ "skeleton.dtsi"
+
++#include <dt-bindings/interrupt-controller/irq.h>
++
+ / {
+ compatible = "renesas,r8a7778";
+
+@@ -51,10 +53,10 @@
+ <0xfe780044 4>,
+ <0xfe780064 4>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 27 0x4
+- 0 28 0x4
+- 0 29 0x4
+- 0 30 0x4>;
++ interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
++ 0 28 IRQ_TYPE_LEVEL_HIGH
++ 0 29 IRQ_TYPE_LEVEL_HIGH
++ 0 30 IRQ_TYPE_LEVEL_HIGH>;
+ sense-bitfield-width = <2>;
+ };
+
+@@ -62,7 +64,7 @@
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc40000 0x2c>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 103 0x4>;
++ interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+@@ -74,7 +76,7 @@
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc41000 0x2c>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 103 0x4>;
++ interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 32>;
+@@ -86,7 +88,7 @@
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc42000 0x2c>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 103 0x4>;
++ interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+@@ -98,7 +100,7 @@
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc43000 0x2c>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 103 0x4>;
++ interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+@@ -110,7 +112,7 @@
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc44000 0x2c>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 103 0x4>;
++ interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 27>;
+@@ -129,7 +131,7 @@
+ compatible = "renesas,i2c-r8a7778";
+ reg = <0xffc70000 0x1000>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 67 0x4>;
++ interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -139,7 +141,7 @@
+ compatible = "renesas,i2c-r8a7778";
+ reg = <0xffc71000 0x1000>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 78 0x4>;
++ interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -149,7 +151,7 @@
+ compatible = "renesas,i2c-r8a7778";
+ reg = <0xffc72000 0x1000>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 76 0x4>;
++ interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -159,7 +161,7 @@
+ compatible = "renesas,i2c-r8a7778";
+ reg = <0xffc73000 0x1000>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 77 0x4>;
++ interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -167,7 +169,7 @@
+ compatible = "renesas,sh-mmcif";
+ reg = <0xffe4e000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 61 4>;
++ interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -175,7 +177,7 @@
+ compatible = "renesas,sdhi-r8a7778";
+ reg = <0xffe4c000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 87 4>;
++ interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ status = "disabled";
+@@ -185,7 +187,7 @@
+ compatible = "renesas,sdhi-r8a7778";
+ reg = <0xffe4d000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 88 4>;
++ interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ status = "disabled";
+@@ -195,7 +197,7 @@
+ compatible = "renesas,sdhi-r8a7778";
+ reg = <0xffe4f000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 86 4>;
++ interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ status = "disabled";
+@@ -207,7 +209,7 @@
+ compatible = "renesas,i2c-r8a7778";
+ reg = <0xffc70000 0x1000>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 67 0x4>;
++ interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -217,7 +219,7 @@
+ compatible = "renesas,i2c-r8a7778";
+ reg = <0xffc71000 0x1000>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 78 0x4>;
++ interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -227,7 +229,7 @@
+ compatible = "renesas,i2c-r8a7778";
+ reg = <0xffc72000 0x1000>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 76 0x4>;
++ interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -237,7 +239,7 @@
+ compatible = "renesas,i2c-r8a7778";
+ reg = <0xffc73000 0x1000>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 77 0x4>;
++ interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
+index 05fd41c6012f..b2b418a8ab2d 100644
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -11,6 +11,8 @@
+
+ /include/ "skeleton.dtsi"
+
++#include <dt-bindings/interrupt-controller/irq.h>
++
+ / {
+ compatible = "renesas,r8a7779";
+
+@@ -52,7 +54,7 @@
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc40000 0x2c>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 141 0x4>;
++ interrupts = <0 141 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+@@ -64,7 +66,7 @@
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc41000 0x2c>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 142 0x4>;
++ interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 32>;
+@@ -76,7 +78,7 @@
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc42000 0x2c>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 143 0x4>;
++ interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+@@ -88,7 +90,7 @@
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc43000 0x2c>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 144 0x4>;
++ interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+@@ -100,7 +102,7 @@
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc44000 0x2c>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 145 0x4>;
++ interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+@@ -112,7 +114,7 @@
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc45000 0x2c>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 146 0x4>;
++ interrupts = <0 146 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 32>;
+@@ -124,7 +126,7 @@
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc46000 0x2c>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 147 0x4>;
++ interrupts = <0 147 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 9>;
+@@ -143,10 +145,10 @@
+ <0xfe780044 4>,
+ <0xfe780064 4>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 27 0x4
+- 0 28 0x4
+- 0 29 0x4
+- 0 30 0x4>;
++ interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
++ 0 28 IRQ_TYPE_LEVEL_HIGH
++ 0 29 IRQ_TYPE_LEVEL_HIGH
++ 0 30 IRQ_TYPE_LEVEL_HIGH>;
+ sense-bitfield-width = <2>;
+ };
+
+@@ -156,7 +158,7 @@
+ compatible = "renesas,i2c-r8a7779";
+ reg = <0xffc70000 0x1000>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 79 0x4>;
++ interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -166,7 +168,7 @@
+ compatible = "renesas,i2c-r8a7779";
+ reg = <0xffc71000 0x1000>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 82 0x4>;
++ interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -176,7 +178,7 @@
+ compatible = "renesas,i2c-r8a7779";
+ reg = <0xffc72000 0x1000>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 80 0x4>;
++ interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -186,7 +188,7 @@
+ compatible = "renesas,i2c-r8a7779";
+ reg = <0xffc73000 0x1000>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 81 0x4>;
++ interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -204,14 +206,14 @@
+ compatible = "renesas,rcar-sata";
+ reg = <0xfc600000 0x2000>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 100 0x4>;
++ interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sdhi0: sd@ffe4c000 {
+ compatible = "renesas,sdhi-r8a7779";
+ reg = <0xffe4c000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 104 4>;
++ interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ status = "disabled";
+@@ -221,7 +223,7 @@
+ compatible = "renesas,sdhi-r8a7779";
+ reg = <0xffe4d000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 105 4>;
++ interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ status = "disabled";
+@@ -231,7 +233,7 @@
+ compatible = "renesas,sdhi-r8a7779";
+ reg = <0xffe4e000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 107 4>;
++ interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ status = "disabled";
+@@ -241,7 +243,7 @@
+ compatible = "renesas,sdhi-r8a7779";
+ reg = <0xffe4f000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 106 4>;
++ interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ status = "disabled";
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 839f1e761235..9ce4d47d1ad3 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -8,6 +8,9 @@
+ * kind, whether express or implied.
+ */
+
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++
+ / {
+ compatible = "renesas,r8a7790";
+ interrupt-parent = <&gic>;
+@@ -84,14 +87,14 @@
+ <0 0xf1002000 0 0x1000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+- interrupts = <1 9 0xf04>;
++ interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 4 0x4>;
++ interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+@@ -103,7 +106,7 @@
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 5 0x4>;
++ interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 32>;
+@@ -115,7 +118,7 @@
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 6 0x4>;
++ interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+@@ -127,7 +130,7 @@
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 7 0x4>;
++ interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+@@ -139,7 +142,7 @@
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 8 0x4>;
++ interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+@@ -151,7 +154,7 @@
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 9 0x4>;
++ interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 32>;
+@@ -161,10 +164,10 @@
+
+ timer {
+ compatible = "arm,armv7-timer";
+- interrupts = <1 13 0xf08>,
+- <1 14 0xf08>,
+- <1 11 0xf08>,
+- <1 10 0xf08>;
++ interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
++ <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
++ <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
++ <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ irqc0: interrupt-controller@e61c0000 {
+@@ -173,7 +176,10 @@
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>;
++ interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
++ <0 1 IRQ_TYPE_LEVEL_HIGH>,
++ <0 2 IRQ_TYPE_LEVEL_HIGH>,
++ <0 3 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ i2c0: i2c@e6508000 {
+@@ -182,7 +188,7 @@
+ compatible = "renesas,i2c-r8a7790";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 287 0x4>;
++ interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -192,7 +198,7 @@
+ compatible = "renesas,i2c-r8a7790";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 288 0x4>;
++ interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -202,7 +208,7 @@
+ compatible = "renesas,i2c-r8a7790";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 286 0x4>;
++ interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -212,7 +218,7 @@
+ compatible = "renesas,i2c-r8a7790";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 290 0x4>;
++ interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -220,7 +226,7 @@
+ compatible = "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 169 0x4>;
++ interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+@@ -229,7 +235,7 @@
+ compatible = "renesas,sh-mmcif";
+ reg = <0 0xee220000 0 0x80>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 170 0x4>;
++ interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+@@ -243,7 +249,7 @@
+ compatible = "renesas,sdhi-r8a7790";
+ reg = <0 0xee100000 0 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 165 4>;
++ interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+@@ -252,7 +258,7 @@
+ compatible = "renesas,sdhi-r8a7790";
+ reg = <0 0xee120000 0 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 166 4>;
++ interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+@@ -261,7 +267,7 @@
+ compatible = "renesas,sdhi-r8a7790";
+ reg = <0 0xee140000 0 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 167 4>;
++ interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+@@ -270,7 +276,7 @@
+ compatible = "renesas,sdhi-r8a7790";
+ reg = <0 0xee160000 0 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 168 4>;
++ interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 344f1f759c1a..86d5d3a509f9 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -9,6 +9,9 @@
+ * kind, whether express or implied.
+ */
+
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++
+ / {
+ compatible = "renesas,r8a7791";
+ interrupt-parent = <&gic>;
+@@ -43,14 +46,14 @@
+ <0 0xf1002000 0 0x1000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+- interrupts = <1 9 0xf04>;
++ interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ gpio0: gpio@ffc40000 {
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+ reg = <0 0xffc40000 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 4 0x4>;
++ interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+@@ -62,7 +65,7 @@
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+ reg = <0 0xffc41000 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 5 0x4>;
++ interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 32>;
+@@ -74,7 +77,7 @@
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+ reg = <0 0xffc42000 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 6 0x4>;
++ interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+@@ -86,7 +89,7 @@
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+ reg = <0 0xffc43000 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 7 0x4>;
++ interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+@@ -98,7 +101,7 @@
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+ reg = <0 0xffc44000 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 8 0x4>;
++ interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+@@ -110,7 +113,7 @@
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+ reg = <0 0xffc45000 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 9 0x4>;
++ interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 32>;
+@@ -122,7 +125,7 @@
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+ reg = <0 0xffc45400 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 10 0x4>;
++ interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 32>;
+@@ -134,7 +137,7 @@
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+ reg = <0 0xffc45800 0 0x50>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 11 0x4>;
++ interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 224 26>;
+@@ -144,10 +147,10 @@
+
+ timer {
+ compatible = "arm,armv7-timer";
+- interrupts = <1 13 0xf08>,
+- <1 14 0xf08>,
+- <1 11 0xf08>,
+- <1 10 0xf08>;
++ interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
++ <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
++ <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
++ <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ irqc0: interrupt-controller@e61c0000 {
+@@ -156,16 +159,16 @@
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 0 4>,
+- <0 1 4>,
+- <0 2 4>,
+- <0 3 4>,
+- <0 12 4>,
+- <0 13 4>,
+- <0 14 4>,
+- <0 15 4>,
+- <0 16 4>,
+- <0 17 4>;
++ interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
++ <0 1 IRQ_TYPE_LEVEL_HIGH>,
++ <0 2 IRQ_TYPE_LEVEL_HIGH>,
++ <0 3 IRQ_TYPE_LEVEL_HIGH>,
++ <0 12 IRQ_TYPE_LEVEL_HIGH>,
++ <0 13 IRQ_TYPE_LEVEL_HIGH>,
++ <0 14 IRQ_TYPE_LEVEL_HIGH>,
++ <0 15 IRQ_TYPE_LEVEL_HIGH>,
++ <0 16 IRQ_TYPE_LEVEL_HIGH>,
++ <0 17 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pfc: pfc@e6060000 {
+diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
+index 78f7201aeb24..aef8a61b5514 100644
+--- a/arch/arm/boot/dts/sh73a0.dtsi
++++ b/arch/arm/boot/dts/sh73a0.dtsi
+@@ -10,6 +10,8 @@
+
+ /include/ "skeleton.dtsi"
+
++#include <dt-bindings/interrupt-controller/irq.h>
++
+ / {
+ compatible = "renesas,sh73a0";
+
+@@ -40,8 +42,8 @@
+
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+- interrupts = <0 55 4>,
+- <0 56 4>;
++ interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>,
++ <0 56 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ irqpin0: irqpin@e6900000 {
+@@ -54,14 +56,14 @@
+ <0xe6900040 1>,
+ <0xe6900060 1>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 1 0x4
+- 0 2 0x4
+- 0 3 0x4
+- 0 4 0x4
+- 0 5 0x4
+- 0 6 0x4
+- 0 7 0x4
+- 0 8 0x4>;
++ interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH
++ 0 2 IRQ_TYPE_LEVEL_HIGH
++ 0 3 IRQ_TYPE_LEVEL_HIGH
++ 0 4 IRQ_TYPE_LEVEL_HIGH
++ 0 5 IRQ_TYPE_LEVEL_HIGH
++ 0 6 IRQ_TYPE_LEVEL_HIGH
++ 0 7 IRQ_TYPE_LEVEL_HIGH
++ 0 8 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ irqpin1: irqpin@e6900004 {
+@@ -74,14 +76,14 @@
+ <0xe6900044 1>,
+ <0xe6900064 1>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 9 0x4
+- 0 10 0x4
+- 0 11 0x4
+- 0 12 0x4
+- 0 13 0x4
+- 0 14 0x4
+- 0 15 0x4
+- 0 16 0x4>;
++ interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH
++ 0 10 IRQ_TYPE_LEVEL_HIGH
++ 0 11 IRQ_TYPE_LEVEL_HIGH
++ 0 12 IRQ_TYPE_LEVEL_HIGH
++ 0 13 IRQ_TYPE_LEVEL_HIGH
++ 0 14 IRQ_TYPE_LEVEL_HIGH
++ 0 15 IRQ_TYPE_LEVEL_HIGH
++ 0 16 IRQ_TYPE_LEVEL_HIGH>;
+ control-parent;
+ };
+
+@@ -95,14 +97,14 @@
+ <0xe6900048 1>,
+ <0xe6900068 1>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 17 0x4
+- 0 18 0x4
+- 0 19 0x4
+- 0 20 0x4
+- 0 21 0x4
+- 0 22 0x4
+- 0 23 0x4
+- 0 24 0x4>;
++ interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH
++ 0 18 IRQ_TYPE_LEVEL_HIGH
++ 0 19 IRQ_TYPE_LEVEL_HIGH
++ 0 20 IRQ_TYPE_LEVEL_HIGH
++ 0 21 IRQ_TYPE_LEVEL_HIGH
++ 0 22 IRQ_TYPE_LEVEL_HIGH
++ 0 23 IRQ_TYPE_LEVEL_HIGH
++ 0 24 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ irqpin3: irqpin@e690000c {
+@@ -115,14 +117,14 @@
+ <0xe690004c 1>,
+ <0xe690006c 1>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 25 0x4
+- 0 26 0x4
+- 0 27 0x4
+- 0 28 0x4
+- 0 29 0x4
+- 0 30 0x4
+- 0 31 0x4
+- 0 32 0x4>;
++ interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH
++ 0 26 IRQ_TYPE_LEVEL_HIGH
++ 0 27 IRQ_TYPE_LEVEL_HIGH
++ 0 28 IRQ_TYPE_LEVEL_HIGH
++ 0 29 IRQ_TYPE_LEVEL_HIGH
++ 0 30 IRQ_TYPE_LEVEL_HIGH
++ 0 31 IRQ_TYPE_LEVEL_HIGH
++ 0 32 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ i2c0: i2c@e6820000 {
+@@ -131,10 +133,10 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0xe6820000 0x425>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 167 0x4
+- 0 168 0x4
+- 0 169 0x4
+- 0 170 0x4>;
++ interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH
++ 0 168 IRQ_TYPE_LEVEL_HIGH
++ 0 169 IRQ_TYPE_LEVEL_HIGH
++ 0 170 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -144,10 +146,10 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0xe6822000 0x425>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 51 0x4
+- 0 52 0x4
+- 0 53 0x4
+- 0 54 0x4>;
++ interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH
++ 0 52 IRQ_TYPE_LEVEL_HIGH
++ 0 53 IRQ_TYPE_LEVEL_HIGH
++ 0 54 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -157,10 +159,10 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0xe6824000 0x425>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 171 0x4
+- 0 172 0x4
+- 0 173 0x4
+- 0 174 0x4>;
++ interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH
++ 0 172 IRQ_TYPE_LEVEL_HIGH
++ 0 173 IRQ_TYPE_LEVEL_HIGH
++ 0 174 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -170,10 +172,10 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0xe6826000 0x425>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 183 0x4
+- 0 184 0x4
+- 0 185 0x4
+- 0 186 0x4>;
++ interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH
++ 0 184 IRQ_TYPE_LEVEL_HIGH
++ 0 185 IRQ_TYPE_LEVEL_HIGH
++ 0 186 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -183,10 +185,10 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0xe6828000 0x425>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 187 0x4
+- 0 188 0x4
+- 0 189 0x4
+- 0 190 0x4>;
++ interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH
++ 0 188 IRQ_TYPE_LEVEL_HIGH
++ 0 189 IRQ_TYPE_LEVEL_HIGH
++ 0 190 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -194,8 +196,8 @@
+ compatible = "renesas,sh-mmcif";
+ reg = <0xe6bd0000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 140 0x4
+- 0 141 0x4>;
++ interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH
++ 0 141 IRQ_TYPE_LEVEL_HIGH>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+@@ -204,9 +206,9 @@
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xee100000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 83 4
+- 0 84 4
+- 0 85 4>;
++ interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH
++ 0 84 IRQ_TYPE_LEVEL_HIGH
++ 0 85 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+@@ -216,8 +218,8 @@
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xee120000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 88 4
+- 0 89 4>;
++ interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH
++ 0 89 IRQ_TYPE_LEVEL_HIGH>;
+ toshiba,mmc-wrprotect-disable;
+ cap-sd-highspeed;
+ status = "disabled";
+@@ -227,8 +229,8 @@
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xee140000 0x100>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 104 4
+- 0 105 4>;
++ interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH
++ 0 105 IRQ_TYPE_LEVEL_HIGH>;
+ toshiba,mmc-wrprotect-disable;
+ cap-sd-highspeed;
+ status = "disabled";
+--
+1.8.5.rc3
+
--- /dev/null
+From ecc1ee52c3d833d0a732bd64fd61bfcca3a81082 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 9 Nov 2013 13:23:55 +0100
+Subject: ARM: shmobile: Use interrupt macros in board DT files
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 77e2d7e27e9842a1141a624bfbb53ebce1c9e3e1)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a73a4-ape6evm.dts | 3 ++-
+ arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 3 ++-
+ arch/arm/boot/dts/r8a7778-bockw-reference.dts | 3 ++-
+ arch/arm/boot/dts/r8a7779-marzen-reference.dts | 3 ++-
+ arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 3 ++-
+ 5 files changed, 10 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
+index 7db8d79fb93c..e84d1a7db66e 100644
+--- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
++++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
+@@ -10,6 +10,7 @@
+
+ /dts-v1/;
+ #include "r8a73a4.dtsi"
++#include <dt-bindings/interrupt-controller/irq.h>
+
+ / {
+ model = "APE6EVM";
+@@ -40,7 +41,7 @@
+ compatible = "smsc,lan9118", "smsc,lan9115";
+ reg = <0x08000000 0x1000>;
+ interrupt-parent = <&irqc1>;
+- interrupts = <8 0x4>;
++ interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
+ phy-mode = "mii";
+ reg-io-width = <4>;
+ smsc,irq-active-high;
+diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+index c7c5bcb893ca..aef425faf731 100644
+--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
++++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+@@ -11,6 +11,7 @@
+ /dts-v1/;
+ #include "r8a7740.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/pwm/pwm.h>
+
+ / {
+@@ -94,7 +95,7 @@
+ compatible = "sitronix,st1232";
+ reg = <0x55>;
+ interrupt-parent = <&irqpin1>;
+- interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
++ interrupts = <2 IRQ_TYPE_NONE>; /* IRQ10: hwirq 2 on irqpin1 */
+ pinctrl-0 = <&st1232_pins>;
+ pinctrl-names = "default";
+ gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
+diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+index be9b75377f3e..2000cf861243 100644
+--- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
++++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+@@ -16,6 +16,7 @@
+
+ /dts-v1/;
+ #include "r8a7778.dtsi"
++#include <dt-bindings/interrupt-controller/irq.h>
+
+ / {
+ model = "bockw";
+@@ -45,7 +46,7 @@
+
+ phy-mode = "mii";
+ interrupt-parent = <&irqpin>;
+- interrupts = <0 0>; /* IRQ0: hwirq 0 on irqpin */
++ interrupts = <0 IRQ_TYPE_NONE>; /* IRQ0: hwirq 0 on irqpin */
+ reg-io-width = <4>;
+ vddvario-supply = <&fixedregulator3v3>;
+ vdd33a-supply = <&fixedregulator3v3>;
+diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+index 08b9ee37ad2f..0f5c6141a2dc 100644
+--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
++++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+@@ -12,6 +12,7 @@
+ /dts-v1/;
+ #include "r8a7779.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/interrupt-controller/irq.h>
+
+ / {
+ model = "marzen";
+@@ -43,7 +44,7 @@
+
+ phy-mode = "mii";
+ interrupt-parent = <&irqpin0>;
+- interrupts = <1 0>; /* IRQ1: hwirq 1 on irqpin0 */
++ interrupts = <1 IRQ_TYPE_NONE>; /* IRQ1: hwirq 1 on irqpin0 */
+ reg-io-width = <4>;
+ vddvario-supply = <&fixedregulator3v3>;
+ vdd33a-supply = <&fixedregulator3v3>;
+diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+index d5a6d74cdda0..605f6c627307 100644
+--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
++++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+@@ -14,6 +14,7 @@
+ /dts-v1/;
+ #include "sh73a0.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/interrupt-controller/irq.h>
+
+ / {
+ model = "KZM-A9-GT";
+@@ -82,7 +83,7 @@
+ reg = <0x10000000 0x100>;
+ phy-mode = "mii";
+ interrupt-parent = <&irqpin0>;
+- interrupts = <3 0>; /* active low */
++ interrupts = <3 IRQ_TYPE_NONE>; /* active low */
+ reg-io-width = <4>;
+ smsc,irq-push-pull;
+ smsc,save-mac-address;
+--
+1.8.5.rc3
+
--- /dev/null
+From 554de99bf61cf5d58a4a6e365cdd2ba494e326d2 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 9 Nov 2013 13:23:56 +0100
+Subject: ARM: shmobile: marzen-reference: Use falling edge IRQ for LAN9221
+
+The device is configured to generate an active-low interrupt signal that
+is automatically deasserted without requiring any action from the host.
+Use falling edge trigger as that is the configuration currently used on
+the board.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e60038eda492460c46833f4a54bebd256018a912)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779-marzen-reference.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+index 0f5c6141a2dc..13fa8beeb6e5 100644
+--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
++++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+@@ -44,7 +44,7 @@
+
+ phy-mode = "mii";
+ interrupt-parent = <&irqpin0>;
+- interrupts = <1 IRQ_TYPE_NONE>; /* IRQ1: hwirq 1 on irqpin0 */
++ interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+ reg-io-width = <4>;
+ vddvario-supply = <&fixedregulator3v3>;
+ vdd33a-supply = <&fixedregulator3v3>;
+--
+1.8.5.rc3
+
--- /dev/null
+From fb02114012b0b62711fb3d03ac737e9e0d78d6d6 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 9 Nov 2013 13:23:57 +0100
+Subject: ARM: shmobile: bockw-reference: Use falling edge IRQ for LAN9221
+
+The device is configured to generate an active-low interrupt signal that
+is automatically deasserted without requiring any action from the host.
+Configure the IRQ to trigger on falling edge.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 08281424f1ca5680e4a17656f3d9b978103779eb)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778-bockw-reference.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+index 2000cf861243..bb62c7a906f4 100644
+--- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
++++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+@@ -46,7 +46,7 @@
+
+ phy-mode = "mii";
+ interrupt-parent = <&irqpin>;
+- interrupts = <0 IRQ_TYPE_NONE>; /* IRQ0: hwirq 0 on irqpin */
++ interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
+ reg-io-width = <4>;
+ vddvario-supply = <&fixedregulator3v3>;
+ vdd33a-supply = <&fixedregulator3v3>;
+--
+1.8.5.rc3
+
--- /dev/null
+From 02194e70ff09dfbe577a7c869d72e7375e0c9a66 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 9 Nov 2013 13:23:58 +0100
+Subject: ARM: shmobile: kzm9g-reference: Use falling edge IRQ for LAN9221
+
+The device is configured to generate an active-low interrupt signal that
+is automatically deasserted without requiring any action from the host.
+Configure the IRQ to trigger on falling edge.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 72e14c051a920d9c30d6cab2aecd1699a070aebe)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+index 605f6c627307..12fdfaaf5e7b 100644
+--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
++++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+@@ -83,7 +83,7 @@
+ reg = <0x10000000 0x100>;
+ phy-mode = "mii";
+ interrupt-parent = <&irqpin0>;
+- interrupts = <3 IRQ_TYPE_NONE>; /* active low */
++ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+ reg-io-width = <4>;
+ smsc,irq-push-pull;
+ smsc,save-mac-address;
+--
+1.8.5.rc3
+
--- /dev/null
+From 80ce747fc907e50d73bccb19460c04af05016034 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 19 Nov 2013 19:17:41 -0800
+Subject: ARM: shmobile: marzen: remove SDHI0 WP pin setting from DTS
+
+WP pin is not implemented on Marzen
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 72e7db878b8469261d01a3dfcece8ab99ffc9cb6)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779-marzen-reference.dts | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+index 13fa8beeb6e5..918085c375d9 100644
+--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
++++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+@@ -94,8 +94,7 @@
+ };
+
+ sdhi0_pins: sd0 {
+- renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd",
+- "sdhi0_wp";
++ renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
+ renesas,function = "sdhi0";
+ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From ff578e7f905d6b3a7184235f9d7ae34c5da4b54a Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 19 Nov 2013 19:17:55 -0800
+Subject: ARM: shmobile: marzen: remove SDHI0 WP pin setting
+
+WP pin is not implemented on Marzen
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9e5a68d2b9aba2c65112986ece1334bf72711117)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-marzen.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
+index 4f9e3ec42ddc..d832a4477b4b 100644
+--- a/arch/arm/mach-shmobile/board-marzen.c
++++ b/arch/arm/mach-shmobile/board-marzen.c
+@@ -347,8 +347,6 @@ static const struct pinctrl_map marzen_pinctrl_map[] = {
+ "sdhi0_ctrl", "sdhi0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
+ "sdhi0_cd", "sdhi0"),
+- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
+- "sdhi0_wp", "sdhi0"),
+ /* SMSC */
+ PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
+ "intc_irq1_b", "intc"),
+--
+1.8.5.rc3
+
--- /dev/null
+From f0c020d2bafd6929ba53e69b615d710738b3ef05 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 19 Nov 2013 19:18:09 -0800
+Subject: ARM: shmobile: sh73a0: fixup sdhi compatible name
+
+sh73a0 != r8a7740
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e8a8b8a3cd6e09209a9c253a22673836ef794f58)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/sh73a0.dtsi | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
+index aef8a61b5514..29d2ee6e36c6 100644
+--- a/arch/arm/boot/dts/sh73a0.dtsi
++++ b/arch/arm/boot/dts/sh73a0.dtsi
+@@ -203,7 +203,7 @@
+ };
+
+ sdhi0: sd@ee100000 {
+- compatible = "renesas,sdhi-r8a7740";
++ compatible = "renesas,sdhi-sh73a0";
+ reg = <0xee100000 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH
+@@ -215,7 +215,7 @@
+
+ /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
+ sdhi1: sd@ee120000 {
+- compatible = "renesas,sdhi-r8a7740";
++ compatible = "renesas,sdhi-sh73a0";
+ reg = <0xee120000 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH
+@@ -226,7 +226,7 @@
+ };
+
+ sdhi2: sd@ee140000 {
+- compatible = "renesas,sdhi-r8a7740";
++ compatible = "renesas,sdhi-sh73a0";
+ reg = <0xee140000 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH
+--
+1.8.5.rc3
+
--- /dev/null
+From 79273889b58ecdb592c4e7c5a134b1149cb10797 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 13:18:05 +0900
+Subject: ARM: shmobile: Use r8a7791 suffix for IRQC compat string
+
+Add "renesas,irqc-r8a7791" to the compatible string for IRQC
+in case of r8a7791. This makes the IRQC follow the same style
+as the other devices and also makes it more future proof.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 26041b06107fbf4618422618630f154f8d1a7d64)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 86d5d3a509f9..d85254ca20b8 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -154,7 +154,7 @@
+ };
+
+ irqc0: interrupt-controller@e61c0000 {
+- compatible = "renesas,irqc";
++ compatible = "renesas,irqc-r8a7791", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+--
+1.8.5.rc3
+
--- /dev/null
+From e72b1453db74dba6c8285ac210940cfe44f81dc9 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 16:36:59 +0900
+Subject: ARM: shmobile: Configure r8a7791 PFC on Koelsch via DTS
+
+Configure the "D" set of data signals for SCIF0 and SCIF1
+on the Koelsch board to setup pinctrl serial console bits.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b91a89cf8d9880d1d82c7f9f4c1a448bb680dc2c)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch-reference.dts | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
+index 1a0f082b21df..8e7e917d66b6 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
+@@ -30,3 +30,18 @@
+ #size-cells = <1>;
+ };
+ };
++
++&pfc {
++ pinctrl-0 = <&scif0_pins &scif1_pins>;
++ pinctrl-names = "default";
++
++ scif0_pins: serial0 {
++ renesas,groups = "scif0_data_d";
++ renesas,function = "scif0";
++ };
++
++ scif1_pins: serial1 {
++ renesas,groups = "scif1_data_d";
++ renesas,function = "scif1";
++ };
++};
+--
+1.8.5.rc3
+
--- /dev/null
+From 94f9de17b7c568015437f8fc658cad5ae94a7e27 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 16:59:30 +0900
+Subject: ARM: shmobile: Add r8a7790 thermal device node to DTS
+
+Hook up the r8a7790 thermal sensor to the DTS.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 03e2f56b8f68594ccae4b219a2693c938a04c51e)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 9ce4d47d1ad3..2245d91fb6da 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -162,6 +162,13 @@
+ interrupt-controller;
+ };
+
++ thermal@e61f0000 {
++ compatible = "renesas,thermal-r8a7790", "renesas,rcar-thermal";
++ reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+--
+1.8.5.rc3
+
--- /dev/null
+From e73974feab1337f0cb95a3ace70537f41670d2fe Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 16:59:48 +0900
+Subject: ARM: shmobile: Add r8a7791 thermal device node to DTS
+
+Hook up the r8a7791 thermal sensor to the DTS.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d103f4d3152b187b22fd6010370fe1d16419a334)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index d85254ca20b8..e36b3652b7c2 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -145,6 +145,13 @@
+ interrupt-controller;
+ };
+
++ thermal@e61f0000 {
++ compatible = "renesas,thermal-r8a7791", "renesas,rcar-thermal";
++ reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+--
+1.8.5.rc3
+
--- /dev/null
+From a93972349a90fe8303e84ab456aa46a2ea195786 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 09:05:53 +0900
+Subject: ARM: shmobile: Use r8a7790 suffix for MMCIF compat string
+
+Add "renesas,mmcif-r8a7790" to the compatible string for MMCIF
+in case of r8a7790. This makes the MMCIF follow the same style
+as the other devices and also makes it more future proof.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 063e85607ddf26e5ede36b7454eddc8e87544540)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 2245d91fb6da..cfb0f8b70e53 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -230,7 +230,7 @@
+ };
+
+ mmcif0: mmcif@ee200000 {
+- compatible = "renesas,sh-mmcif";
++ compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
+@@ -239,7 +239,7 @@
+ };
+
+ mmcif1: mmc@ee220000 {
+- compatible = "renesas,sh-mmcif";
++ compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
+ reg = <0 0xee220000 0 0x80>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
+--
+1.8.5.rc3
+
--- /dev/null
+From 11a0ac4193fbba5637340bc7210ccf83b7aff6b0 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 09:07:40 +0900
+Subject: ARM: shmobile: Use r8a7790 suffix for IRQC compat string
+
+Add "renesas,irqc-r8a7790" to the compatible string for IRQC
+in case of r8a7790. This makes the IRQC follow the same style
+as the other devices and also makes it more future proof.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 220fc352163de3b93e13d5a2e27d9eefd47bae84)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index cfb0f8b70e53..68b7b87e535f 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -178,7 +178,7 @@
+ };
+
+ irqc0: interrupt-controller@e61c0000 {
+- compatible = "renesas,irqc";
++ compatible = "renesas,irqc-r8a7790", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+--
+1.8.5.rc3
+
--- /dev/null
+From 3290e152d573d0361cfcb155b9393b8a63244251 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 19 Nov 2013 13:59:49 +0100
+Subject: ARM: shmobile: armadillo-reference: Use low level IRQ for ST1231
+
+The device is configured to generate an active-low interrupt signal that
+needs to be acknowledged by the host. Configure the IRQ to trigger on
+low level.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b69e4435e34df68d54e204b37d6bb256606fef5d)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+index aef425faf731..7b80f19129e3 100644
+--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
++++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+@@ -95,7 +95,7 @@
+ compatible = "sitronix,st1232";
+ reg = <0x55>;
+ interrupt-parent = <&irqpin1>;
+- interrupts = <2 IRQ_TYPE_NONE>; /* IRQ10: hwirq 2 on irqpin1 */
++ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&st1232_pins>;
+ pinctrl-names = "default";
+ gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
+--
+1.8.5.rc3
+
--- /dev/null
+From 272cde8ee61da7395e1c1800b60ad54156cda1a3 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 14 Nov 2013 08:03:45 +0900
+Subject: ARM: shmobile: Enable DSW2 with gpio-keys on KZM9D
+
+Use the gpio-keys driver to support the 4 pins on the
+dip switch DSW2 which is mounted on the KZM9D board.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit cef20af093fc018009ed7f7fde38f9fb8b445e6b)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/emev2-kzm9d.dts | 39 ++++++++++++++++++++++++++++++++++++++-
+ arch/arm/boot/dts/emev2.dtsi | 2 +-
+ 2 files changed, 39 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts
+index 861aa7d6fc7d..baaa66cc39bf 100644
+--- a/arch/arm/boot/dts/emev2-kzm9d.dts
++++ b/arch/arm/boot/dts/emev2-kzm9d.dts
+@@ -9,7 +9,9 @@
+ */
+ /dts-v1/;
+
+-/include/ "emev2.dtsi"
++#include "emev2.dtsi"
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
+
+ / {
+ model = "EMEV2 KZM9D Board";
+@@ -54,4 +56,39 @@
+ vddvario-supply = <®_1p8v>;
+ vdd33a-supply = <®_3p3v>;
+ };
++
++ gpio_keys {
++ compatible = "gpio-keys";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ button@1 {
++ debounce_interval = <50>;
++ wakeup = <1>;
++ label = "DSW2-1";
++ linux,code = <KEY_1>;
++ gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
++ };
++ button@2 {
++ debounce_interval = <50>;
++ wakeup = <1>;
++ label = "DSW2-2";
++ linux,code = <KEY_2>;
++ gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
++ };
++ button@3 {
++ debounce_interval = <50>;
++ wakeup = <1>;
++ label = "DSW2-3";
++ linux,code = <KEY_3>;
++ gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
++ };
++ button@4 {
++ debounce_interval = <50>;
++ wakeup = <1>;
++ label = "DSW2-4";
++ linux,code = <KEY_4>;
++ gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
++ };
++ };
+ };
+diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
+index df1d4cd3917d..256c2f8b9d0a 100644
+--- a/arch/arm/boot/dts/emev2.dtsi
++++ b/arch/arm/boot/dts/emev2.dtsi
+@@ -8,7 +8,7 @@
+ * kind, whether express or implied.
+ */
+
+-/include/ "skeleton.dtsi"
++#include "skeleton.dtsi"
+
+ / {
+ compatible = "renesas,emev2";
+--
+1.8.5.rc3
+
--- /dev/null
+From 921569d8779cc3dbf68d2a4e885303e6085537d7 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 21 Nov 2013 09:44:04 +0900
+Subject: ARM: shmobile: Koelsch DT reference GPIO LED support
+
+Add led6, led7 and led8 to the Koelsch DT reference board support.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 614a198d45e523f6066f1c22b9c10e4067f2c44a)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch-reference.dts | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
+index 8e7e917d66b6..19192731c24a 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
+@@ -11,6 +11,7 @@
+
+ /dts-v1/;
+ #include "r8a7791.dtsi"
++#include <dt-bindings/gpio/gpio.h>
+
+ / {
+ model = "Koelsch";
+@@ -29,6 +30,19 @@
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
++
++ leds {
++ compatible = "gpio-leds";
++ led6 {
++ gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
++ };
++ led7 {
++ gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
++ };
++ led8 {
++ gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
++ };
++ };
+ };
+
+ &pfc {
+--
+1.8.5.rc3
+
--- /dev/null
+From 2419b91fe5ae293fe81132f3b3955174a4726008 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 26 Nov 2013 02:21:18 +0100
+Subject: ARM: shmobile: kzm9g-reference: Add PCF8575 GPIO extender to DT
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a40d9ad3dd8dbb5d44843156157d83c4172e11f9)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+index 12fdfaaf5e7b..d58877def6d6 100644
+--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
++++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+@@ -186,6 +186,17 @@
+ pinctrl-0 = <&i2c3_pins>;
+ pinctrl-names = "default";
+ status = "okay";
++
++ pcf8575: gpio@20 {
++ compatible = "nxp,pcf8575";
++ reg = <0x20>;
++ interrupt-parent = <&irqpin2>;
++ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ #interrupt-cells = <2>;
++ };
+ };
+
+ &mmcif {
+--
+1.8.5.rc3
+
--- /dev/null
+From b6d1ababf270a20b623547f7f9700a684784de5a Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 26 Nov 2013 02:21:19 +0100
+Subject: ARM: shmobile: kzm9g-reference: Add GPIO keys to DT
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5ec5f73463611514fe46b2167e471b17626007f9)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 46 ++++++++++++++++++++++++++++
+ 1 file changed, 46 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+index d58877def6d6..5bb593daab52 100644
+--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
++++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+@@ -106,6 +106,52 @@
+ gpios = <&pfc 23 GPIO_ACTIVE_LOW>;
+ };
+ };
++
++ gpio-keys {
++ compatible = "gpio-keys";
++
++ back-key {
++ gpios = <&pcf8575 8 GPIO_ACTIVE_LOW>;
++ linux,code = <158>;
++ label = "SW3";
++ };
++
++ right-key {
++ gpios = <&pcf8575 9 GPIO_ACTIVE_LOW>;
++ linux,code = <106>;
++ label = "SW2-R";
++ };
++
++ left-key {
++ gpios = <&pcf8575 10 GPIO_ACTIVE_LOW>;
++ linux,code = <105>;
++ label = "SW2-L";
++ };
++
++ enter-key {
++ gpios = <&pcf8575 11 GPIO_ACTIVE_LOW>;
++ linux,code = <28>;
++ label = "SW2-P";
++ };
++
++ up-key {
++ gpios = <&pcf8575 12 GPIO_ACTIVE_LOW>;
++ linux,code = <103>;
++ label = "SW2-U";
++ };
++
++ down-key {
++ gpios = <&pcf8575 13 GPIO_ACTIVE_LOW>;
++ linux,code = <108>;
++ label = "SW2-D";
++ };
++
++ home-key {
++ gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>;
++ linux,code = <102>;
++ label = "SW1";
++ };
++ };
+ };
+
+ &i2c0 {
+--
+1.8.5.rc3
+
--- /dev/null
+From b93563f618fa65a505e27c6cc870fd133c10264f Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 31 Oct 2013 12:18:41 +0900
+Subject: ARM: shmobile: Include all 2 GiB of memory on APE6EVM DT Ref
+
+Add 1GiB of DRAM at 0x2_0000_0000 to support the full 2GiB
+of APE6EVM system memory also in case of DT reference.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9701f442139bd21c4db5b6354611b3d793431a95)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
+index 338f0cbfff7a..70b1fff8f4a3 100644
+--- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
++++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
+@@ -25,6 +25,11 @@
+ reg = <0 0x40000000 0 0x40000000>;
+ };
+
++ memory@200000000 {
++ device_type = "memory";
++ reg = <2 0x00000000 0 0x40000000>;
++ };
++
+ vcc_mmc0: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "MMC0 Vcc";
+--
+1.8.5.rc3
+
--- /dev/null
+From 45aaff16fa0f12f531f778b9d636d43621de75b4 Mon Sep 17 00:00:00 2001
+From: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
+Date: Thu, 31 Oct 2013 12:15:49 +0900
+Subject: ARM: shmobile: Include all 2 GiB of memory on APE6EVM
+
+Add 1GiB of DRAM at 0x2_0000_0000 to support the full 2GiB
+of APE6EVM system memory.
+
+Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8353f09f579631d095292bd838114833dbe1298f)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a73a4-ape6evm.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
+index e84d1a7db66e..ce085fa444a1 100644
+--- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
++++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
+@@ -25,6 +25,11 @@
+ reg = <0 0x40000000 0 0x40000000>;
+ };
+
++ memory@200000000 {
++ device_type = "memory";
++ reg = <2 0x00000000 0 0x40000000>;
++ };
++
+ ape6evm_fixed_3v3: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+--
+1.8.5.rc3
+
--- /dev/null
+From 51e3ce669a5f0d5ccf982c8239cfff2ca43ac124 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 31 Oct 2013 12:21:41 +0900
+Subject: ARM: shmobile: Include all 4 GiB of memory on Lager
+
+Add 2GiB of DRAM at 0x1_8000_0000 to support the full 4GiB
+of Lager system memory.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 62bc32a2573c421926a292e13b71ad9cc3ebf6e4)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
+index 8799dfb0068e..10e6a08164e5 100644
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -24,6 +24,11 @@
+ reg = <0 0x40000000 0 0x80000000>;
+ };
+
++ memory@180000000 {
++ device_type = "memory";
++ reg = <1 0x80000000 0 0x80000000>;
++ };
++
+ lbsc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+--
+1.8.5.rc3
+
--- /dev/null
+From feac3f7777f4be323233df1135dad0d48f17c5c5 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 31 Oct 2013 12:24:36 +0900
+Subject: ARM: shmobile: Include all 4 GiB of memory on Lager DT Ref
+
+Add 2GiB of DRAM at 0x1_8000_0000 to support the full 4GiB
+of Lager system memory in case of DT Reference.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit fb8d2ee32e899e53de76b66da5cc3c7149d4fc04)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager-reference.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
+index cce7dbfc1954..dfedc0ea82e1 100644
+--- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
++++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
+@@ -25,6 +25,11 @@
+ reg = <0 0x40000000 0 0x80000000>;
+ };
+
++ memory@180000000 {
++ device_type = "memory";
++ reg = <1 0x80000000 0 0x80000000>;
++ };
++
+ lbsc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+--
+1.8.5.rc3
+
--- /dev/null
+From 0466a6b612d7ff3666b23c9785075b37ec940f7b Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 21 Nov 2013 14:22:00 +0900
+Subject: ARM: shmobile: Fix r8a7791 GPIO resources in DTS
+
+The r8a7791 GPIO resources are currently incorrect. Fix that
+by making them match the English r8a7791 v0.31 data sheet.
+
+Tested with GPIO LED using Koelsch DT reference.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms@verge.net.au>
+(cherry picked from commit 89fbba1210a171f134b72c4d3ccf376265c6ff3f)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 32 ++++++++++++++++----------------
+ 1 file changed, 16 insertions(+), 16 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index e36b3652b7c2..a349aff54c76 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -49,9 +49,9 @@
+ interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+- gpio0: gpio@ffc40000 {
++ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+- reg = <0 0xffc40000 0 0x50>;
++ reg = <0 0xe6050000 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -61,9 +61,9 @@
+ interrupt-controller;
+ };
+
+- gpio1: gpio@ffc41000 {
++ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+- reg = <0 0xffc41000 0 0x50>;
++ reg = <0 0xe6051000 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -73,9 +73,9 @@
+ interrupt-controller;
+ };
+
+- gpio2: gpio@ffc42000 {
++ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+- reg = <0 0xffc42000 0 0x50>;
++ reg = <0 0xe6052000 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -85,9 +85,9 @@
+ interrupt-controller;
+ };
+
+- gpio3: gpio@ffc43000 {
++ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+- reg = <0 0xffc43000 0 0x50>;
++ reg = <0 0xe6053000 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -97,9 +97,9 @@
+ interrupt-controller;
+ };
+
+- gpio4: gpio@ffc44000 {
++ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+- reg = <0 0xffc44000 0 0x50>;
++ reg = <0 0xe6054000 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -109,9 +109,9 @@
+ interrupt-controller;
+ };
+
+- gpio5: gpio@ffc45000 {
++ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+- reg = <0 0xffc45000 0 0x50>;
++ reg = <0 0xe6055000 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -121,9 +121,9 @@
+ interrupt-controller;
+ };
+
+- gpio6: gpio@ffc45400 {
++ gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+- reg = <0 0xffc45400 0 0x50>;
++ reg = <0 0xe6055400 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+@@ -133,9 +133,9 @@
+ interrupt-controller;
+ };
+
+- gpio7: gpio@ffc45800 {
++ gpio7: gpio@e6055800 {
+ compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
+- reg = <0 0xffc45800 0 0x50>;
++ reg = <0 0xe6055800 0 0x50>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+--
+1.8.5.rc3
+
--- /dev/null
+From ca1cccc4e6fee99c755f91949381369e32a69796 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 28 Nov 2013 17:22:13 +0100
+Subject: ARM: shmobile: Use interrupt macros in r8a73a4 and r8a7778 DT files
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d6dd1313f74e2035e77c36686e7348a1bcd1c102)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a73a4.dtsi | 50 +++++++++++++++++++++---------------------
+ arch/arm/boot/dts/r8a7778.dtsi | 6 ++---
+ 2 files changed, 28 insertions(+), 28 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
+index b4a6c3b43ee9..6b7ce89a68f7 100644
+--- a/arch/arm/boot/dts/r8a73a4.dtsi
++++ b/arch/arm/boot/dts/r8a73a4.dtsi
+@@ -137,27 +137,27 @@
+ compatible = "renesas,shdma-r8a73a4";
+ reg = <0 0xe6700020 0 0x89e0>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 220 4
+- 0 200 4
+- 0 201 4
+- 0 202 4
+- 0 203 4
+- 0 204 4
+- 0 205 4
+- 0 206 4
+- 0 207 4
+- 0 208 4
+- 0 209 4
+- 0 210 4
+- 0 211 4
+- 0 212 4
+- 0 213 4
+- 0 214 4
+- 0 215 4
+- 0 216 4
+- 0 217 4
+- 0 218 4
+- 0 219 4>;
++ interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
++ 0 200 IRQ_TYPE_LEVEL_HIGH
++ 0 201 IRQ_TYPE_LEVEL_HIGH
++ 0 202 IRQ_TYPE_LEVEL_HIGH
++ 0 203 IRQ_TYPE_LEVEL_HIGH
++ 0 204 IRQ_TYPE_LEVEL_HIGH
++ 0 205 IRQ_TYPE_LEVEL_HIGH
++ 0 206 IRQ_TYPE_LEVEL_HIGH
++ 0 207 IRQ_TYPE_LEVEL_HIGH
++ 0 208 IRQ_TYPE_LEVEL_HIGH
++ 0 209 IRQ_TYPE_LEVEL_HIGH
++ 0 210 IRQ_TYPE_LEVEL_HIGH
++ 0 211 IRQ_TYPE_LEVEL_HIGH
++ 0 212 IRQ_TYPE_LEVEL_HIGH
++ 0 213 IRQ_TYPE_LEVEL_HIGH
++ 0 214 IRQ_TYPE_LEVEL_HIGH
++ 0 215 IRQ_TYPE_LEVEL_HIGH
++ 0 216 IRQ_TYPE_LEVEL_HIGH
++ 0 217 IRQ_TYPE_LEVEL_HIGH
++ 0 218 IRQ_TYPE_LEVEL_HIGH
++ 0 219 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+@@ -181,7 +181,7 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x428>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 174 0x4>;
++ interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -191,7 +191,7 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x428>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 175 0x4>;
++ interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -201,7 +201,7 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6520000 0 0x428>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 176 0x4>;
++ interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -211,7 +211,7 @@
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6530000 0 0x428>;
+ interrupt-parent = <&gic>;
+- interrupts = <0 177 0x4>;
++ interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index 3314e0aeccf5..b530df63af2b 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -247,7 +247,7 @@
+ compatible = "renesas,hspi";
+ reg = <0xfffc7000 0x18>;
+ interrupt-controller = <&gic>;
+- interrupts = <0 63 4>;
++ interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -255,7 +255,7 @@
+ compatible = "renesas,hspi";
+ reg = <0xfffc8000 0x18>;
+ interrupt-controller = <&gic>;
+- interrupts = <0 84 4>;
++ interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+@@ -263,7 +263,7 @@
+ compatible = "renesas,hspi";
+ reg = <0xfffc6000 0x18>;
+ interrupt-controller = <&gic>;
+- interrupts = <0 85 4>;
++ interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 5dd3180edf39539eb72d822a4e7bc8de1f55b30a Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 28 Nov 2013 17:37:50 +0100
+Subject: ARM: shmobile: emev2: Use interrupt macros in DT files
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3dc76086fa0a8def96f331785cceb6e84e3c34de)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/emev2-kzm9d.dts | 3 ++-
+ arch/arm/boot/dts/emev2.dtsi | 30 ++++++++++++++++++------------
+ 2 files changed, 20 insertions(+), 13 deletions(-)
+
+diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts
+index baaa66cc39bf..50ccd151091e 100644
+--- a/arch/arm/boot/dts/emev2-kzm9d.dts
++++ b/arch/arm/boot/dts/emev2-kzm9d.dts
+@@ -12,6 +12,7 @@
+ #include "emev2.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/input/input.h>
++#include <dt-bindings/interrupt-controller/irq.h>
+
+ / {
+ model = "EMEV2 KZM9D Board";
+@@ -49,7 +50,7 @@
+ reg = <0x20000000 0x10000>;
+ phy-mode = "mii";
+ interrupt-parent = <&gpio0>;
+- interrupts = <1 1>; /* active high */
++ interrupts = <1 IRQ_TYPE_EDGE_RISING>;
+ reg-io-width = <4>;
+ smsc,irq-active-high;
+ smsc,irq-push-pull;
+diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
+index 256c2f8b9d0a..8467e4caf3b7 100644
+--- a/arch/arm/boot/dts/emev2.dtsi
++++ b/arch/arm/boot/dts/emev2.dtsi
+@@ -9,6 +9,7 @@
+ */
+
+ #include "skeleton.dtsi"
++#include <dt-bindings/interrupt-controller/irq.h>
+
+ / {
+ compatible = "renesas,emev2";
+@@ -48,8 +49,8 @@
+
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+- interrupts = <0 120 4>,
+- <0 121 4>;
++ interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>,
++ <0 121 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ smu@e0110000 {
+@@ -129,7 +130,7 @@
+ sti@e0180000 {
+ compatible = "renesas,em-sti";
+ reg = <0xe0180000 0x54>;
+- interrupts = <0 125 0>;
++ interrupts = <0 125 IRQ_TYPE_NONE>;
+ clocks = <&sti_sclk>;
+ clock-names = "sclk";
+ };
+@@ -137,7 +138,7 @@
+ uart@e1020000 {
+ compatible = "renesas,em-uart";
+ reg = <0xe1020000 0x38>;
+- interrupts = <0 8 0>;
++ interrupts = <0 8 IRQ_TYPE_NONE>;
+ clocks = <&usia_u0_sclk>;
+ clock-names = "sclk";
+ };
+@@ -145,7 +146,7 @@
+ uart@e1030000 {
+ compatible = "renesas,em-uart";
+ reg = <0xe1030000 0x38>;
+- interrupts = <0 9 0>;
++ interrupts = <0 9 IRQ_TYPE_NONE>;
+ clocks = <&usib_u1_sclk>;
+ clock-names = "sclk";
+ };
+@@ -153,7 +154,7 @@
+ uart@e1040000 {
+ compatible = "renesas,em-uart";
+ reg = <0xe1040000 0x38>;
+- interrupts = <0 10 0>;
++ interrupts = <0 10 IRQ_TYPE_NONE>;
+ clocks = <&usib_u2_sclk>;
+ clock-names = "sclk";
+ };
+@@ -161,7 +162,7 @@
+ uart@e1050000 {
+ compatible = "renesas,em-uart";
+ reg = <0xe1050000 0x38>;
+- interrupts = <0 11 0>;
++ interrupts = <0 11 IRQ_TYPE_NONE>;
+ clocks = <&usib_u3_sclk>;
+ clock-names = "sclk";
+ };
+@@ -169,7 +170,8 @@
+ gpio0: gpio@e0050000 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
+- interrupts = <0 67 0>, <0 68 0>;
++ interrupts = <0 67 IRQ_TYPE_NONE>,
++ <0 68 IRQ_TYPE_NONE>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+@@ -179,7 +181,8 @@
+ gpio1: gpio@e0050080 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
+- interrupts = <0 69 0>, <0 70 0>;
++ interrupts = <0 69 IRQ_TYPE_NONE>,
++ <0 70 IRQ_TYPE_NONE>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+@@ -189,7 +192,8 @@
+ gpio2: gpio@e0050100 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
+- interrupts = <0 71 0>, <0 72 0>;
++ interrupts = <0 71 IRQ_TYPE_NONE>,
++ <0 72 IRQ_TYPE_NONE>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+@@ -199,7 +203,8 @@
+ gpio3: gpio@e0050180 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
+- interrupts = <0 73 0>, <0 74 0>;
++ interrupts = <0 73 IRQ_TYPE_NONE>,
++ <0 74 IRQ_TYPE_NONE>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+@@ -209,7 +214,8 @@
+ gpio4: gpio@e0050200 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
+- interrupts = <0 75 0>, <0 76 0>;
++ interrupts = <0 75 IRQ_TYPE_NONE>,
++ <0 76 IRQ_TYPE_NONE>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <31>;
+--
+1.8.5.rc3
+
--- /dev/null
+From 7b14bb56563bc77b5e44b503425a8d95c55d20d9 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 28 Nov 2013 17:37:51 +0100
+Subject: ARM: shmobile: emev2: Setup internal peripheral interrupts as level
+ high
+
+Interrupts generated by SoC internal devices are currently marked as
+IRQ_TYPE_NONE. As they're level-triggered and active-high, mark them as
+such.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e05ab0bb14723d419b43341d413e4418000f58f9)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/emev2.dtsi | 30 +++++++++++++++---------------
+ 1 file changed, 15 insertions(+), 15 deletions(-)
+
+diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
+index 8467e4caf3b7..e37985fa10e2 100644
+--- a/arch/arm/boot/dts/emev2.dtsi
++++ b/arch/arm/boot/dts/emev2.dtsi
+@@ -130,7 +130,7 @@
+ sti@e0180000 {
+ compatible = "renesas,em-sti";
+ reg = <0xe0180000 0x54>;
+- interrupts = <0 125 IRQ_TYPE_NONE>;
++ interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sti_sclk>;
+ clock-names = "sclk";
+ };
+@@ -138,7 +138,7 @@
+ uart@e1020000 {
+ compatible = "renesas,em-uart";
+ reg = <0xe1020000 0x38>;
+- interrupts = <0 8 IRQ_TYPE_NONE>;
++ interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&usia_u0_sclk>;
+ clock-names = "sclk";
+ };
+@@ -146,7 +146,7 @@
+ uart@e1030000 {
+ compatible = "renesas,em-uart";
+ reg = <0xe1030000 0x38>;
+- interrupts = <0 9 IRQ_TYPE_NONE>;
++ interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&usib_u1_sclk>;
+ clock-names = "sclk";
+ };
+@@ -154,7 +154,7 @@
+ uart@e1040000 {
+ compatible = "renesas,em-uart";
+ reg = <0xe1040000 0x38>;
+- interrupts = <0 10 IRQ_TYPE_NONE>;
++ interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&usib_u2_sclk>;
+ clock-names = "sclk";
+ };
+@@ -162,7 +162,7 @@
+ uart@e1050000 {
+ compatible = "renesas,em-uart";
+ reg = <0xe1050000 0x38>;
+- interrupts = <0 11 IRQ_TYPE_NONE>;
++ interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&usib_u3_sclk>;
+ clock-names = "sclk";
+ };
+@@ -170,8 +170,8 @@
+ gpio0: gpio@e0050000 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
+- interrupts = <0 67 IRQ_TYPE_NONE>,
+- <0 68 IRQ_TYPE_NONE>;
++ interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>,
++ <0 68 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+@@ -181,8 +181,8 @@
+ gpio1: gpio@e0050080 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
+- interrupts = <0 69 IRQ_TYPE_NONE>,
+- <0 70 IRQ_TYPE_NONE>;
++ interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>,
++ <0 70 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+@@ -192,8 +192,8 @@
+ gpio2: gpio@e0050100 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
+- interrupts = <0 71 IRQ_TYPE_NONE>,
+- <0 72 IRQ_TYPE_NONE>;
++ interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>,
++ <0 72 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+@@ -203,8 +203,8 @@
+ gpio3: gpio@e0050180 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
+- interrupts = <0 73 IRQ_TYPE_NONE>,
+- <0 74 IRQ_TYPE_NONE>;
++ interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>,
++ <0 74 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+@@ -214,8 +214,8 @@
+ gpio4: gpio@e0050200 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
+- interrupts = <0 75 IRQ_TYPE_NONE>,
+- <0 76 IRQ_TYPE_NONE>;
++ interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>,
++ <0 76 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <31>;
+--
+1.8.5.rc3
+
--- /dev/null
+From 4fd0cfa727a9399d60c029a10eaa87123ebdbffe Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 3 Dec 2013 17:28:41 -0800
+Subject: ARM: shmobile: r8a7740: add FSI support via DTSI
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit efcd869b7c5ef0cff5887842afe2c184e509807a)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740.dtsi | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
+index b1c2ed961eed..52255bf1e867 100644
+--- a/arch/arm/boot/dts/r8a7740.dtsi
++++ b/arch/arm/boot/dts/r8a7740.dtsi
+@@ -208,4 +208,13 @@
+ cap-sdio-irq;
+ status = "disabled";
+ };
++
++ sh_fsi2: sound@fe1f0000 {
++ #sound-dai-cells = <1>;
++ compatible = "renesas,sh_fsi2";
++ reg = <0xfe1f0000 0x400>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 9 0x4>;
++ status = "disabled";
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 1c0fdfbed5d0953704c58987e3fb4ac2aaa89d26 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 3 Dec 2013 17:28:59 -0800
+Subject: ARM: shmobile: armadillo: add FSI support for DTS
+
+This patch support FSI-WM8978 with simple audio card
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6a3549d464bf8dc05ab87eab0f3ed2da0dbc5379)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ .../boot/dts/r8a7740-armadillo800eva-reference.dts | 37 ++++++++++++++++++++++
+ 1 file changed, 37 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+index 7b80f19129e3..6d6fd3dff2d3 100644
+--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
++++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+@@ -87,6 +87,24 @@
+ pinctrl-0 = <&backlight_pins>;
+ pinctrl-names = "default";
+ };
++
++ sound {
++ compatible = "simple-audio-card";
++
++ simple-audio-card,format = "i2s";
++
++ simple-audio-card,cpu {
++ sound-dai = <&sh_fsi2 0>;
++ bitclock-inversion;
++ };
++
++ simple-audio-card,codec {
++ sound-dai = <&wm8978>;
++ bitclock-master;
++ frame-master;
++ system-clock-frequency = <12288000>;
++ };
++ };
+ };
+
+ &i2c0 {
+@@ -100,6 +118,12 @@
+ pinctrl-names = "default";
+ gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
+ };
++
++ wm8978: wm8978@1a {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8978";
++ reg = <0x1a>;
++ };
+ };
+
+ &pfc {
+@@ -130,6 +154,12 @@
+ renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp";
+ renesas,function = "sdhi0";
+ };
++
++ fsia_pins: sounda {
++ renesas,groups = "fsia_sclk_in", "fsia_mclk_out",
++ "fsia_data_in_1", "fsia_data_out_0";
++ renesas,function = "fsia";
++ };
+ };
+
+ &tpu {
+@@ -156,3 +186,10 @@
+ cd-gpios = <&pfc 167 GPIO_ACTIVE_LOW>;
+ status = "okay";
+ };
++
++&sh_fsi2 {
++ pinctrl-0 = <&fsia_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
+--
+1.8.5.rc3
+
--- /dev/null
+From 8209ec050377c686d397c884f0dc6b8efbb7c926 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 28 Nov 2013 08:14:57 +0900
+Subject: ARM: shmobile: Use sh73a0 suffix for INTC compat string
+
+Add "renesas,intc-irqpin-sh73a0" to the compatible string for the
+IRQ pins in case of sh73a0 INTC. This makes the INTC irqpin follow
+the same style as the other devices and also makes it more future proof.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8bb44445b08d1068a0ca5f72159d8e373f810155)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/sh73a0.dtsi | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
+index 29d2ee6e36c6..241c8cdaeaa1 100644
+--- a/arch/arm/boot/dts/sh73a0.dtsi
++++ b/arch/arm/boot/dts/sh73a0.dtsi
+@@ -47,7 +47,7 @@
+ };
+
+ irqpin0: irqpin@e6900000 {
+- compatible = "renesas,intc-irqpin";
++ compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xe6900000 4>,
+@@ -67,7 +67,7 @@
+ };
+
+ irqpin1: irqpin@e6900004 {
+- compatible = "renesas,intc-irqpin";
++ compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xe6900004 4>,
+@@ -88,7 +88,7 @@
+ };
+
+ irqpin2: irqpin@e6900008 {
+- compatible = "renesas,intc-irqpin";
++ compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xe6900008 4>,
+@@ -108,7 +108,7 @@
+ };
+
+ irqpin3: irqpin@e690000c {
+- compatible = "renesas,intc-irqpin";
++ compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xe690000c 4>,
+--
+1.8.5.rc3
+
--- /dev/null
+From f8ed394e9078e30588639bb79d17be03e98a95e2 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 28 Nov 2013 08:15:04 +0900
+Subject: ARM: shmobile: Use r8a7740 suffix for INTC compat string
+
+Add "renesas,intc-irqpin-r8a7740" to the compatible string for the
+IRQ pins in case of r8a7740 INTC. This makes the INTC irqpin follow
+the same style as the other devices and also makes it more future proof.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 96327999805dfb5b6e91e6969311d9a77a0160cd)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740.dtsi | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
+index 52255bf1e867..2782f642acfc 100644
+--- a/arch/arm/boot/dts/r8a7740.dtsi
++++ b/arch/arm/boot/dts/r8a7740.dtsi
+@@ -41,7 +41,7 @@
+
+ /* irqpin0: IRQ0 - IRQ7 */
+ irqpin0: irqpin@e6900000 {
+- compatible = "renesas,intc-irqpin";
++ compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xe6900000 4>,
+@@ -62,7 +62,7 @@
+
+ /* irqpin1: IRQ8 - IRQ15 */
+ irqpin1: irqpin@e6900004 {
+- compatible = "renesas,intc-irqpin";
++ compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xe6900004 4>,
+@@ -83,7 +83,7 @@
+
+ /* irqpin2: IRQ16 - IRQ23 */
+ irqpin2: irqpin@e6900008 {
+- compatible = "renesas,intc-irqpin";
++ compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xe6900008 4>,
+@@ -104,7 +104,7 @@
+
+ /* irqpin3: IRQ24 - IRQ31 */
+ irqpin3: irqpin@e690000c {
+- compatible = "renesas,intc-irqpin";
++ compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xe690000c 4>,
+--
+1.8.5.rc3
+
--- /dev/null
+From 57eaf32eb4448257c4bfc38e34a9c813cb18e04d Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 28 Nov 2013 08:15:11 +0900
+Subject: ARM: shmobile: Use r8a7778 suffix for INTC compat string
+
+Add "renesas,intc-irqpin-r8a7778" to the compatible string for the
+IRQ pins in case of r8a7778 INTC. This makes the INTC irqpin follow
+the same style as the other devices and also makes it more future proof.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d79af224b7a7d4d24c1170960eefb48ccb328eff)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index b530df63af2b..ddb3bd7a8838 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -43,7 +43,7 @@
+
+ /* irqpin: IRQ0 - IRQ3 */
+ irqpin: irqpin@fe78001c {
+- compatible = "renesas,intc-irqpin";
++ compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ status = "disabled"; /* default off */
+--
+1.8.5.rc3
+
--- /dev/null
+From 071ee697a0891cf75ede44f8bc02c7c89d99cb14 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 28 Nov 2013 08:15:18 +0900
+Subject: ARM: shmobile: Use r8a7779 suffix for INTC compat string
+
+Add "renesas,intc-irqpin-r8a7779" to the compatible string for the
+IRQ pins in case of r8a7779 INTC. This makes the INTC irqpin follow
+the same style as the other devices and also makes it more future proof.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 11ef0340a8cdf9db9a5c49298f361258d090fefb)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
+index b2b418a8ab2d..8284715feec2 100644
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -135,7 +135,7 @@
+ };
+
+ irqpin0: irqpin@fe780010 {
+- compatible = "renesas,intc-irqpin";
++ compatible = "renesas,intc-irqpin-r8a7779", "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ status = "disabled";
+ interrupt-controller;
+--
+1.8.5.rc3
+
--- /dev/null
+From 08e6264161aa61d2167febe2e0eefac24f276e6c Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 26 Nov 2013 16:47:11 +0900
+Subject: ARM: shmobile: r8a7779: add HSPI support to DTSI
+
+Based on work for the r8a7778 SoC by Kuninori Morimoto.
+
+Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3c3f6ad350bbeccaba5ab54a267900dcc76b9dd2)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779.dtsi | 30 ++++++++++++++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
+index 8284715feec2..d0561d4c7c46 100644
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -42,6 +42,12 @@
+ };
+ };
+
++ aliases {
++ spi0 = &hspi0;
++ spi1 = &hspi1;
++ spi2 = &hspi2;
++ };
++
+ gic: interrupt-controller@f0001000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+@@ -248,4 +254,28 @@
+ cap-sdio-irq;
+ status = "disabled";
+ };
++
++ hspi0: spi@fffc7000 {
++ compatible = "renesas,hspi";
++ reg = <0xfffc7000 0x18>;
++ interrupt-controller = <&gic>;
++ interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
++ status = "disabled";
++ };
++
++ hspi1: spi@fffc8000 {
++ compatible = "renesas,hspi";
++ reg = <0xfffc8000 0x18>;
++ interrupt-controller = <&gic>;
++ interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
++ status = "disabled";
++ };
++
++ hspi2: spi@fffc6000 {
++ compatible = "renesas,hspi";
++ reg = <0xfffc6000 0x18>;
++ interrupt-controller = <&gic>;
++ interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
++ status = "disabled";
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 949bdaeb0aa89a2eb94d32e21a2c13fe0ed5c19b Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 26 Nov 2013 16:47:12 +0900
+Subject: ARM: shmobile: marzen: enable HSPI0 in DTS
+
+Based on work for the bockw board by Kuninori Morimoto.
+
+Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1fd219561a4afc51b5f257692f3581546434db5b)
+(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779-marzen-reference.dts | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+index 918085c375d9..76f5eef7d1cc 100644
+--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
++++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+@@ -97,6 +97,11 @@
+ renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
+ renesas,function = "sdhi0";
+ };
++
++ hspi0_pins: hspi0 {
++ renesas,groups = "hspi0";
++ renesas,function = "hspi0";
++ };
+ };
+
+ &sdhi0 {
+@@ -107,3 +112,9 @@
+ bus-width = <4>;
+ status = "okay";
+ };
++
++&hspi0 {
++ pinctrl-0 = <&hspi0_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++};
+--
+1.8.5.rc3
+
--- /dev/null
+From 283627bc5dfbf2f63aa5bd2008aced18b01c7a70 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:05:12 +0100
+Subject: ARM: shmobile: r8a7790: Add clock index macros for DT sources
+
+Add macros usable by device tree sources to reference r8a7790 clocks by
+index.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ac991dce6498b5fc6396c7ac6f6a27b5585ef0f3)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/dt-bindings/clock/r8a7790-clock.h | 100 ++++++++++++++++++++++++++++++
+ 1 file changed, 100 insertions(+)
+ create mode 100644 include/dt-bindings/clock/r8a7790-clock.h
+
+diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
+new file mode 100644
+index 000000000000..420f0b00ae1e
+--- /dev/null
++++ b/include/dt-bindings/clock/r8a7790-clock.h
+@@ -0,0 +1,100 @@
++/*
++ * Copyright 2013 Ideas On Board SPRL
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef __DT_BINDINGS_CLOCK_R8A7790_H__
++#define __DT_BINDINGS_CLOCK_R8A7790_H__
++
++/* CPG */
++#define R8A7790_CLK_MAIN 0
++#define R8A7790_CLK_PLL0 1
++#define R8A7790_CLK_PLL1 2
++#define R8A7790_CLK_PLL3 3
++#define R8A7790_CLK_LB 4
++#define R8A7790_CLK_QSPI 5
++#define R8A7790_CLK_SDH 6
++#define R8A7790_CLK_SD0 7
++#define R8A7790_CLK_SD1 8
++#define R8A7790_CLK_Z 9
++
++/* MSTP1 */
++#define R8A7790_CLK_TMU1 11
++#define R8A7790_CLK_TMU3 21
++#define R8A7790_CLK_TMU2 22
++#define R8A7790_CLK_CMT0 24
++#define R8A7790_CLK_TMU0 25
++#define R8A7790_CLK_VSP1_DU1 27
++#define R8A7790_CLK_VSP1_DU0 28
++#define R8A7790_CLK_VSP1_RT 30
++#define R8A7790_CLK_VSP1_SY 31
++
++/* MSTP2 */
++#define R8A7790_CLK_SCIFA2 2
++#define R8A7790_CLK_SCIFA1 3
++#define R8A7790_CLK_SCIFA0 4
++#define R8A7790_CLK_SCIFB0 6
++#define R8A7790_CLK_SCIFB1 7
++#define R8A7790_CLK_SCIFB2 16
++#define R8A7790_CLK_SYS_DMAC0 18
++#define R8A7790_CLK_SYS_DMAC1 19
++
++/* MSTP3 */
++#define R8A7790_CLK_TPU0 4
++#define R8A7790_CLK_MMCIF1 5
++#define R8A7790_CLK_SDHI3 11
++#define R8A7790_CLK_SDHI2 12
++#define R8A7790_CLK_SDHI1 13
++#define R8A7790_CLK_SDHI0 14
++#define R8A7790_CLK_MMCIF0 15
++#define R8A7790_CLK_SSUSB 28
++#define R8A7790_CLK_CMT1 29
++#define R8A7790_CLK_USBDMAC0 30
++#define R8A7790_CLK_USBDMAC1 31
++
++/* MSTP5 */
++#define R8A7790_CLK_THERMAL 22
++#define R8A7790_CLK_PWM 23
++
++/* MSTP7 */
++#define R8A7790_CLK_EHCI 3
++#define R8A7790_CLK_HSUSB 4
++#define R8A7790_CLK_HSCIF1 16
++#define R8A7790_CLK_HSCIF0 17
++#define R8A7790_CLK_SCIF1 20
++#define R8A7790_CLK_SCIF0 21
++#define R8A7790_CLK_DU2 22
++#define R8A7790_CLK_DU1 23
++#define R8A7790_CLK_DU0 24
++#define R8A7790_CLK_LVDS1 25
++#define R8A7790_CLK_LVDS0 26
++
++/* MSTP8 */
++#define R8A7790_CLK_VIN3 8
++#define R8A7790_CLK_VIN2 9
++#define R8A7790_CLK_VIN1 10
++#define R8A7790_CLK_VIN0 11
++#define R8A7790_CLK_ETHER 13
++#define R8A7790_CLK_SATA1 14
++#define R8A7790_CLK_SATA0 15
++
++/* MSTP9 */
++#define R8A7790_CLK_GPIO5 7
++#define R8A7790_CLK_GPIO4 8
++#define R8A7790_CLK_GPIO3 9
++#define R8A7790_CLK_GPIO2 10
++#define R8A7790_CLK_GPIO1 11
++#define R8A7790_CLK_GPIO0 12
++#define R8A7790_CLK_RCAN1 15
++#define R8A7790_CLK_RCAN0 16
++#define R8A7790_CLK_IICDVFS 26
++#define R8A7790_CLK_I2C3 28
++#define R8A7790_CLK_I2C2 29
++#define R8A7790_CLK_I2C1 30
++#define R8A7790_CLK_I2C0 31
++
++#endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */
+--
+1.8.5.rc3
+
--- /dev/null
+From 1c628edcbcaab6eea3427750e98060b5942f854c Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:05:13 +0100
+Subject: ARM: shmobile: r8a7791: Add clock index macros for DT sources
+
+Add macros usable by device tree sources to reference r8a7791 clocks by
+index.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4d8864c9e94ec727f1c675b9f6921525c360334b)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/dt-bindings/clock/r8a7791-clock.h | 105 ++++++++++++++++++++++++++++++
+ 1 file changed, 105 insertions(+)
+ create mode 100644 include/dt-bindings/clock/r8a7791-clock.h
+
+diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
+new file mode 100644
+index 000000000000..df1715b77f96
+--- /dev/null
++++ b/include/dt-bindings/clock/r8a7791-clock.h
+@@ -0,0 +1,105 @@
++/*
++ * Copyright 2013 Ideas On Board SPRL
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
++#define __DT_BINDINGS_CLOCK_R8A7791_H__
++
++/* CPG */
++#define R8A7791_CLK_MAIN 0
++#define R8A7791_CLK_PLL0 1
++#define R8A7791_CLK_PLL1 2
++#define R8A7791_CLK_PLL3 3
++#define R8A7791_CLK_LB 4
++#define R8A7791_CLK_QSPI 5
++#define R8A7791_CLK_SDH 6
++#define R8A7791_CLK_SD0 7
++#define R8A7791_CLK_Z 8
++
++/* MSTP1 */
++#define R8A7791_CLK_TMU1 11
++#define R8A7791_CLK_TMU3 21
++#define R8A7791_CLK_TMU2 22
++#define R8A7791_CLK_CMT0 24
++#define R8A7791_CLK_TMU0 25
++#define R8A7791_CLK_VSP1_DU1 27
++#define R8A7791_CLK_VSP1_DU0 28
++#define R8A7791_CLK_VSP1_SY 31
++
++/* MSTP2 */
++#define R8A7791_CLK_SCIFA2 2
++#define R8A7791_CLK_SCIFA1 3
++#define R8A7791_CLK_SCIFA0 4
++#define R8A7791_CLK_SCIFB0 6
++#define R8A7791_CLK_SCIFB1 7
++#define R8A7791_CLK_SCIFB2 16
++#define R8A7791_CLK_DMAC 18
++
++/* MSTP3 */
++#define R8A7791_CLK_TPU0 4
++#define R8A7791_CLK_SDHI2 11
++#define R8A7791_CLK_SDHI1 12
++#define R8A7791_CLK_SDHI0 14
++#define R8A7791_CLK_MMCIF0 15
++#define R8A7791_CLK_SSUSB 28
++#define R8A7791_CLK_CMT1 29
++#define R8A7791_CLK_USBDMAC0 30
++#define R8A7791_CLK_USBDMAC1 31
++
++/* MSTP5 */
++#define R8A7791_CLK_THERMAL 22
++#define R8A7791_CLK_PWM 23
++
++/* MSTP7 */
++#define R8A7791_CLK_HSUSB 4
++#define R8A7791_CLK_HSCIF2 13
++#define R8A7791_CLK_SCIF5 14
++#define R8A7791_CLK_SCIF4 15
++#define R8A7791_CLK_HSCIF1 16
++#define R8A7791_CLK_HSCIF0 17
++#define R8A7791_CLK_SCIF3 18
++#define R8A7791_CLK_SCIF2 19
++#define R8A7791_CLK_SCIF1 20
++#define R8A7791_CLK_SCIF0 21
++#define R8A7791_CLK_DU1 23
++#define R8A7791_CLK_DU0 24
++#define R8A7791_CLK_LVDS0 26
++
++/* MSTP8 */
++#define R8A7791_CLK_VIN2 9
++#define R8A7791_CLK_VIN1 10
++#define R8A7791_CLK_VIN0 11
++#define R8A7791_CLK_ETHER 13
++#define R8A7791_CLK_SATA1 14
++#define R8A7791_CLK_SATA0 15
++
++/* MSTP9 */
++#define R8A7791_CLK_GPIO7 4
++#define R8A7791_CLK_GPIO6 5
++#define R8A7791_CLK_GPIO5 7
++#define R8A7791_CLK_GPIO4 8
++#define R8A7791_CLK_GPIO3 9
++#define R8A7791_CLK_GPIO2 10
++#define R8A7791_CLK_GPIO1 11
++#define R8A7791_CLK_GPIO0 12
++#define R8A7791_CLK_RCAN1 15
++#define R8A7791_CLK_RCAN0 16
++#define R8A7791_CLK_I2C5 25
++#define R8A7791_CLK_IICDVFS 26
++#define R8A7791_CLK_I2C4 27
++#define R8A7791_CLK_I2C3 28
++#define R8A7791_CLK_I2C2 29
++#define R8A7791_CLK_I2C1 30
++#define R8A7791_CLK_I2C0 31
++
++/* MSTP11 */
++#define R8A7791_CLK_SCIFA3 6
++#define R8A7791_CLK_SCIFA4 7
++#define R8A7791_CLK_SCIFA5 8
++
++#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */
+--
+1.8.5.rc3
+
--- /dev/null
+From 6601129f29507f818a1288979c8e10796aac8ca3 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 20 Nov 2013 23:21:26 -0800
+Subject: ARM: shmobile: lager: add gpio regulator support on defconfig
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 081aaf4ab3ddaf66083b2fcd17b563a48112a232)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/lager_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/configs/lager_defconfig b/arch/arm/configs/lager_defconfig
+index 35dc8b2be47f..35b7cb769b25 100644
+--- a/arch/arm/configs/lager_defconfig
++++ b/arch/arm/configs/lager_defconfig
+@@ -89,6 +89,7 @@ CONFIG_THERMAL=y
+ CONFIG_RCAR_THERMAL=y
+ CONFIG_REGULATOR=y
+ CONFIG_REGULATOR_FIXED_VOLTAGE=y
++CONFIG_REGULATOR_GPIO=y
+ CONFIG_DRM=y
+ CONFIG_DRM_RCAR_DU=y
+ # CONFIG_USB_SUPPORT is not set
+--
+1.8.5.rc3
+
--- /dev/null
+From 6c7c6b57cddc3a8182e0e84329657cb49edb313a Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 25 Nov 2013 17:53:16 -0800
+Subject: ARM: shmobile: lager: fixup I2C device on defconfig
+
+R-Car H2 needs I2C_CAR, not I2C_SH_MOBILE
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d0523925902cf363fc7b217c9873517e98093e32)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/lager_defconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/configs/lager_defconfig b/arch/arm/configs/lager_defconfig
+index 35b7cb769b25..883443f8f4f3 100644
+--- a/arch/arm/configs/lager_defconfig
++++ b/arch/arm/configs/lager_defconfig
+@@ -80,7 +80,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
+ # CONFIG_HW_RANDOM is not set
+ CONFIG_I2C=y
+ CONFIG_I2C_GPIO=y
+-CONFIG_I2C_SH_MOBILE=y
++CONFIG_I2C_RCAR=y
+ CONFIG_GPIO_SH_PFC=y
+ CONFIG_GPIOLIB=y
+ CONFIG_GPIO_RCAR=y
+--
+1.8.5.rc3
+
--- /dev/null
+From bd2136c039b59a082a2481d81bc3dac0d6ce2ca5 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 9 Nov 2013 13:33:48 +0100
+Subject: ARM: shmobile: genmai: Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY
+
+The ARCH_SHMOBILE configuration option has been renamed to
+ARCH_SHMOBILE_LEGACY. Update the defconfig accordingly.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+[ horms+renesas@verge.net.au: Removed non-genmai changes which
+ have been squashed into "ARM: Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY". ]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit 7f558a124022630e177f08bbdd0673c3301f7e84)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/genmai_defconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/configs/genmai_defconfig b/arch/arm/configs/genmai_defconfig
+index 69b1531a4c80..aa0b704f48af 100644
+--- a/arch/arm/configs/genmai_defconfig
++++ b/arch/arm/configs/genmai_defconfig
+@@ -12,7 +12,7 @@ CONFIG_SLAB=y
+ # CONFIG_BLK_DEV_BSG is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+ # CONFIG_IOSCHED_CFQ is not set
+-CONFIG_ARCH_SHMOBILE=y
++CONFIG_ARCH_SHMOBILE_LEGACY=y
+ CONFIG_ARCH_R7S72100=y
+ CONFIG_MACH_GENMAI=y
+ # CONFIG_SH_TIMER_CMT is not set
+--
+1.8.5.rc3
+
--- /dev/null
+From b56c90dcfed496d22298daa0f41d6997549f9c0f Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 3 Oct 2013 18:30:55 -0700
+Subject: ARM: shmobile: bockw: use regulator for MMCIF
+
+When regulators are used with MMC devices, sh_mmcif_plat_data::ocr
+is not needed, they can be removed from platform data.
+This patch adds v3.3 regulator settings,
+and moved fixed-dummy regulator registration position
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 06ac2a61e1559e5986b1e2269d110d51576ab8d4)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-bockw.c | 13 +++++++++----
+ 1 file changed, 9 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
+index 38611526fe9a..540f0dc2431a 100644
+--- a/arch/arm/mach-shmobile/board-bockw.c
++++ b/arch/arm/mach-shmobile/board-bockw.c
+@@ -116,6 +116,11 @@ static struct regulator_consumer_supply dummy_supplies[] = {
+ REGULATOR_SUPPLY("vdd33a", "smsc911x"),
+ };
+
++static struct regulator_consumer_supply fixed3v3_power_consumers[] = {
++ REGULATOR_SUPPLY("vmmc", "sh_mmcif"),
++ REGULATOR_SUPPLY("vqmmc", "sh_mmcif"),
++};
++
+ static struct smsc911x_platform_config smsc911x_data __initdata = {
+ .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+ .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
+@@ -271,7 +276,6 @@ static struct resource mmc_resources[] __initdata = {
+
+ static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
+ .sup_pclk = 0,
+- .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
+ .caps = MMC_CAP_4_BIT_DATA |
+ MMC_CAP_8_BIT_DATA |
+ MMC_CAP_NEEDS_POLL,
+@@ -614,6 +618,10 @@ static void __init bockw_init(void)
+ &usb_phy_platform_data,
+ sizeof(struct rcar_phy_platform_data));
+
++ regulator_register_fixed(0, dummy_supplies,
++ ARRAY_SIZE(dummy_supplies));
++ regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
++ ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
+
+ /* for SMSC */
+ fpga = ioremap_nocache(FPGA, SZ_1M);
+@@ -629,9 +637,6 @@ static void __init bockw_init(void)
+ val &= ~(1 << 4); /* enable SMSC911x */
+ iowrite16(val, fpga + IRQ0MR);
+
+- regulator_register_fixed(0, dummy_supplies,
+- ARRAY_SIZE(dummy_supplies));
+-
+ platform_device_register_resndata(
+ &platform_bus, "smsc911x", -1,
+ smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
+--
+1.8.5.rc3
+
--- /dev/null
+From bebad825f18c41a97786ec9c857dcafbb11e093c Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 8 Oct 2013 12:39:49 +0900
+Subject: ARM: shmobile: Enable PFC/GPIO on the Koelsch board
+
+Enable r8a7791 PFC and GPIO on the Koelsch board.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1a534ecec7cdf90e2089bb0ab7a77a8ccea3c4dc)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
+index ace1711a6cd8..d099eaf49cf6 100644
+--- a/arch/arm/mach-shmobile/board-koelsch.c
++++ b/arch/arm/mach-shmobile/board-koelsch.c
+@@ -30,6 +30,7 @@
+ static void __init koelsch_add_standard_devices(void)
+ {
+ r8a7791_clock_init();
++ r8a7791_pinmux_init();
+ r8a7791_add_standard_devices();
+ }
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 393689d6324c0bb85379975d9d2762a030bb78fd Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 8 Oct 2013 12:39:59 +0900
+Subject: ARM: shmobile: Add Koelsch LED6, LED7 and LED8 support
+
+Enable Koelsch LEDs for GPIO output testing purpose.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 87a2934ecff1e054b5d2b7cb6dea2ee0eb649ff3)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch.c | 27 +++++++++++++++++++++++++++
+ 1 file changed, 27 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
+index d099eaf49cf6..2299d658a843 100644
+--- a/arch/arm/mach-shmobile/board-koelsch.c
++++ b/arch/arm/mach-shmobile/board-koelsch.c
+@@ -20,6 +20,8 @@
+ */
+
+ #include <linux/kernel.h>
++#include <linux/leds.h>
++#include <linux/platform_data/gpio-rcar.h>
+ #include <linux/platform_device.h>
+ #include <mach/common.h>
+ #include <mach/r8a7791.h>
+@@ -27,11 +29,36 @@
+ #include <asm/mach-types.h>
+ #include <asm/mach/arch.h>
+
++/* LEDS */
++static struct gpio_led koelsch_leds[] = {
++ {
++ .name = "led8",
++ .gpio = RCAR_GP_PIN(2, 21),
++ .default_state = LEDS_GPIO_DEFSTATE_ON,
++ }, {
++ .name = "led7",
++ .gpio = RCAR_GP_PIN(2, 20),
++ .default_state = LEDS_GPIO_DEFSTATE_ON,
++ }, {
++ .name = "led6",
++ .gpio = RCAR_GP_PIN(2, 19),
++ .default_state = LEDS_GPIO_DEFSTATE_ON,
++ },
++};
++
++static const struct gpio_led_platform_data koelsch_leds_pdata __initconst = {
++ .leds = koelsch_leds,
++ .num_leds = ARRAY_SIZE(koelsch_leds),
++};
++
+ static void __init koelsch_add_standard_devices(void)
+ {
+ r8a7791_clock_init();
+ r8a7791_pinmux_init();
+ r8a7791_add_standard_devices();
++ platform_device_register_data(&platform_bus, "leds-gpio", -1,
++ &koelsch_leds_pdata,
++ sizeof(koelsch_leds_pdata));
+ }
+
+ static const char * const koelsch_boards_compat_dt[] __initconst = {
+--
+1.8.5.rc3
+
--- /dev/null
+From 852b86057d2738bbc6ce5717f9b2204b88d8ae72 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 8 Oct 2013 12:40:08 +0900
+Subject: ARM: shmobile: Add Koelsch SW2 support
+
+Enable Koelsch GPIO switch for GPIO input and IRQ testing purpose.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 721319d1ab8bb854ad4befc3ac70b7401d2d7dab)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch.c | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
+index 2299d658a843..59fa0b975473 100644
+--- a/arch/arm/mach-shmobile/board-koelsch.c
++++ b/arch/arm/mach-shmobile/board-koelsch.c
+@@ -19,6 +19,9 @@
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
++#include <linux/gpio.h>
++#include <linux/gpio_keys.h>
++#include <linux/input.h>
+ #include <linux/kernel.h>
+ #include <linux/leds.h>
+ #include <linux/platform_data/gpio-rcar.h>
+@@ -51,6 +54,22 @@ static const struct gpio_led_platform_data koelsch_leds_pdata __initconst = {
+ .num_leds = ARRAY_SIZE(koelsch_leds),
+ };
+
++/* GPIO KEY */
++#define GPIO_KEY(c, g, d, ...) \
++ { .code = c, .gpio = g, .desc = d, .active_low = 1 }
++
++static struct gpio_keys_button gpio_buttons[] = {
++ GPIO_KEY(KEY_4, RCAR_GP_PIN(5, 3), "SW2-pin4"),
++ GPIO_KEY(KEY_3, RCAR_GP_PIN(5, 2), "SW2-pin3"),
++ GPIO_KEY(KEY_2, RCAR_GP_PIN(5, 1), "SW2-pin2"),
++ GPIO_KEY(KEY_1, RCAR_GP_PIN(5, 0), "SW2-pin1"),
++};
++
++static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
++ .buttons = gpio_buttons,
++ .nbuttons = ARRAY_SIZE(gpio_buttons),
++};
++
+ static void __init koelsch_add_standard_devices(void)
+ {
+ r8a7791_clock_init();
+@@ -59,6 +78,9 @@ static void __init koelsch_add_standard_devices(void)
+ platform_device_register_data(&platform_bus, "leds-gpio", -1,
+ &koelsch_leds_pdata,
+ sizeof(koelsch_leds_pdata));
++ platform_device_register_data(&platform_bus, "gpio-keys", -1,
++ &koelsch_keys_pdata,
++ sizeof(koelsch_keys_pdata));
+ }
+
+ static const char * const koelsch_boards_compat_dt[] __initconst = {
+--
+1.8.5.rc3
+
--- /dev/null
+From 731fb27920477f02938351d3fc3f24f93acfd5dc Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 8 Oct 2013 15:30:18 +0900
+Subject: ARM: shmobile: r8a7791 Koelsch DT reference C bits
+
+Add DT reference support for the r8a7791 Koelsch board.
+
+This board support file will be used together with common
+clocks and multiplatform in the future.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a2baf1912f399c0fbb9ec8064b88a1809f5a5b0a)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 11 ++++++
+ arch/arm/mach-shmobile/Makefile | 1 +
+ arch/arm/mach-shmobile/Makefile.boot | 1 +
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 46 ++++++++++++++++++++++++
+ 4 files changed, 59 insertions(+)
+ create mode 100644 arch/arm/mach-shmobile/board-koelsch-reference.c
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index aa9017bb750c..8eac47fef8dc 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -240,6 +240,17 @@ config MACH_KOELSCH
+ depends on ARCH_R8A7791
+ select USE_OF
+
++config MACH_KOELSCH_REFERENCE
++ bool "Koelsch board - Reference Device Tree Implementation"
++ depends on ARCH_R8A7791
++ select USE_OF
++ ---help---
++ Use reference implementation of Koelsch board support
++ which makes use of device tree at the expense
++ of not supporting a number of devices.
++
++ This is intended to aid developers
++
+ config MACH_KZM9G
+ bool "KZM-A9-GT board"
+ depends on ARCH_SH73A0
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index c7e877499dc2..8bca9b56352e 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -71,6 +71,7 @@ obj-$(CONFIG_MACH_LAGER_REFERENCE) += board-lager-reference.o
+ obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
+ obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
+ obj-$(CONFIG_MACH_KOELSCH) += board-koelsch.o
++obj-$(CONFIG_MACH_KOELSCH_REFERENCE) += board-koelsch-reference.o
+ obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
+ obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o
+ endif
+diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
+index 4f30e3dc0919..892d4ab8b23d 100644
+--- a/arch/arm/mach-shmobile/Makefile.boot
++++ b/arch/arm/mach-shmobile/Makefile.boot
+@@ -8,6 +8,7 @@ loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
+ loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
+ loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
+ loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
++loadaddr-$(CONFIG_MACH_KOELSCH_REFERENCE) += 0x40008000
+ loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
+ loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
+ loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+new file mode 100644
+index 000000000000..beecc8bb510f
+--- /dev/null
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -0,0 +1,46 @@
++/*
++ * Koelsch board support - Reference DT implementation
++ *
++ * Copyright (C) 2013 Renesas Electronics Corporation
++ * Copyright (C) 2013 Renesas Solutions Corp.
++ * Copyright (C) 2013 Magnus Damm
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
++ */
++
++#include <linux/kernel.h>
++#include <linux/of_platform.h>
++#include <mach/rcar-gen2.h>
++#include <mach/r8a7791.h>
++#include <asm/mach/arch.h>
++
++static void __init koelsch_add_standard_devices(void)
++{
++ r8a7791_clock_init();
++ r8a7791_add_dt_devices();
++ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
++}
++
++static const char * const koelsch_boards_compat_dt[] __initconst = {
++ "renesas,koelsch-reference",
++ NULL,
++};
++
++DT_MACHINE_START(KOELSCH_DT, "koelsch")
++ .smp = smp_ops(r8a7791_smp_ops),
++ .init_early = r8a7791_init_early,
++ .init_time = rcar_gen2_timer_init,
++ .init_machine = koelsch_add_standard_devices,
++ .dt_compat = koelsch_boards_compat_dt,
++MACHINE_END
+--
+1.8.5.rc3
+
--- /dev/null
+From 50ab4de29113c7408a3bdba535affe2a00d3b074 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 10 Oct 2013 23:35:06 -0700
+Subject: ARM: shmobile: bockw: fixup FPGA ioremap area
+
+Don't keep FPGA ioremap area.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b6d3eba338b4a24e49947fc45542fca7b76dda9a)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-bockw-reference.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
+index 875cf3f3f503..fac95a4d6553 100644
+--- a/arch/arm/mach-shmobile/board-bockw-reference.c
++++ b/arch/arm/mach-shmobile/board-bockw-reference.c
+@@ -32,7 +32,7 @@
+ #define COMCTLR 0x101c
+ static void __init bockw_init(void)
+ {
+- static void __iomem *fpga;
++ void __iomem *fpga;
+
+ r8a7778_clock_init();
+ r8a7778_init_irq_extpin_dt(1);
+@@ -50,6 +50,8 @@ static void __init bockw_init(void)
+ u16 val = ioread16(fpga + IRQ0MR);
+ val &= ~(1 << 4); /* enable SMSC911x */
+ iowrite16(val, fpga + IRQ0MR);
++
++ iounmap(fpga);
+ }
+
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+--
+1.8.5.rc3
+
--- /dev/null
+From a7207f19ccbbdebb55b3cee4dc81fec52edfb426 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 10 Oct 2013 23:35:34 -0700
+Subject: ARM: shmobile: bockw: add pin pull-up setting for SDHI
+
+SDHI CD/WP pin needs pull-up
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 79990c164dcc7514398ca824a609c74cb5f563da)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-bockw-reference.c | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
+index fac95a4d6553..027373f8de82 100644
+--- a/arch/arm/mach-shmobile/board-bockw-reference.c
++++ b/arch/arm/mach-shmobile/board-bockw-reference.c
+@@ -30,9 +30,13 @@
+ #define FPGA 0x18200000
+ #define IRQ0MR 0x30
+ #define COMCTLR 0x101c
++
++#define PFC 0xfffc0000
++#define PUPR4 0x110
+ static void __init bockw_init(void)
+ {
+ void __iomem *fpga;
++ void __iomem *pfc;
+
+ r8a7778_clock_init();
+ r8a7778_init_irq_extpin_dt(1);
+@@ -54,6 +58,17 @@ static void __init bockw_init(void)
+ iounmap(fpga);
+ }
+
++ pfc = ioremap_nocache(PFC, 0x200);
++ if (pfc) {
++ /*
++ * FIXME
++ *
++ * SDHI CD/WP pin needs pull-up
++ */
++ iowrite32(ioread32(pfc + PUPR4) | (3 << 26), pfc + PUPR4);
++ iounmap(pfc);
++ }
++
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ }
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 3d8f538b8530c7adff33d5fe2f27d5bd20046f82 Mon Sep 17 00:00:00 2001
+From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
+Date: Tue, 29 Oct 2013 17:57:30 +0900
+Subject: ARM: shmobile: lager: set .debounce_interval
+
+In R-Car GPIO hardware block, 'chattering removal' feature can be
+enabled on GPIO-n-[3:0] pins, but it's not supported on rest of pins
+GPIO-n-[31:4].
+
+Set an appropriate debounce interval, instead. We could confirm that
+spurious/unnecessary GPIO interrupts are prevented by this settings.
+
+Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c9fd77d48a72d4210c992c4ee27ef8217a44da03)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
+index 4301c3812a13..27ab664968e8 100644
+--- a/arch/arm/mach-shmobile/board-lager.c
++++ b/arch/arm/mach-shmobile/board-lager.c
+@@ -120,7 +120,8 @@ static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
+
+ /* GPIO KEY */
+ #define GPIO_KEY(c, g, d, ...) \
+- { .code = c, .gpio = g, .desc = d, .active_low = 1 }
++ { .code = c, .gpio = g, .desc = d, .active_low = 1, \
++ .debounce_interval = 20 }
+
+ static struct gpio_keys_button gpio_buttons[] = {
+ GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
+--
+1.8.5.rc3
+
--- /dev/null
+From ecbe3371f896fef840e52105c125df9a36c29811 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 29 Oct 2013 17:57:31 +0900
+Subject: ARM: shmobile: koelsch: set .debounce_interval
+
+In R-Car GPIO hardware block, 'chattering removal' feature can be
+enabled on GPIO-n-[3:0] pins, but it's not supported on rest of pins
+GPIO-n-[31:4].
+
+Set an appropriate debounce interval, instead. We could confirm that
+spurious/unnecessary GPIO interrupts are prevented by this settings.
+
+Based on work for the lager board by Shinya Kuribayashi.
+
+Cc: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 478e2f9ca5ac9862a5cac0798814ba7d6a5de002)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
+index 59fa0b975473..5b81a343c5f9 100644
+--- a/arch/arm/mach-shmobile/board-koelsch.c
++++ b/arch/arm/mach-shmobile/board-koelsch.c
+@@ -56,7 +56,8 @@ static const struct gpio_led_platform_data koelsch_leds_pdata __initconst = {
+
+ /* GPIO KEY */
+ #define GPIO_KEY(c, g, d, ...) \
+- { .code = c, .gpio = g, .desc = d, .active_low = 1 }
++ { .code = c, .gpio = g, .desc = d, .active_low = 1, \
++ .debounce_interval = 20 }
+
+ static struct gpio_keys_button gpio_buttons[] = {
+ GPIO_KEY(KEY_4, RCAR_GP_PIN(5, 3), "SW2-pin4"),
+--
+1.8.5.rc3
+
--- /dev/null
+From 59c96e394b7ed742f9bb37b2152b1c8ca31fa55a Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 6 Nov 2013 19:40:01 +0900
+Subject: ARM: shmobile: Initial r8a7791 and Koelsch multiplatform support
+
+Add Koelsch and r8a7791 to CONFIG_SHMOBILE_MULTI. At this
+point CCF is not yet supported so you cannot run this code
+yet. For CCF support to happen several different components
+are needed, and this is one simple portion that moves us
+forward. Other patches need to build on top of this one.
+
+Koelsch board support exists in 3 flavors:
+1) SHMOBILE_MULTI, MACH_KOELSCH - board-koelsch-reference.c (CCF + DT)
+2) SHMOBILE, MACH_KOELSCH_REFERENCE - board-koelsch-reference.c (DT)
+3) SHMOBILE, MACH_KOELSCH - board-koelsch.c (legacy C code)
+
+When CCF is done then 2) will be removed. When 1) includes same features
+as 3) then 3) will be removed.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6d75bc6439ec3f4ae45db1e501177382d0582591)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ arch/arm/boot/dts/Makefile
+---
+ arch/arm/boot/dts/Makefile | 3 ++-
+ arch/arm/mach-shmobile/Kconfig | 8 ++++++++
+ arch/arm/mach-shmobile/Makefile | 1 +
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 5 +++++
+ 4 files changed, 16 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index f77c7660b0a8..f73c0a846bab 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -176,7 +176,8 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
+ r8a73a4-ape6evm.dtb \
+ r8a73a4-ape6evm-reference.dtb \
+ sh7372-mackerel.dtb
+-dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb
++dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
++ r8a7791-koelsch-reference.dtb
+ dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
+ socfpga_vt.dtb
+ dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index 8eac47fef8dc..17a4f409f96d 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -24,8 +24,16 @@ comment "SH-Mobile System Type"
+ config ARCH_EMEV2
+ bool "Emma Mobile EV2"
+
++config ARCH_R8A7791
++ bool "R-Car M2 (R8A77910)"
++ select RENESAS_IRQC
++
+ comment "SH-Mobile Board Type"
+
++config MACH_KOELSCH
++ bool "Koelsch board"
++ depends on ARCH_R8A7791
++
+ config MACH_KZM9D
+ bool "KZM9D board"
+ depends on ARCH_EMEV2
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index 8bca9b56352e..021775de50ae 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -56,6 +56,7 @@ obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
+
+ # Board objects
+ ifdef CONFIG_ARCH_SHMOBILE_MULTI
++obj-$(CONFIG_MACH_KOELSCH) += board-koelsch-reference.o
+ obj-$(CONFIG_MACH_KZM9D) += board-kzm9d-reference.o
+ else
+ obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+index beecc8bb510f..25b558f462a3 100644
+--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -19,6 +19,7 @@
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
++#include <linux/clk-provider.h>
+ #include <linux/kernel.h>
+ #include <linux/of_platform.h>
+ #include <mach/rcar-gen2.h>
+@@ -27,7 +28,11 @@
+
+ static void __init koelsch_add_standard_devices(void)
+ {
++#ifdef CONFIG_COMMON_CLK
++ of_clk_init(NULL);
++#else
+ r8a7791_clock_init();
++#endif
+ r8a7791_add_dt_devices();
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ }
+--
+1.8.5.rc3
+
--- /dev/null
+From 37cee5a8532bfbc81ba561aaadda4e47008deb3e Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 7 Nov 2013 08:31:16 +0900
+Subject: ARM: shmobile: r7s72100 Genmai DT reference C bits
+
+Add C code support for r7s72100 Genmai DT reference.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c4e337fc0cd5aebda6849fbbecd6cfd645d1bae6)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 11 +++++++
+ arch/arm/mach-shmobile/Makefile | 1 +
+ arch/arm/mach-shmobile/Makefile.boot | 3 +-
+ arch/arm/mach-shmobile/board-genmai-reference.c | 44 +++++++++++++++++++++++++
+ 4 files changed, 58 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/mach-shmobile/board-genmai-reference.c
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index 17a4f409f96d..8bc730890384 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -207,6 +207,17 @@ config MACH_GENMAI
+ depends on ARCH_R7S72100
+ select USE_OF
+
++config MACH_GENMAI_REFERENCE
++ bool "Genmai board - Reference Device Tree Implementation"
++ depends on ARCH_R7S72100
++ select USE_OF
++ ---help---
++ Use reference implementation of Genmai board support
++ which makes use of device tree at the expense
++ of not supporting a number of devices.
++
++ This is intended to aid developers
++
+ config MACH_MARZEN
+ bool "MARZEN board"
+ depends on ARCH_R8A7779
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index 021775de50ae..d2b8342ea242 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -65,6 +65,7 @@ obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
+ obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
+ obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o
+ obj-$(CONFIG_MACH_GENMAI) += board-genmai.o
++obj-$(CONFIG_MACH_GENMAI_REFERENCE) += board-genmai-reference.o
+ obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
+ obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o
+ obj-$(CONFIG_MACH_LAGER) += board-lager.o
+diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
+index 892d4ab8b23d..759e4f8fcd37 100644
+--- a/arch/arm/mach-shmobile/Makefile.boot
++++ b/arch/arm/mach-shmobile/Makefile.boot
+@@ -6,7 +6,8 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
+ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
+ loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
+ loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
+-loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
++loadaddr-$(CONFIG_MACH_GENMAI) += 0x08008000
++loadaddr-$(CONFIG_MACH_GENMAI_REFERENCE) += 0x08008000
+ loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
+ loadaddr-$(CONFIG_MACH_KOELSCH_REFERENCE) += 0x40008000
+ loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
+diff --git a/arch/arm/mach-shmobile/board-genmai-reference.c b/arch/arm/mach-shmobile/board-genmai-reference.c
+new file mode 100644
+index 000000000000..34c98819cf12
+--- /dev/null
++++ b/arch/arm/mach-shmobile/board-genmai-reference.c
+@@ -0,0 +1,44 @@
++/*
++ * Genmai board support
++ *
++ * Copyright (C) 2013 Renesas Solutions Corp.
++ * Copyright (C) 2013 Magnus Damm
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
++ */
++
++#include <linux/kernel.h>
++#include <linux/of_platform.h>
++#include <mach/common.h>
++#include <mach/r7s72100.h>
++#include <asm/mach-types.h>
++#include <asm/mach/arch.h>
++
++static void __init genmai_add_standard_devices(void)
++{
++ r7s72100_clock_init();
++ r7s72100_add_dt_devices();
++ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
++}
++
++static const char * const genmai_boards_compat_dt[] __initconst = {
++ "renesas,genmai-reference",
++ NULL,
++};
++
++DT_MACHINE_START(GENMAI_DT, "genmai")
++ .init_early = r7s72100_init_early,
++ .init_machine = genmai_add_standard_devices,
++ .dt_compat = genmai_boards_compat_dt,
++MACHINE_END
+--
+1.8.5.rc3
+
--- /dev/null
+From aa237cf9816986bfcfa158eccd7e0d1d023dd57d Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 7 Nov 2013 08:31:25 +0900
+Subject: ARM: shmobile: r7s72100 Genmai Multiplatform
+
+Add r7s72100 Genmai to SHMOBILE_MULTI.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7d91c4691207a302c50308ab38706b8a3d6039cd)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/mach-shmobile/Kconfig | 7 +++++++
+ arch/arm/mach-shmobile/Makefile | 1 +
+ arch/arm/mach-shmobile/board-genmai-reference.c | 5 +++++
+ 4 files changed, 14 insertions(+)
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index f73c0a846bab..0eadc1af789b 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -177,6 +177,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
+ r8a73a4-ape6evm-reference.dtb \
+ sh7372-mackerel.dtb
+ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
++ r7s72100-genmai-reference.dtb \
+ r8a7791-koelsch-reference.dtb
+ dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
+ socfpga_vt.dtb
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index 8bc730890384..bb0837b8c05c 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -24,12 +24,19 @@ comment "SH-Mobile System Type"
+ config ARCH_EMEV2
+ bool "Emma Mobile EV2"
+
++config ARCH_R7S72100
++ bool "RZ/A1H (R7S72100)"
++
+ config ARCH_R8A7791
+ bool "R-Car M2 (R8A77910)"
+ select RENESAS_IRQC
+
+ comment "SH-Mobile Board Type"
+
++config MACH_GENMAI
++ bool "Genmai board"
++ depends on ARCH_R7S72100
++
+ config MACH_KOELSCH
+ bool "Koelsch board"
+ depends on ARCH_R8A7791
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index d2b8342ea242..1c131046dec6 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -56,6 +56,7 @@ obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
+
+ # Board objects
+ ifdef CONFIG_ARCH_SHMOBILE_MULTI
++obj-$(CONFIG_MACH_GENMAI) += board-genmai-reference.o
+ obj-$(CONFIG_MACH_KOELSCH) += board-koelsch-reference.o
+ obj-$(CONFIG_MACH_KZM9D) += board-kzm9d-reference.o
+ else
+diff --git a/arch/arm/mach-shmobile/board-genmai-reference.c b/arch/arm/mach-shmobile/board-genmai-reference.c
+index 34c98819cf12..7630c1053e32 100644
+--- a/arch/arm/mach-shmobile/board-genmai-reference.c
++++ b/arch/arm/mach-shmobile/board-genmai-reference.c
+@@ -18,6 +18,7 @@
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
++#include <linux/clk-provider.h>
+ #include <linux/kernel.h>
+ #include <linux/of_platform.h>
+ #include <mach/common.h>
+@@ -27,7 +28,11 @@
+
+ static void __init genmai_add_standard_devices(void)
+ {
++#ifdef CONFIG_COMMON_CLK
++ of_clk_init(NULL);
++#else
+ r7s72100_clock_init();
++#endif
+ r7s72100_add_dt_devices();
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ }
+--
+1.8.5.rc3
+
--- /dev/null
+From e3601f14ed4ce9d3b56e035b1877aa7de1f3bf9f Mon Sep 17 00:00:00 2001
+From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
+Date: Thu, 14 Nov 2013 07:40:26 +0900
+Subject: ARM: shmobile: lager: mark GPIO keys as wake-up sources
+
+Enable wakeup for the GPIO keys on the Lager board.
+
+Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e0554d90b076da1c543b42599c1d6636286ca47f)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
+index 27ab664968e8..7861a04ce14c 100644
+--- a/arch/arm/mach-shmobile/board-lager.c
++++ b/arch/arm/mach-shmobile/board-lager.c
+@@ -121,7 +121,7 @@ static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
+ /* GPIO KEY */
+ #define GPIO_KEY(c, g, d, ...) \
+ { .code = c, .gpio = g, .desc = d, .active_low = 1, \
+- .debounce_interval = 20 }
++ .wakeup = 1, .debounce_interval = 20 }
+
+ static struct gpio_keys_button gpio_buttons[] = {
+ GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
+--
+1.8.5.rc3
+
--- /dev/null
+From 9fe189d1773504aaa16e1028c669532902860d61 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 12:54:34 +0900
+Subject: ARM: shmobile: Use ->init_late() on Koelsch
+
+Hook in shmobile_init_late() on Koelsch. This enables some PM
+related things like CPUIdle and Suspend-to-RAM.
+
+With this patch applied it is possible to use Suspend-to-RAM:
+# echo enabled > /sys/class/tty/ttySC6/power/wakeup
+# echo mem > /sys/power/state
+(wake by sending a character on the serial console)
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6dc00ab90fa8bc4fec2f9c206ee679d144bc7eb5)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 2 ++
+ arch/arm/mach-shmobile/board-koelsch.c | 3 ++-
+ 2 files changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+index 25b558f462a3..a804a1798a71 100644
+--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -22,6 +22,7 @@
+ #include <linux/clk-provider.h>
+ #include <linux/kernel.h>
+ #include <linux/of_platform.h>
++#include <mach/common.h>
+ #include <mach/rcar-gen2.h>
+ #include <mach/r8a7791.h>
+ #include <asm/mach/arch.h>
+@@ -47,5 +48,6 @@ DT_MACHINE_START(KOELSCH_DT, "koelsch")
+ .init_early = r8a7791_init_early,
+ .init_time = rcar_gen2_timer_init,
+ .init_machine = koelsch_add_standard_devices,
++ .init_late = shmobile_init_late,
+ .dt_compat = koelsch_boards_compat_dt,
+ MACHINE_END
+diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
+index 5b81a343c5f9..135929b15650 100644
+--- a/arch/arm/mach-shmobile/board-koelsch.c
++++ b/arch/arm/mach-shmobile/board-koelsch.c
+@@ -92,7 +92,8 @@ static const char * const koelsch_boards_compat_dt[] __initconst = {
+ DT_MACHINE_START(KOELSCH_DT, "koelsch")
+ .smp = smp_ops(r8a7791_smp_ops),
+ .init_early = r8a7791_init_early,
+- .init_machine = koelsch_add_standard_devices,
+ .init_time = rcar_gen2_timer_init,
++ .init_machine = koelsch_add_standard_devices,
++ .init_late = shmobile_init_late,
+ .dt_compat = koelsch_boards_compat_dt,
+ MACHINE_END
+--
+1.8.5.rc3
+
--- /dev/null
+From f6d34964d8b1c6d5d9ca24fcc9c11f5aad0bb898 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 12:56:38 +0900
+Subject: ARM: shmobile: koelsch: mark GPIO keys as wake-up sources
+
+Enable wakeup for the GPIO keys on the Koelsch board.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e209456ee86a6fcaa589be14fe48311abf828376)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
+index 135929b15650..f0fe5d4ba344 100644
+--- a/arch/arm/mach-shmobile/board-koelsch.c
++++ b/arch/arm/mach-shmobile/board-koelsch.c
+@@ -57,7 +57,7 @@ static const struct gpio_led_platform_data koelsch_leds_pdata __initconst = {
+ /* GPIO KEY */
+ #define GPIO_KEY(c, g, d, ...) \
+ { .code = c, .gpio = g, .desc = d, .active_low = 1, \
+- .debounce_interval = 20 }
++ .wakeup = 1, .debounce_interval = 20 }
+
+ static struct gpio_keys_button gpio_buttons[] = {
+ GPIO_KEY(KEY_4, RCAR_GP_PIN(5, 3), "SW2-pin4"),
+--
+1.8.5.rc3
+
--- /dev/null
+From 8265559908ac630e92c36c7b002ba2864a88b0ff Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 13:00:10 +0900
+Subject: ARM: shmobile: Hook up SW30-SW36 on Koelsch
+
+Add support for Koelsch SW30-SW36 using GPIO keys.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 159a282dc3a1bcc9a0cc3a41304c41eef229add1)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
+index f0fe5d4ba344..412e1539c952 100644
+--- a/arch/arm/mach-shmobile/board-koelsch.c
++++ b/arch/arm/mach-shmobile/board-koelsch.c
+@@ -64,6 +64,13 @@ static struct gpio_keys_button gpio_buttons[] = {
+ GPIO_KEY(KEY_3, RCAR_GP_PIN(5, 2), "SW2-pin3"),
+ GPIO_KEY(KEY_2, RCAR_GP_PIN(5, 1), "SW2-pin2"),
+ GPIO_KEY(KEY_1, RCAR_GP_PIN(5, 0), "SW2-pin1"),
++ GPIO_KEY(KEY_G, RCAR_GP_PIN(7, 6), "SW36"),
++ GPIO_KEY(KEY_F, RCAR_GP_PIN(7, 5), "SW35"),
++ GPIO_KEY(KEY_E, RCAR_GP_PIN(7, 4), "SW34"),
++ GPIO_KEY(KEY_D, RCAR_GP_PIN(7, 3), "SW33"),
++ GPIO_KEY(KEY_C, RCAR_GP_PIN(7, 2), "SW32"),
++ GPIO_KEY(KEY_B, RCAR_GP_PIN(7, 1), "SW31"),
++ GPIO_KEY(KEY_A, RCAR_GP_PIN(7, 0), "SW30"),
+ };
+
+ static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
+--
+1.8.5.rc3
+
--- /dev/null
+From 19af200c043cb1bebcb6f74e2e69a6782dad844f Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 09:02:31 +0900
+Subject: ARM: shmobile: Use ->init_late() on Lager
+
+Hook in shmobile_init_late() on Lager V2. This enables some PM
+related things like CPUIdle and Suspend-to-RAM.
+
+With this patch applied it is possible to use Suspend-to-RAM:
+# echo enabled > /sys/class/tty/ttySC6/power/wakeup
+# echo mem > /sys/power/state
+(wake by sending a character on the serial console)
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3fbbcbdf57a5172318d10d0f16a4e2d2c595fd75)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager-reference.c | 2 ++
+ arch/arm/mach-shmobile/board-lager.c | 1 +
+ 2 files changed, 3 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
+index 7df9ea0839db..51a3bcc704e5 100644
+--- a/arch/arm/mach-shmobile/board-lager-reference.c
++++ b/arch/arm/mach-shmobile/board-lager-reference.c
+@@ -20,6 +20,7 @@
+
+ #include <linux/init.h>
+ #include <linux/of_platform.h>
++#include <mach/common.h>
+ #include <mach/rcar-gen2.h>
+ #include <mach/r8a7790.h>
+ #include <asm/mach/arch.h>
+@@ -41,5 +42,6 @@ DT_MACHINE_START(LAGER_DT, "lager")
+ .init_early = r8a7790_init_early,
+ .init_time = rcar_gen2_timer_init,
+ .init_machine = lager_add_standard_devices,
++ .init_late = shmobile_init_late,
+ .dt_compat = lager_boards_compat_dt,
+ MACHINE_END
+diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
+index 7861a04ce14c..69dcf55383b7 100644
+--- a/arch/arm/mach-shmobile/board-lager.c
++++ b/arch/arm/mach-shmobile/board-lager.c
+@@ -261,5 +261,6 @@ DT_MACHINE_START(LAGER_DT, "lager")
+ .init_early = r8a7790_init_early,
+ .init_time = rcar_gen2_timer_init,
+ .init_machine = lager_init,
++ .init_late = shmobile_init_late,
+ .dt_compat = lager_boards_compat_dt,
+ MACHINE_END
+--
+1.8.5.rc3
+
--- /dev/null
+From 68e031b3c5909c5112362af3fba6d7aea302c296 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 20 Nov 2013 16:41:48 +0900
+Subject: ARM: shmobile: Add pinctrl_register_mappings() for Koelsch
+
+Add code to setup the r8a7791 PFC for the Koelsch board.
+
+At this point serial consoles are added, and in the near
+future other platform-device-only devices will be added
+here like for instance the r8a7791 DU.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 85ef14da7337ba2c9b9fc489637e3db3b956b5a0)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch.c | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
+index 412e1539c952..6e12914d6d58 100644
+--- a/arch/arm/mach-shmobile/board-koelsch.c
++++ b/arch/arm/mach-shmobile/board-koelsch.c
+@@ -24,6 +24,7 @@
+ #include <linux/input.h>
+ #include <linux/kernel.h>
+ #include <linux/leds.h>
++#include <linux/pinctrl/machine.h>
+ #include <linux/platform_data/gpio-rcar.h>
+ #include <linux/platform_device.h>
+ #include <mach/common.h>
+@@ -78,9 +79,20 @@ static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
+ .nbuttons = ARRAY_SIZE(gpio_buttons),
+ };
+
++static const struct pinctrl_map koelsch_pinctrl_map[] = {
++ /* SCIF0 (CN19: DEBUG SERIAL0) */
++ PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7791",
++ "scif0_data_d", "scif0"),
++ /* SCIF1 (CN20: DEBUG SERIAL1) */
++ PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7791",
++ "scif1_data_d", "scif1"),
++};
++
+ static void __init koelsch_add_standard_devices(void)
+ {
+ r8a7791_clock_init();
++ pinctrl_register_mappings(koelsch_pinctrl_map,
++ ARRAY_SIZE(koelsch_pinctrl_map));
+ r8a7791_pinmux_init();
+ r8a7791_add_standard_devices();
+ platform_device_register_data(&platform_bus, "leds-gpio", -1,
+--
+1.8.5.rc3
+
--- /dev/null
+From 9f25fdf13f3192ac91c29d30beaa48a08d27d371 Mon Sep 17 00:00:00 2001
+From: Paul Walmsley <pwalmsley@nvidia.com>
+Date: Tue, 26 Nov 2013 16:49:38 -0800
+Subject: ARM: shmobile: mackerel: clk_round_rate() can return a zero to
+ indicate an error
+
+Treat both negative and zero return values from clk_round_rate() as
+errors. This is needed since subsequent patches will convert
+clk_round_rate()'s return value to be an unsigned type, rather than a
+signed type, since some clock sources can generate rates higher than
+(2^31)-1 Hz.
+
+Eventually, when calling clk_round_rate(), only a return value of zero
+will be considered a error. All other values will be considered valid
+rates. The comparison against values less than 0 is kept to preserve
+the correct behavior in the meantime.
+
+Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>
+Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 90d423faa0ed53cfda9f12d119f6938dd1ab515d)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-mackerel.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
+index af06753eb809..d90d2f11071b 100644
+--- a/arch/arm/mach-shmobile/board-mackerel.c
++++ b/arch/arm/mach-shmobile/board-mackerel.c
+@@ -548,9 +548,9 @@ static void __init hdmi_init_pm_clock(void)
+ clk_get_rate(&sh7372_pllc2_clk));
+
+ rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
+- if (rate < 0) {
++ if (rate <= 0) {
+ pr_err("Cannot get suitable rate: %ld\n", rate);
+- ret = rate;
++ ret = -EINVAL;
+ goto out;
+ }
+
+--
+1.8.5.rc3
+
--- /dev/null
+From bc0fb993a37a39b012bb0d393807ee25861691b4 Mon Sep 17 00:00:00 2001
+From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
+Date: Tue, 22 Oct 2013 11:21:12 +0900
+Subject: ARM: shmobile: Lager:add SPI FLASH support on QSPI
+
+This patch enables Spansion S25FL512SAGMFIG11 chip on QSPI,
+Add support for the QSPI interface on Lager.
+
+Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 24cf82f44213fe4d36157d9920b59420159616ec)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager.c | 64 ++++++++++++++++++++++++++++++++++++
+ 1 file changed, 64 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
+index 69dcf55383b7..c43d5ccd21f0 100644
+--- a/arch/arm/mach-shmobile/board-lager.c
++++ b/arch/arm/mach-shmobile/board-lager.c
+@@ -39,6 +39,11 @@
+ #include <mach/r8a7790.h>
+ #include <asm/mach-types.h>
+ #include <asm/mach/arch.h>
++#include <linux/mtd/partitions.h>
++#include <linux/mtd/mtd.h>
++#include <linux/spi/flash.h>
++#include <linux/spi/rspi.h>
++#include <linux/spi/spi.h>
+
+ /* DU */
+ static struct rcar_du_encoder_data lager_du_encoders[] = {
+@@ -166,6 +171,59 @@ static const struct resource ether_resources[] __initconst = {
+ DEFINE_RES_IRQ(gic_spi(162)),
+ };
+
++/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
++static struct mtd_partition spi_flash_part[] = {
++ /* Reserved for user loader program, read-only */
++ {
++ .name = "loader",
++ .offset = 0,
++ .size = SZ_256K,
++ .mask_flags = MTD_WRITEABLE,
++ },
++ /* Reserved for user program, read-only */
++ {
++ .name = "user",
++ .offset = MTDPART_OFS_APPEND,
++ .size = SZ_4M,
++ .mask_flags = MTD_WRITEABLE,
++ },
++ /* All else is writable (e.g. JFFS2) */
++ {
++ .name = "flash",
++ .offset = MTDPART_OFS_APPEND,
++ .size = MTDPART_SIZ_FULL,
++ .mask_flags = 0,
++ },
++};
++
++static struct flash_platform_data spi_flash_data = {
++ .name = "m25p80",
++ .parts = spi_flash_part,
++ .nr_parts = ARRAY_SIZE(spi_flash_part),
++ .type = "s25fl512s",
++};
++
++static const struct rspi_plat_data qspi_pdata __initconst = {
++ .num_chipselect = 1,
++};
++
++static const struct spi_board_info spi_info[] __initconst = {
++ {
++ .modalias = "m25p80",
++ .platform_data = &spi_flash_data,
++ .mode = SPI_MODE_0,
++ .max_speed_hz = 30000000,
++ .bus_num = 0,
++ .chip_select = 0,
++ },
++};
++
++/* QSPI resource */
++static const struct resource qspi_resources[] __initconst = {
++ DEFINE_RES_MEM(0xe6b10000, 0x1000),
++ DEFINE_RES_IRQ(gic_spi(184)),
++};
++
+ static const struct pinctrl_map lager_pinctrl_map[] = {
+ /* DU (CN10: ARGB0, CN13: LVDS) */
+ PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
+@@ -223,6 +281,12 @@ static void __init lager_add_standard_devices(void)
+ ðer_pdata, sizeof(ether_pdata));
+
+ lager_add_du_device();
++
++ platform_device_register_resndata(&platform_bus, "qspi", 0,
++ qspi_resources,
++ ARRAY_SIZE(qspi_resources),
++ &qspi_pdata, sizeof(qspi_pdata));
++ spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
+ }
+
+ /*
+--
+1.8.5.rc3
+
--- /dev/null
+From 31008881948969dc259c18bacc8576f20cb2afce Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 28 Nov 2013 16:17:58 +0100
+Subject: ARM: shmobile: mackerel: Use pinconf API to configure pin pull-down
+
+The USB0 and USB1 VBUS pins must be pulled down. Add corresponding
+configuration entries in the pinctrl map table instead of manually
+poking the pin control registers.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3a8067f77fcef7771fb12f14bef847e0b6201e0b)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-mackerel.c | 17 +++++++++--------
+ arch/arm/mach-shmobile/sh-gpio.h | 19 -------------------
+ 2 files changed, 9 insertions(+), 27 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
+index d90d2f11071b..207acf0e07da 100644
+--- a/arch/arm/mach-shmobile/board-mackerel.c
++++ b/arch/arm/mach-shmobile/board-mackerel.c
+@@ -41,6 +41,7 @@
+ #include <linux/mtd/physmap.h>
+ #include <linux/mtd/sh_flctl.h>
+ #include <linux/pinctrl/machine.h>
++#include <linux/pinctrl/pinconf-generic.h>
+ #include <linux/platform_data/gpio_backlight.h>
+ #include <linux/pm_clock.h>
+ #include <linux/regulator/fixed.h>
+@@ -1311,6 +1312,10 @@ static struct i2c_board_info i2c1_devices[] = {
+ },
+ };
+
++static unsigned long pin_pulldown_conf[] = {
++ PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 0),
++};
++
+ static const struct pinctrl_map mackerel_pinctrl_map[] = {
+ /* ADXL34X */
+ PIN_MAP_MUX_GROUP_DEFAULT("1-0053", "pfc-sh7372",
+@@ -1396,17 +1401,19 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
+ /* USBHS0 */
+ PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.0", "pfc-sh7372",
+ "usb0_vbus", "usb0"),
++ PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.0", "pfc-sh7372",
++ "usb0_vbus", pin_pulldown_conf),
+ /* USBHS1 */
+ PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
+ "usb1_vbus", "usb1"),
++ PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.&", "pfc-sh7372",
++ "usb1_vbus", pin_pulldown_conf),
+ PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
+ "usb1_otg_id_0", "usb1"),
+ };
+
+ #define GPIO_PORT9CR IOMEM(0xE6051009)
+ #define GPIO_PORT10CR IOMEM(0xE605100A)
+-#define GPIO_PORT167CR IOMEM(0xE60520A7)
+-#define GPIO_PORT168CR IOMEM(0xE60520A8)
+ #define SRCR4 IOMEM(0xe61580bc)
+ #define USCCR1 IOMEM(0xE6058144)
+ static void __init mackerel_init(void)
+@@ -1446,12 +1453,6 @@ static void __init mackerel_init(void)
+
+ gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
+
+- /* USBHS0 */
+- gpio_request_pulldown(GPIO_PORT168CR); /* VBUS0_0 pull down */
+-
+- /* USBHS1 */
+- gpio_request_pulldown(GPIO_PORT167CR); /* VBUS0_1 pull down */
+-
+ /* FSI2 port A (ak4643) */
+ gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
+
+diff --git a/arch/arm/mach-shmobile/sh-gpio.h b/arch/arm/mach-shmobile/sh-gpio.h
+index e834763ac2a5..2c4141413db9 100644
+--- a/arch/arm/mach-shmobile/sh-gpio.h
++++ b/arch/arm/mach-shmobile/sh-gpio.h
+@@ -26,23 +26,4 @@ static inline void __init gpio_direction_none(void __iomem * addr)
+ __raw_writeb(0x00, addr);
+ }
+
+-static inline void __init gpio_request_pullup(void __iomem * addr)
+-{
+- u8 data = __raw_readb(addr);
+-
+- data &= 0x0F;
+- data |= 0xC0;
+- __raw_writeb(data, addr);
+-}
+-
+-static inline void __init gpio_request_pulldown(void __iomem * addr)
+-{
+- u8 data = __raw_readb(addr);
+-
+- data &= 0x0F;
+- data |= 0xA0;
+-
+- __raw_writeb(data, addr);
+-}
+-
+ #endif /* __ASM_ARCH_GPIO_H */
+--
+1.8.5.rc3
+
--- /dev/null
+From 002eafe3085abe2f41b9fe15f384112dc9ce0784 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 28 Nov 2013 17:27:29 +0100
+Subject: ARM: Kconfig: Mention Renesas ARM SoCs instead of SH-Mobile
+
+Only the SH-Mobile product name is mentioned in the Kconfig descriptions
+and help texts. This makes it difficult for external engineers working
+on other Renesas platforms to find upstream platform support as the
+combination of the SH-Mobile name and using the product number proved an
+effective method of concealment.
+
+Replace the "SH-Mobile" name with "Renesas ARM SoCs" in all the related
+descriptions, help texts and comments.
+
+Reported-by: Phil Edworthy <phil.edworthy@renesas.com>
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 0d9fd6165a01093ac82c1088d0544a304f72b4d6)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/Kconfig | 7 ++++---
+ arch/arm/mach-shmobile/Kconfig | 18 +++++++++---------
+ 2 files changed, 13 insertions(+), 12 deletions(-)
+
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index e965fda96875..3c4dd82f48f4 100644
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -633,7 +633,7 @@ config ARCH_MSM
+ (clock and power control, etc).
+
+ config ARCH_SHMOBILE_LEGACY
+- bool "Renesas SH-Mobile / R-Mobile (non-multiplatform)"
++ bool "Renesas ARM SoCs (non-multiplatform)"
+ select ARCH_SHMOBILE
+ select ARM_PATCH_PHYS_VIRT
+ select CLKDEV_LOOKUP
+@@ -650,8 +650,9 @@ config ARCH_SHMOBILE_LEGACY
+ select PM_GENERIC_DOMAINS if PM
+ select SPARSE_IRQ
+ help
+- Support for Renesas's SH-Mobile and R-Mobile ARM platforms using
+- a non-multiplatform kernel.
++ Support for Renesas ARM SoC platforms using a non-multiplatform
++ kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
++ and RZ families.
+
+ config ARCH_RPC
+ bool "RiscPC"
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index bb0837b8c05c..3e57d457308a 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -2,7 +2,7 @@ config ARCH_SHMOBILE
+ bool
+
+ config ARCH_SHMOBILE_MULTI
+- bool "SH-Mobile Series" if ARCH_MULTI_V7
++ bool "Renesas ARM SoCs" if ARCH_MULTI_V7
+ depends on MMU
+ select ARCH_SHMOBILE
+ select CPU_V7
+@@ -19,7 +19,7 @@ config ARCH_SHMOBILE_MULTI
+
+ if ARCH_SHMOBILE_MULTI
+
+-comment "SH-Mobile System Type"
++comment "Renesas ARM SoCs System Type"
+
+ config ARCH_EMEV2
+ bool "Emma Mobile EV2"
+@@ -31,7 +31,7 @@ config ARCH_R8A7791
+ bool "R-Car M2 (R8A77910)"
+ select RENESAS_IRQC
+
+-comment "SH-Mobile Board Type"
++comment "Renesas ARM SoCs Board Type"
+
+ config MACH_GENMAI
+ bool "Genmai board"
+@@ -46,12 +46,12 @@ config MACH_KZM9D
+ depends on ARCH_EMEV2
+ select REGULATOR_FIXED_VOLTAGE if REGULATOR
+
+-comment "SH-Mobile System Configuration"
++comment "Renesas ARM SoCs System Configuration"
+ endif
+
+ if ARCH_SHMOBILE_LEGACY
+
+-comment "SH-Mobile System Type"
++comment "Renesas ARM SoCs System Type"
+
+ config ARCH_SH7372
+ bool "SH-Mobile AP4 (SH7372)"
+@@ -137,7 +137,7 @@ config ARCH_R7S72100
+ select CPU_V7
+ select SH_CLK_CPG
+
+-comment "SH-Mobile Board Type"
++comment "Renesas ARM SoCs Board Type"
+
+ config MACH_APE6EVM
+ bool "APE6EVM board"
+@@ -301,7 +301,7 @@ config MACH_KZM9G_REFERENCE
+
+ This is intended to aid developers
+
+-comment "SH-Mobile System Configuration"
++comment "Renesas ARM SoCs System Configuration"
+
+ config CPU_HAS_INTEVT
+ bool
+@@ -326,8 +326,8 @@ config SHMOBILE_TIMER_HZ
+ Allows the configuration of the timer frequency. It is customary
+ to have the timer interrupt run at 1000 Hz or 100 Hz, but in the
+ case of low timer frequencies other values may be more suitable.
+- SH-Mobile systems using a 32768 Hz RCLK for clock events may want
+- to select a HZ value such as 128 that can evenly divide RCLK.
++ Renesas ARM SoC systems using a 32768 Hz RCLK for clock events may
++ want to select a HZ value such as 128 that can evenly divide RCLK.
+ A HZ value that does not divide evenly may cause timer drift.
+
+ config SH_TIMER_CMT
+--
+1.8.5.rc3
+
--- /dev/null
+From 5e5a3fe11e826e386aecb90e49c082d4f0e3adc9 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 3 Dec 2013 00:07:03 -0800
+Subject: ARM: shmobile: armadillo: fixup FSI address size
+
+FSI address size is 0x400, not 0x8400
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4a4783a30c92a5ee1752d33af3bea2bf79f64197)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-armadillo800eva.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
+index 0c8595413b62..44443a95bd0d 100644
+--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
++++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
+@@ -957,7 +957,7 @@ static struct resource fsi_resources[] = {
+ [0] = {
+ .name = "FSI",
+ .start = 0xfe1f0000,
+- .end = 0xfe1f8400 - 1,
++ .end = 0xfe1f0400 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+--
+1.8.5.rc3
+
--- /dev/null
+From c120fd15116e7c9f10f5ee876efb4e331e3270dc Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 17 Nov 2013 18:51:39 -0800
+Subject: ARM: shmobile: bockw: remove unused RSND_SSI_CLK_FROM_ADG
+
+92eba04e4bcd469518cc759ac1bf1a49acaa5cc1
+(ASoC: rcar: remove RSND_SSI_CLK_FROM_ADG) removed
+RSND_SSI_CLK_FROM_ADG, it is no longer needed
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Mark Brown <broonie@linaro.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c653033bae957ee141b2d27881c22e46ff26c651)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-bockw.c | 4 ++--
+ include/sound/rcar_snd.h | 1 -
+ 2 files changed, 2 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
+index 540f0dc2431a..eb5b54fc5cc9 100644
+--- a/arch/arm/mach-shmobile/board-bockw.c
++++ b/arch/arm/mach-shmobile/board-bockw.c
+@@ -332,11 +332,11 @@ static struct rsnd_ssi_platform_info rsnd_ssi[] = {
+ RSND_SSI_UNUSED, /* SSI 1 */
+ RSND_SSI_UNUSED, /* SSI 2 */
+ RSND_SSI_SET(1, 0, gic_iid(0x85), RSND_SSI_PLAY),
+- RSND_SSI_SET(2, 0, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
++ RSND_SSI_SET(2, 0, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
+ RSND_SSI_SET(0, 0, gic_iid(0x86), RSND_SSI_PLAY),
+ RSND_SSI_SET(0, 0, gic_iid(0x86), 0),
+ RSND_SSI_SET(3, 0, gic_iid(0x86), RSND_SSI_PLAY),
+- RSND_SSI_SET(4, 0, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
++ RSND_SSI_SET(4, 0, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
+ };
+
+ static struct rsnd_scu_platform_info rsnd_scu[9] = {
+diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
+index 12afab18945d..6ce506b09383 100644
+--- a/include/sound/rcar_snd.h
++++ b/include/sound/rcar_snd.h
+@@ -34,7 +34,6 @@
+ * B : SSI direction
+ */
+ #define RSND_SSI_CLK_PIN_SHARE (1 << 31)
+-#define RSND_SSI_CLK_FROM_ADG (1 << 30) /* clock parent is master */
+ #define RSND_SSI_SYNC (1 << 29) /* SSI34_sync etc */
+
+ #define RSND_SSI_PLAY (1 << 24)
+--
+1.8.5.rc3
+
--- /dev/null
+From ad8a62adc230a32701bc209c6a474fb6e3a4a0fa Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 4 Dec 2013 22:11:06 -0800
+Subject: ARM: shmobile: lager: add gpio/fixed regulator for SDHI
+
+Fixed regulator is used for SDHI0/2 Vcc.
+We should use da9063 driver for Vccq,
+but, it doesn't have regulator support at this point.
+This patch uses gpio-regulator for it as quick-hack.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit be0647d556985ae58a42e7fc3751a293c418c41e)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager.c | 83 +++++++++++++++++++++++++++++++++++-
+ 1 file changed, 82 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
+index c43d5ccd21f0..a4a16444cbe7 100644
+--- a/arch/arm/mach-shmobile/board-lager.c
++++ b/arch/arm/mach-shmobile/board-lager.c
+@@ -31,7 +31,9 @@
+ #include <linux/platform_data/rcar-du.h>
+ #include <linux/platform_device.h>
+ #include <linux/phy.h>
++#include <linux/regulator/driver.h>
+ #include <linux/regulator/fixed.h>
++#include <linux/regulator/gpio-regulator.h>
+ #include <linux/regulator/machine.h>
+ #include <linux/sh_eth.h>
+ #include <mach/common.h>
+@@ -146,6 +148,71 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] =
+ REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
+ };
+
++/*
++ * SDHI regulator macro
++ *
++ ** FIXME**
++ * Lager board vqmmc is provided via DA9063 PMIC chip,
++ * and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
++ * but, it doesn't have regulator support at this point.
++ * It uses gpio-regulator for vqmmc as quick-hack.
++ */
++#define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
++static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
++ REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
++ \
++static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
++ .constraints = { \
++ .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
++ }, \
++ .consumer_supplies = &vcc_sdhi##idx##_consumer, \
++ .num_consumer_supplies = 1, \
++}; \
++ \
++static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
++ .supply_name = "SDHI" #idx "Vcc", \
++ .microvolts = 3300000, \
++ .gpio = vdd_pin, \
++ .enable_high = 1, \
++ .init_data = &vcc_sdhi##idx##_init_data, \
++}; \
++ \
++static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
++ REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
++ \
++static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
++ .constraints = { \
++ .input_uV = 3300000, \
++ .min_uV = 1800000, \
++ .max_uV = 3300000, \
++ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
++ REGULATOR_CHANGE_STATUS, \
++ }, \
++ .consumer_supplies = &vccq_sdhi##idx##_consumer, \
++ .num_consumer_supplies = 1, \
++}; \
++ \
++static struct gpio vccq_sdhi##idx##_gpio = \
++ { vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
++ \
++static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
++ { .value = 1800000, .gpios = 0 }, \
++ { .value = 3300000, .gpios = 1 }, \
++}; \
++ \
++static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
++ .supply_name = "vqmmc", \
++ .gpios = &vccq_sdhi##idx##_gpio, \
++ .nr_gpios = 1, \
++ .states = vccq_sdhi##idx##_states, \
++ .nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
++ .type = REGULATOR_VOLTAGE, \
++ .init_data = &vccq_sdhi##idx##_init_data, \
++};
++
++SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
++SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
++
+ /* MMCIF */
+ static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
+ .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
+@@ -256,6 +323,9 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
+
+ static void __init lager_add_standard_devices(void)
+ {
++ int fixed_regulator_idx = 0;
++ int gpio_regulator_idx = 0;
++
+ r8a7790_clock_init();
+
+ pinctrl_register_mappings(lager_pinctrl_map,
+@@ -269,7 +339,8 @@ static void __init lager_add_standard_devices(void)
+ platform_device_register_data(&platform_bus, "gpio-keys", -1,
+ &lager_keys_pdata,
+ sizeof(lager_keys_pdata));
+- regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
++ regulator_register_always_on(fixed_regulator_idx++,
++ "fixed-3.3V", fixed3v3_power_consumers,
+ ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
+ platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
+ mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
+@@ -287,6 +358,16 @@ static void __init lager_add_standard_devices(void)
+ ARRAY_SIZE(qspi_resources),
+ &qspi_pdata, sizeof(qspi_pdata));
+ spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
++
++ platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
++ &vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
++ platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
++ &vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
++
++ platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
++ &vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
++ platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
++ &vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
+ }
+
+ /*
+--
+1.8.5.rc3
+
--- /dev/null
+From 95d9eed5d5323aff9c73fcf40b180b655e32b5ca Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 3 Dec 2013 11:12:24 +0900
+Subject: ARM: shmobile: r8a7778: add SSIx DMAEngine support
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a91be22c9222061281a380bd3f38ec9281919a2c)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/include/mach/r8a7778.h | 18 ++++++++++
+ arch/arm/mach-shmobile/setup-r8a7778.c | 51 +++++++++++++++++++++++++++
+ 2 files changed, 69 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
+index b497f932d04f..a3440e50fafa 100644
+--- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
++++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
+@@ -27,6 +27,24 @@ enum {
+ HPBDMA_SLAVE_DUMMY,
+ HPBDMA_SLAVE_SDHI0_TX,
+ HPBDMA_SLAVE_SDHI0_RX,
++ HPBDMA_SLAVE_SSI0_TX,
++ HPBDMA_SLAVE_SSI0_RX,
++ HPBDMA_SLAVE_SSI1_TX,
++ HPBDMA_SLAVE_SSI1_RX,
++ HPBDMA_SLAVE_SSI2_TX,
++ HPBDMA_SLAVE_SSI2_RX,
++ HPBDMA_SLAVE_SSI3_TX,
++ HPBDMA_SLAVE_SSI3_RX,
++ HPBDMA_SLAVE_SSI4_TX,
++ HPBDMA_SLAVE_SSI4_RX,
++ HPBDMA_SLAVE_SSI5_TX,
++ HPBDMA_SLAVE_SSI5_RX,
++ HPBDMA_SLAVE_SSI6_TX,
++ HPBDMA_SLAVE_SSI6_RX,
++ HPBDMA_SLAVE_SSI7_TX,
++ HPBDMA_SLAVE_SSI7_RX,
++ HPBDMA_SLAVE_SSI8_TX,
++ HPBDMA_SLAVE_SSI8_RX,
+ HPBDMA_SLAVE_HPBIF0_TX,
+ HPBDMA_SLAVE_HPBIF0_RX,
+ HPBDMA_SLAVE_HPBIF1_TX,
+diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
+index 81701cfb6cc6..e786338701cb 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7778.c
++++ b/arch/arm/mach-shmobile/setup-r8a7778.c
+@@ -319,6 +319,29 @@ void __init r8a7778_add_dt_devices(void)
+ #define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE BIT(1) /* SDHI0 */
+ #define HPB_DMAE_ASYNCMDR_ASMD21_MULTI 0 /* SDHI0 */
+
++#define HPBDMA_SSI(_id) \
++{ \
++ .id = HPBDMA_SLAVE_SSI## _id ##_TX, \
++ .addr = 0xffd91008 + (_id * 0x40), \
++ .dcr = HPB_DMAE_DCR_CT | \
++ HPB_DMAE_DCR_DIP | \
++ HPB_DMAE_DCR_SPDS_32BIT | \
++ HPB_DMAE_DCR_DMDL | \
++ HPB_DMAE_DCR_DPDS_32BIT, \
++ .port = _id + (_id << 8), \
++ .dma_ch = (28 + _id), \
++}, { \
++ .id = HPBDMA_SLAVE_SSI## _id ##_RX, \
++ .addr = 0xffd9100c + (_id * 0x40), \
++ .dcr = HPB_DMAE_DCR_CT | \
++ HPB_DMAE_DCR_DIP | \
++ HPB_DMAE_DCR_SMDL | \
++ HPB_DMAE_DCR_SPDS_32BIT | \
++ HPB_DMAE_DCR_DPDS_32BIT, \
++ .port = _id + (_id << 8), \
++ .dma_ch = (28 + _id), \
++}
++
+ #define HPBDMA_HPBIF(_id) \
+ { \
+ .id = HPBDMA_SLAVE_HPBIF## _id ##_TX, \
+@@ -373,6 +396,16 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
+ .dma_ch = 22,
+ },
+
++ HPBDMA_SSI(0),
++ HPBDMA_SSI(1),
++ HPBDMA_SSI(2),
++ HPBDMA_SSI(3),
++ HPBDMA_SSI(4),
++ HPBDMA_SSI(5),
++ HPBDMA_SSI(6),
++ HPBDMA_SSI(7),
++ HPBDMA_SSI(8),
++
+ HPBDMA_HPBIF(0),
+ HPBDMA_HPBIF(1),
+ HPBDMA_HPBIF(2),
+@@ -387,22 +420,40 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
+ static const struct hpb_dmae_channel hpb_dmae_channels[] = {
+ HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
+ HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_TX), /* ch. 28 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_RX), /* ch. 28 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_TX), /* ch. 28 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_RX), /* ch. 28 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI1_TX), /* ch. 29 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI1_RX), /* ch. 29 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_TX), /* ch. 29 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_RX), /* ch. 29 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI2_TX), /* ch. 30 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI2_RX), /* ch. 30 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_TX), /* ch. 30 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_RX), /* ch. 30 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI3_TX), /* ch. 31 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI3_RX), /* ch. 31 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_TX), /* ch. 31 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_RX), /* ch. 31 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI4_TX), /* ch. 32 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI4_RX), /* ch. 32 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_TX), /* ch. 32 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_RX), /* ch. 32 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI5_TX), /* ch. 33 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI5_RX), /* ch. 33 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_TX), /* ch. 33 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_RX), /* ch. 33 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI6_TX), /* ch. 34 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI6_RX), /* ch. 34 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_TX), /* ch. 34 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_RX), /* ch. 34 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI7_TX), /* ch. 35 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI7_RX), /* ch. 35 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_TX), /* ch. 35 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_RX), /* ch. 35 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI8_TX), /* ch. 36 */
++ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI8_RX), /* ch. 36 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_TX), /* ch. 36 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_RX), /* ch. 36 */
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 0b28d499d9a0bfd099e9cecf28f1cfb86c2b89e7 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 28 Nov 2013 19:02:12 -0800
+Subject: ARM: shmobile: r8a7790: add I2C support
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b448c904f5058b6cd35bf1a43ca219dcfeca4da6)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++++
+ arch/arm/mach-shmobile/setup-r8a7790.c | 25 +++++++++++++++++++++++++
+ 2 files changed, 29 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
+index 312376d2cfd1..c5c60ecdec8f 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7790.c
++++ b/arch/arm/mach-shmobile/clock-r8a7790.c
+@@ -292,9 +292,13 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
+ CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
+ CLKDEV_DEV_ID("e6508000.i2c", &mstp_clks[MSTP931]),
++ CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP931]),
+ CLKDEV_DEV_ID("e6518000.i2c", &mstp_clks[MSTP930]),
++ CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP930]),
+ CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP929]),
++ CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP929]),
+ CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
++ CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP928]),
+ CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
+ CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
+ CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
+diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
+index 3543c3bacb75..8474818a7ae0 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7790.c
++++ b/arch/arm/mach-shmobile/setup-r8a7790.c
+@@ -67,6 +67,27 @@ R8A7790_GPIO(5);
+ &r8a7790_gpio##idx##_platform_data, \
+ sizeof(r8a7790_gpio##idx##_platform_data))
+
++static struct resource i2c_resources[] __initdata = {
++ /* I2C0 */
++ DEFINE_RES_MEM(0xE6508000, 0x40),
++ DEFINE_RES_IRQ(gic_spi(287)),
++ /* I2C1 */
++ DEFINE_RES_MEM(0xE6518000, 0x40),
++ DEFINE_RES_IRQ(gic_spi(288)),
++ /* I2C2 */
++ DEFINE_RES_MEM(0xE6530000, 0x40),
++ DEFINE_RES_IRQ(gic_spi(286)),
++ /* I2C3 */
++ DEFINE_RES_MEM(0xE6540000, 0x40),
++ DEFINE_RES_IRQ(gic_spi(290)),
++
++};
++
++#define r8a7790_register_i2c(idx) \
++ platform_device_register_simple( \
++ "i2c-rcar", idx, \
++ i2c_resources + (2 * idx), 2); \
++
+ void __init r8a7790_pinmux_init(void)
+ {
+ r8a7790_register_pfc();
+@@ -76,6 +97,10 @@ void __init r8a7790_pinmux_init(void)
+ r8a7790_register_gpio(3);
+ r8a7790_register_gpio(4);
+ r8a7790_register_gpio(5);
++ r8a7790_register_i2c(0);
++ r8a7790_register_i2c(1);
++ r8a7790_register_i2c(2);
++ r8a7790_register_i2c(3);
+ }
+
+ #define SCIF_COMMON(scif_type, baseaddr, irq) \
+--
+1.8.5.rc3
+
--- /dev/null
+From 1a246cbb50e50c2ec084ef746accc9a98864f4d3 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 4 Dec 2013 17:32:42 -0800
+Subject: ARM: shmobile: sh73a0: add FSI clock support for DT
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e1c98c5db947cbb934b8fb0a2faf5eafd9c035cc)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-sh73a0.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
+index 30d88689a960..23edf8360c27 100644
+--- a/arch/arm/mach-shmobile/clock-sh73a0.c
++++ b/arch/arm/mach-shmobile/clock-sh73a0.c
+@@ -652,6 +652,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
+ CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
+ CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
++ CLKDEV_DEV_ID("ec230000.sound", &mstp_clks[MSTP328]), /* FSI */
+ CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
+ CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
+ CLKDEV_DEV_ID("e6822000.i2c", &mstp_clks[MSTP323]), /* I2C1 */
+--
+1.8.5.rc3
+
--- /dev/null
+From d1651c202d550a2a5c90a6b6fe53e1e3ebe75f77 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 4 Dec 2013 17:32:54 -0800
+Subject: ARM: shmobile: sh73a0: add FSI support via DTSI
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 63b1303d1922f7660bd9e90da56dfbf93134c5aa)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/sh73a0.dtsi | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
+index 241c8cdaeaa1..c460dd229b13 100644
+--- a/arch/arm/boot/dts/sh73a0.dtsi
++++ b/arch/arm/boot/dts/sh73a0.dtsi
+@@ -243,4 +243,13 @@
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
++
++ sh_fsi2: sound@ec230000 {
++ #sound-dai-cells = <1>;
++ compatible = "renesas,sh_fsi2";
++ reg = <0xec230000 0x400>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 146 0x4>;
++ status = "disabled";
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From e2996114f449a3f7ab5336752568ec4d3030492c Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 4 Dec 2013 17:33:10 -0800
+Subject: ARM: shmobile: kzm9g: add FSI support for DTS
+
+This patch support FSI-AK4648 with simple audio card
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3c2a87c85391272b098827e432813c9437e93992)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 33 ++++++++++++++++++++++++++++
+ 1 file changed, 33 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+index 5bb593daab52..eb8886b535e4 100644
+--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
++++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+@@ -152,6 +152,20 @@
+ label = "SW1";
+ };
+ };
++
++ sound {
++ compatible = "simple-audio-card";
++ simple-audio-card,format = "left_j";
++ simple-audio-card,cpu {
++ sound-dai = <&sh_fsi2 0>;
++ };
++ simple-audio-card,codec {
++ sound-dai = <&ak4648>;
++ bitclock-master;
++ frame-master;
++ system-clock-frequency = <11289600>;
++ };
++ };
+ };
+
+ &i2c0 {
+@@ -226,6 +240,12 @@
+ };
+ };
+ };
++
++ ak4648: ak4648@0x12 {
++ #sound-dai-cells = <0>;
++ compatible = "asahi-kasei,ak4648";
++ reg = <0x12>;
++ };
+ };
+
+ &i2c3 {
+@@ -289,6 +309,12 @@
+ renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
+ renesas,function = "sdhi2";
+ };
++
++ fsia_pins: sounda {
++ renesas,groups = "fsia_mclk_in", "fsia_sclk_in",
++ "fsia_data_in", "fsia_data_out";
++ renesas,function = "fsia";
++ };
+ };
+
+ &sdhi0 {
+@@ -309,3 +335,10 @@
+ broken-cd;
+ status = "okay";
+ };
++
++&sh_fsi2 {
++ pinctrl-0 = <&fsia_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
+--
+1.8.5.rc3
+
--- /dev/null
+From f734a5c5a56a1156a516586a9f6f8671f355e23f Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 5 Dec 2013 18:09:30 -0800
+Subject: ARM: shmobile: r8a7778: camera-rcar header cleanup
+
+<linux/platform_data/camera-rcar.h> is needed on BockW,
+not setup-r8a7778.c
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 02d39132e75410633c637be006b9b772a6116da3)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-bockw.c | 1 +
+ arch/arm/mach-shmobile/include/mach/r8a7778.h | 1 -
+ 2 files changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
+index eb5b54fc5cc9..afb3f6869017 100644
+--- a/arch/arm/mach-shmobile/board-bockw.c
++++ b/arch/arm/mach-shmobile/board-bockw.c
+@@ -25,6 +25,7 @@
+ #include <linux/mmc/sh_mmcif.h>
+ #include <linux/mtd/partitions.h>
+ #include <linux/pinctrl/machine.h>
++#include <linux/platform_data/camera-rcar.h>
+ #include <linux/platform_data/usb-rcar-phy.h>
+ #include <linux/platform_device.h>
+ #include <linux/regulator/fixed.h>
+diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
+index a3440e50fafa..72c9d37d377d 100644
+--- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
++++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
+@@ -20,7 +20,6 @@
+ #define __ASM_R8A7778_H__
+
+ #include <linux/sh_eth.h>
+-#include <linux/platform_data/camera-rcar.h>
+
+ /* HPB-DMA slave IDs */
+ enum {
+--
+1.8.5.rc3
+
--- /dev/null
+From 6c7a88df7fc05808051ec1fea0c90f9a1380a174 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sun, 8 Dec 2013 23:50:36 +0300
+Subject: ARM: shmobile: r8a7791: add Ether clock
+
+Add support for R8A7791 Ether clock.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 893c3f0bc55e749124f14b02eee9510147fefd90)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7791.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
+index ff2d60d55bd5..f5461262ee25 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7791.c
++++ b/arch/arm/mach-shmobile/clock-r8a7791.c
+@@ -122,6 +122,7 @@ static struct clk *main_clks[] = {
+
+ /* MSTP */
+ enum {
++ MSTP813,
+ MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
+ MSTP719, MSTP718, MSTP715, MSTP714,
+ MSTP522,
+@@ -132,6 +133,7 @@ enum {
+ };
+
+ static struct clk mstp_clks[MSTP_NR] = {
++ [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
+ [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
+ [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
+ [MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
+@@ -192,6 +194,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+ CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
+ CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
++ CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */
+ };
+
+ #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
+--
+1.8.5.rc3
+
--- /dev/null
+From 01184480450ea56e556eb0fc8dc92afe609ef33c Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sun, 8 Dec 2013 23:54:38 +0300
+Subject: ARM: shmobile: Koelsch: enable Ether in defconfig
+
+Enable the Ether driver in 'koelsch_defconfig' along with DHCP autoconfiguration
+and NFS root.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9b408ca5885a46a0940aaf88be203b595c9aad85)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/koelsch_defconfig | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
+index 7fd65a01ec7e..284846e921c0 100644
+--- a/arch/arm/configs/koelsch_defconfig
++++ b/arch/arm/configs/koelsch_defconfig
+@@ -29,7 +29,27 @@ CONFIG_VFP=y
+ CONFIG_NEON=y
+ # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+ CONFIG_PM_RUNTIME=y
++CONFIG_NET=y
++CONFIG_INET=y
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
+ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_NETDEVICES=y
++# CONFIG_NET_VENDOR_ARC is not set
++# CONFIG_NET_CADENCE is not set
++# CONFIG_NET_VENDOR_BROADCOM is not set
++# CONFIG_NET_VENDOR_CIRRUS is not set
++# CONFIG_NET_VENDOR_FARADAY is not set
++# CONFIG_NET_VENDOR_INTEL is not set
++# CONFIG_NET_VENDOR_MARVELL is not set
++# CONFIG_NET_VENDOR_MICREL is not set
++# CONFIG_NET_VENDOR_NATSEMI is not set
++CONFIG_SH_ETH=y
++# CONFIG_NET_VENDOR_SEEQ is not set
++# CONFIG_NET_VENDOR_SMSC is not set
++# CONFIG_NET_VENDOR_STMICRO is not set
++# CONFIG_NET_VENDOR_VIA is not set
++# CONFIG_NET_VENDOR_WIZNET is not set
+ # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+ # CONFIG_INPUT_MOUSE is not set
+ # CONFIG_LEGACY_PTYS is not set
+@@ -49,6 +69,8 @@ CONFIG_LEDS_CLASS=y
+ CONFIG_TMPFS=y
+ CONFIG_CONFIGFS_FS=y
+ # CONFIG_MISC_FILESYSTEMS is not set
++CONFIG_NFS_FS=y
++CONFIG_ROOT_NFS=y
+ # CONFIG_ENABLE_WARN_DEPRECATED is not set
+ # CONFIG_ENABLE_MUST_CHECK is not set
+ # CONFIG_ARM_UNWIND is not set
+--
+1.8.5.rc3
+
--- /dev/null
+From f7568b60a5334eb69c5252c5df52c1311980afe9 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 9 Dec 2013 18:34:45 -0800
+Subject: ARM: shmobile: remove unnecessary platform_device as header cleanup
+
+8e0e7aaef3c98c52e85f5640b73ffa82058abcfd
+(ARM: shmobile: Drop r8a7779_add_device_to_domain())
+removed last user of struct platform_device on this header.
+It is no longer needed
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2eb7a8146f5ab5be7cde42438e32461f313d0d0b)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/include/mach/r8a7779.h | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
+index 5014145f272e..b40e13631f6a 100644
+--- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
++++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
+@@ -11,8 +11,6 @@ enum {
+ HPBDMA_SLAVE_SDHI0_RX,
+ };
+
+-struct platform_device;
+-
+ struct r8a7779_pm_ch {
+ unsigned long chan_offs;
+ unsigned int chan_bit;
+--
+1.8.5.rc3
+
--- /dev/null
+From 31a43c81c92255bdaec63e83812042b2f16d77ef Mon Sep 17 00:00:00 2001
+From: Ben Dooks <ben.dooks@codethink.co.uk>
+Date: Wed, 11 Dec 2013 10:07:42 +0000
+Subject: ARM: rcar-gen2: Do not setup timer in non-secure mode
+
+If the system has been started in non-secure mode, then the ARM generic
+timer is not configurable during the kernel initialisation. Currently
+the only thing we can check for is if the timer has been correctly
+configured during the boot process.
+
+Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
+Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 0fe35077a92ce45acfa2b7259bba516757fb0c3f)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-rcar-gen2.c | 21 ++++++++++++++++-----
+ 1 file changed, 16 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
+index 5734c24bf6c7..b6275ab6085c 100644
+--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
++++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
+@@ -78,12 +78,23 @@ void __init rcar_gen2_timer_init(void)
+ /* Remap "armgcnt address map" space */
+ base = ioremap(0xe6080000, PAGE_SIZE);
+
+- /* Update registers with correct frequency */
+- iowrite32(freq, base + CNTFID0);
+- asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
++ /*
++ * Update the timer if it is either not running, or is not at the
++ * right frequency. The timer is only configurable in secure mode
++ * so this avoids an abort if the loader started the timer and
++ * entered the kernel in non-secure mode.
++ */
++
++ if ((ioread32(base + CNTCR) & 1) == 0 ||
++ ioread32(base + CNTFID0) != freq) {
++ /* Update registers with correct frequency */
++ iowrite32(freq, base + CNTFID0);
++ asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
++
++ /* make sure arch timer is started by setting bit 0 of CNTCR */
++ iowrite32(1, base + CNTCR);
++ }
+
+- /* make sure arch timer is started by setting bit 0 of CNTCR */
+- iowrite32(1, base + CNTCR);
+ iounmap(base);
+ #endif /* CONFIG_ARM_ARCH_TIMER */
+
+--
+1.8.5.rc3
+
--- /dev/null
+From d0e44c4ec5cfeb89e0d0ddb9fe789984258532ef Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 10 Dec 2013 16:51:04 -0800
+Subject: ARM: shmobile: r8a7778: add USB Func DMAEngine support
+
+HPB-DMAC has 2 channel for USB Func (= D0/D1)
+D0 is used as Tx, D1 is used as Rx on this patch
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit aa9938644c63100219c252b9d330b95427082cef)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/include/mach/r8a7778.h | 2 ++
+ arch/arm/mach-shmobile/setup-r8a7778.c | 18 ++++++++++++++++++
+ 2 files changed, 20 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
+index 72c9d37d377d..f4076a50e970 100644
+--- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
++++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
+@@ -62,6 +62,8 @@ enum {
+ HPBDMA_SLAVE_HPBIF7_RX,
+ HPBDMA_SLAVE_HPBIF8_TX,
+ HPBDMA_SLAVE_HPBIF8_RX,
++ HPBDMA_SLAVE_USBFUNC_TX,
++ HPBDMA_SLAVE_USBFUNC_RX,
+ };
+
+ extern void r8a7778_add_standard_devices(void);
+diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
+index e786338701cb..7ea6308e5da8 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7778.c
++++ b/arch/arm/mach-shmobile/setup-r8a7778.c
+@@ -394,6 +394,22 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
+ .port = 0x0D0C,
+ .flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
+ .dma_ch = 22,
++ }, {
++ .id = HPBDMA_SLAVE_USBFUNC_TX, /* for D0 */
++ .addr = 0xffe60018,
++ .dcr = HPB_DMAE_DCR_SPDS_32BIT |
++ HPB_DMAE_DCR_DMDL |
++ HPB_DMAE_DCR_DPDS_32BIT,
++ .port = 0x0000,
++ .dma_ch = 14,
++ }, {
++ .id = HPBDMA_SLAVE_USBFUNC_RX, /* for D1 */
++ .addr = 0xffe6001c,
++ .dcr = HPB_DMAE_DCR_SMDL |
++ HPB_DMAE_DCR_SPDS_32BIT |
++ HPB_DMAE_DCR_DPDS_32BIT,
++ .port = 0x0101,
++ .dma_ch = 15,
+ },
+
+ HPBDMA_SSI(0),
+@@ -418,6 +434,8 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
+ };
+
+ static const struct hpb_dmae_channel hpb_dmae_channels[] = {
++ HPB_DMAE_CHANNEL(0x7c, HPBDMA_SLAVE_USBFUNC_TX), /* ch. 14 */
++ HPB_DMAE_CHANNEL(0x7c, HPBDMA_SLAVE_USBFUNC_RX), /* ch. 15 */
+ HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
+ HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
+ HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_TX), /* ch. 28 */
+--
+1.8.5.rc3
+
--- /dev/null
+From 22415582bef39e6df8565f859757a90e44efaac9 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 16:42:51 +0100
+Subject: ARM: shmobile: koelsch: dts: Add gpio-keys device
+
+The board has 7 buttons connected to GPIOs, add a corresponding
+gpio-keys device.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bd0609896eabe2e64b75d7955ae5ecec528cf860)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch-reference.dts | 54 +++++++++++++++++++++++++
+ 1 file changed, 54 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
+index 19192731c24a..588ca17ea1f0 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
+@@ -31,6 +31,60 @@
+ #size-cells = <1>;
+ };
+
++ gpio-keys {
++ compatible = "gpio-keys";
++
++ key-a {
++ gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
++ linux,code = <30>;
++ label = "SW30";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-b {
++ gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
++ linux,code = <48>;
++ label = "SW31";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-c {
++ gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
++ linux,code = <46>;
++ label = "SW32";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-d {
++ gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
++ linux,code = <32>;
++ label = "SW33";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-e {
++ gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
++ linux,code = <18>;
++ label = "SW34";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-f {
++ gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
++ linux,code = <33>;
++ label = "SW35";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-g {
++ gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
++ linux,code = <34>;
++ label = "SW36";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ };
++
+ leds {
+ compatible = "gpio-leds";
+ led6 {
+--
+1.8.5.rc3
+
--- /dev/null
+From 7cd055f763995e7de8045d3ab28a51f466a0a043 Mon Sep 17 00:00:00 2001
+From: Ben Dooks <ben.dooks@codethink.co.uk>
+Date: Thu, 12 Dec 2013 18:14:21 +0000
+Subject: ARM: shmobile: Add select MIGHT_HAVE_PCI for PCI-AHB bridge code
+
+The PCI sub-system is not enabled by default on ARM and on certain
+Renesas devices the build does not select it. This means that there
+are configurations that do not allow the AHB-PCI bridge used for the
+USB sub-systems to be built.
+
+For the R8A7790, R8A7791 and EMEV-2 select MIGHT_HAVE_PCI to allow the
+PCI drivers to be built. Also select MIGHT_HAVE_PCI for the multi-config
+where there may be many Reneasas devices selected.
+
+Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
+Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7e429989b68533ee3896c96264a1cce99b95d218)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index 3e57d457308a..f01e8787a41a 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -12,6 +12,7 @@ config ARCH_SHMOBILE_MULTI
+ select HAVE_SMP
+ select ARM_GIC
+ select MIGHT_HAVE_CACHE_L2X0
++ select MIGHT_HAVE_PCI
+ select NO_IOPORT
+ select PINCTRL
+ select ARCH_REQUIRE_GPIOLIB
+@@ -111,6 +112,7 @@ config ARCH_R8A7790
+ select ARCH_WANT_OPTIONAL_GPIOLIB
+ select ARM_GIC
+ select CPU_V7
++ select MIGHT_HAVE_PCI
+ select SH_CLK_CPG
+ select RENESAS_IRQC
+
+@@ -119,6 +121,7 @@ config ARCH_R8A7791
+ select ARCH_WANT_OPTIONAL_GPIOLIB
+ select ARM_GIC
+ select CPU_V7
++ select MIGHT_HAVE_PCI
+ select SH_CLK_CPG
+ select RENESAS_IRQC
+
+@@ -127,6 +130,7 @@ config ARCH_EMEV2
+ select ARCH_WANT_OPTIONAL_GPIOLIB
+ select ARM_GIC
+ select CPU_V7
++ select MIGHT_HAVE_PCI
+ select USE_OF
+ select AUTO_ZRELADDR
+
+--
+1.8.5.rc3
+
--- /dev/null
+From b309b76c0ccd8add6974ca3b6cc23991bda76a8d Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 18 Dec 2013 15:03:23 +0100
+Subject: ARM: shmobile: armadillo800eva: Enable backlight control in defconfig
+
+The backlight is controlled by a PWM signal generated by the TPU.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 924370cb4d643d538b6a85bedfb8c861fa623260)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/armadillo800eva_defconfig | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig
+index 5abf1a2e3160..9287a62de830 100644
+--- a/arch/arm/configs/armadillo800eva_defconfig
++++ b/arch/arm/configs/armadillo800eva_defconfig
+@@ -105,6 +105,7 @@ CONFIG_FB=y
+ CONFIG_FB_SH_MOBILE_LCDC=y
+ CONFIG_FB_SH_MOBILE_HDMI=y
+ CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_BACKLIGHT_PWM=y
+ CONFIG_FRAMEBUFFER_CONSOLE=y
+ CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+ CONFIG_LOGO=y
+@@ -130,6 +131,8 @@ CONFIG_DMADEVICES=y
+ CONFIG_SH_DMAE=y
+ CONFIG_UIO=y
+ CONFIG_UIO_PDRV_GENIRQ=y
++CONFIG_PWM=y
++CONFIG_PWM_RENESAS_TPU=y
+ # CONFIG_DNOTIFY is not set
+ CONFIG_MSDOS_FS=y
+ CONFIG_VFAT_FS=y
+--
+1.8.5.rc3
+
--- /dev/null
+From 244855c34684ab0c9857bfb7101167f2973dad8c Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 03:48:15 +0100
+Subject: ARM: shmobile: armadillo: Add PWM backlight power supply
+
+Commit 22ceeee16eb8f0d04de3ef43a5174fb30ec18af9 ("pwm-backlight: Add
+power supply support") added a mandatory power supply for the PWM
+backlight. Add a fixed 5V regulator to board code with a consumer supply
+entry for the backlight device.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ad11cb9a5cf96346f1240995c672cdbb5501785c)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9fb444f22f09cfad3798e3610f7dc62f8a385ee8)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-armadillo800eva.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
+index 44443a95bd0d..c1e3a3bb2da6 100644
+--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
++++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
+@@ -613,6 +613,11 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] = {
+ REGULATOR_SUPPLY("vqmmc", "sh_mmcif"),
+ };
+
++/* Fixed 3.3V regulator used by LCD backlight */
++static struct regulator_consumer_supply fixed5v0_power_consumers[] = {
++ REGULATOR_SUPPLY("power", "pwm-backlight.0"),
++};
++
+ /* Fixed 3.3V regulator to be used by SDHI0 */
+ static struct regulator_consumer_supply vcc_sdhi0_consumers[] = {
+ REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
+@@ -1195,6 +1200,8 @@ static void __init eva_init(void)
+
+ regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
+ ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
++ regulator_register_always_on(3, "fixed-5.0V", fixed5v0_power_consumers,
++ ARRAY_SIZE(fixed5v0_power_consumers), 5000000);
+
+ pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
+ pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
+--
+1.8.5.rc3
+
--- /dev/null
+From ab57aa64bf995c4818b243e5911d477c8b59d980 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:13:51 +0100
+Subject: ARM: shmobile: rcar-gen2: Initialize CCF before clock sources
+
+When CONFIG_COMMON_CLOCK is enabled, call rcar_gen2_clocks_init() in the
+timer init function to initialize the common clock framework before
+initializing the clock sources. This will take care of clock
+initialization when the r8a779[01] boards will be switched to
+multiplatform kernels.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4b5c211f9f93c3919f23c88d808a4eda104ec8b2)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-rcar-gen2.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
+index b6275ab6085c..69ccc6c6fd33 100644
+--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
++++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
+@@ -18,6 +18,7 @@
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
++#include <linux/clk/shmobile.h>
+ #include <linux/clocksource.h>
+ #include <linux/io.h>
+ #include <linux/kernel.h>
+@@ -44,8 +45,10 @@ u32 __init rcar_gen2_read_mode_pins(void)
+
+ void __init rcar_gen2_timer_init(void)
+ {
+-#ifdef CONFIG_ARM_ARCH_TIMER
++#if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK)
+ u32 mode = rcar_gen2_read_mode_pins();
++#endif
++#ifdef CONFIG_ARM_ARCH_TIMER
+ void __iomem *base;
+ int extal_mhz = 0;
+ u32 freq;
+@@ -98,5 +101,8 @@ void __init rcar_gen2_timer_init(void)
+ iounmap(base);
+ #endif /* CONFIG_ARM_ARCH_TIMER */
+
++#ifdef CONFIG_COMMON_CLK
++ rcar_gen2_clocks_init(mode);
++#endif
+ clocksource_of_init();
+ }
+--
+1.8.5.rc3
+
--- /dev/null
+From 6c56c3b8599b61bb934c18e4596f8959ee707e99 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 12 Dec 2013 21:35:43 +0900
+Subject: ARM: shmobile: koelsch: Conditionally select MICREL_PHY
+
+The koelsch board uses has an SH ethernet controller which uses a Micrel
+phy. Select MICREL_PHY for koelsch if SH_ETH is enabled to make use of the
+Micrel-specific phy driver rather than relying on the generic phy driver.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8967136000668e10743758c84ddd39556b01cd57)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index f01e8787a41a..cd89d6348e0e 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -269,6 +269,7 @@ config MACH_KOELSCH
+ bool "Koelsch board"
+ depends on ARCH_R8A7791
+ select USE_OF
++ select MICREL_PHY if SH_ETH
+
+ config MACH_KOELSCH_REFERENCE
+ bool "Koelsch board - Reference Device Tree Implementation"
+--
+1.8.5.rc3
+
--- /dev/null
+From 5aa98b1f072c75ebbf57b5178b54c9a023a7c404 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Mon, 16 Dec 2013 09:34:08 +0900
+Subject: ARM: shmobile: koelsch: Enable CONFIG_PACKET in defconfig
+
+CONFIG_PACKET is required for the ISC dhcpd daemon function.
+This change brings the koelsch defconfig into line with
+other shmobile defconfigs.
+
+Signed-off-by: Simon Horman <horms@verge.net.au>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5dfdf53358ae64c234d85ad801294054150dae76)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/koelsch_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
+index 284846e921c0..4971acdf31a4 100644
+--- a/arch/arm/configs/koelsch_defconfig
++++ b/arch/arm/configs/koelsch_defconfig
+@@ -30,6 +30,7 @@ CONFIG_NEON=y
+ # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+ CONFIG_PM_RUNTIME=y
+ CONFIG_NET=y
++CONFIG_PACKET=y
+ CONFIG_INET=y
+ CONFIG_IP_PNP=y
+ CONFIG_IP_PNP_DHCP=y
+--
+1.8.5.rc3
+
--- /dev/null
+From a978314b9b756476fd9da4cf55cfc1081d8992b9 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Mon, 16 Dec 2013 09:34:09 +0900
+Subject: ARM: shmobile: koelsch: Do not disable CONFIG_{INOTIFY_USER,UNIX} in
+ defconfig
+
+CONFIG_INOTIFY_USER and CONFIG_UNIX are required for udev to function.
+This change brings the koelsch defconfig into line with
+other shmobile defconfigs.
+
+Signed-off-by: Simon Horman <horms@verge.net.au>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 559cec66f1a2620bc85bb79191512a569a404cb8)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/koelsch_defconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
+index 4971acdf31a4..e248f49d5549 100644
+--- a/arch/arm/configs/koelsch_defconfig
++++ b/arch/arm/configs/koelsch_defconfig
+@@ -31,6 +31,7 @@ CONFIG_NEON=y
+ CONFIG_PM_RUNTIME=y
+ CONFIG_NET=y
+ CONFIG_PACKET=y
++CONFIG_UNIX=y
+ CONFIG_INET=y
+ CONFIG_IP_PNP=y
+ CONFIG_IP_PNP_DHCP=y
+@@ -66,7 +67,6 @@ CONFIG_NEW_LEDS=y
+ CONFIG_LEDS_CLASS=y
+ # CONFIG_IOMMU_SUPPORT is not set
+ # CONFIG_DNOTIFY is not set
+-# CONFIG_INOTIFY_USER is not set
+ CONFIG_TMPFS=y
+ CONFIG_CONFIGFS_FS=y
+ # CONFIG_MISC_FILESYSTEMS is not set
+--
+1.8.5.rc3
+
--- /dev/null
+From 1bed9104a4d1dd7376f2503ba6cd9df8ce11c2b8 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 16 Dec 2013 00:16:52 -0800
+Subject: ARM: shmobile: bockw: fixup DMA mask
+
+4dcfa60071b3d23f0181f27d8519f12e37cefbb9
+(ARM: DMA-API: better handing of DMA masks for coherent allocations)
+exchanged DMA mask check method.
+Below warning will appear without this patch
+
+asoc-simple-card asoc-simple-card.0: \
+ Coherent DMA mask 0xffffffffffffffff is larger than dma_addr_t allows
+asoc-simple-card asoc-simple-card.0: \
+ Driver did not use or check the return value from dma_set_coherent_mask()?
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4799e310caf0fb9078389766d0210d1c6133ad51)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-bockw.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
+index afb3f6869017..c475220545f2 100644
+--- a/arch/arm/mach-shmobile/board-bockw.c
++++ b/arch/arm/mach-shmobile/board-bockw.c
+@@ -685,7 +685,7 @@ static void __init bockw_init(void)
+ .id = i,
+ .data = &rsnd_card_info[i],
+ .size_data = sizeof(struct asoc_simple_card_info),
+- .dma_mask = ~0,
++ .dma_mask = DMA_BIT_MASK(32),
+ };
+
+ platform_device_register_full(&cardinfo);
+--
+1.8.5.rc3
+
--- /dev/null
+From 61b695b5f120bf2c75af557e40ccc6352ad89266 Mon Sep 17 00:00:00 2001
+From: Ben Dooks <ben.dooks@codethink.co.uk>
+Date: Mon, 16 Dec 2013 12:38:48 +0000
+Subject: ARM: shmobile: r8a7790: fix shdi resource sizes
+
+The r8a7790.dtsi file has four sdhi nodes which the first two have the wrong
+resource size for their register block. This causes the sh_modbile_sdhi driver
+to fail to communicate with card at-all.
+
+Change sdhi{0,1} node size from 0x100 to 0x200 to correct these nodes
+as per Kuninori Morimoto's response to the original patch where all four
+nodes where changed. sdhi{2,3} are the correct size.
+
+This bug has been present since sdhi resources were added to the r8a7790 by
+8c9b1aa41853272a ("ARM: shmobile: r8a7790: add MMCIF and SDHI DT
+templates") in v3.11-rc2.
+
+Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
+Tested-by: William Towle <william.towle@codethink.co.uk>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d721a15c300c5f638a11573a6dd492158e737d6a)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 68b7b87e535f..c6001032d9a7 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -254,7 +254,7 @@
+
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7790";
+- reg = <0 0xee100000 0 0x100>;
++ reg = <0 0xee100000 0 0x200>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+@@ -263,7 +263,7 @@
+
+ sdhi1: sd@ee120000 {
+ compatible = "renesas,sdhi-r8a7790";
+- reg = <0 0xee120000 0 0x100>;
++ reg = <0 0xee120000 0 0x200>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+--
+1.8.5.rc3
+
--- /dev/null
+From 8084952c6b958fdeea0080734456dc240e8c66e5 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@the-dreams.de>
+Date: Wed, 18 Dec 2013 22:48:37 +0100
+Subject: arm: shmobile: clks: remove duplicated clock from r7s72100
+
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 250d829f68ecb5e775a99deb03c56832acec28f4)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r7s72100.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
+index 7b457aed8253..0814a508fd61 100644
+--- a/arch/arm/mach-shmobile/clock-r7s72100.c
++++ b/arch/arm/mach-shmobile/clock-r7s72100.c
+@@ -181,7 +181,6 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
+- CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
+ };
+
+ void __init r7s72100_clock_init(void)
+--
+1.8.5.rc3
+
--- /dev/null
+From c6e22945076f8351149ccdc9470aabaa72e50531 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 7 Dec 2013 02:17:44 +0100
+Subject: ARM: shmobile: koelsch: Add DU device
+
+Only the LVDS output is currently supported.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 784c33a0c9b509f09cb69bc93f3863ed20338462)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch.c | 63 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 63 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
+index 6e12914d6d58..5d84fb6f3c5c 100644
+--- a/arch/arm/mach-shmobile/board-koelsch.c
++++ b/arch/arm/mach-shmobile/board-koelsch.c
+@@ -19,6 +19,7 @@
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
++#include <linux/dma-mapping.h>
+ #include <linux/gpio.h>
+ #include <linux/gpio_keys.h>
+ #include <linux/input.h>
+@@ -26,13 +27,66 @@
+ #include <linux/leds.h>
+ #include <linux/pinctrl/machine.h>
+ #include <linux/platform_data/gpio-rcar.h>
++#include <linux/platform_data/rcar-du.h>
+ #include <linux/platform_device.h>
+ #include <mach/common.h>
++#include <mach/irqs.h>
+ #include <mach/r8a7791.h>
+ #include <mach/rcar-gen2.h>
+ #include <asm/mach-types.h>
+ #include <asm/mach/arch.h>
+
++/* DU */
++static struct rcar_du_encoder_data koelsch_du_encoders[] = {
++ {
++ .type = RCAR_DU_ENCODER_NONE,
++ .output = RCAR_DU_OUTPUT_LVDS0,
++ .connector.lvds.panel = {
++ .width_mm = 210,
++ .height_mm = 158,
++ .mode = {
++ .clock = 65000,
++ .hdisplay = 1024,
++ .hsync_start = 1048,
++ .hsync_end = 1184,
++ .htotal = 1344,
++ .vdisplay = 768,
++ .vsync_start = 771,
++ .vsync_end = 777,
++ .vtotal = 806,
++ .flags = 0,
++ },
++ },
++ },
++};
++
++static const struct rcar_du_platform_data koelsch_du_pdata __initconst = {
++ .encoders = koelsch_du_encoders,
++ .num_encoders = ARRAY_SIZE(koelsch_du_encoders),
++};
++
++static const struct resource du_resources[] __initconst = {
++ DEFINE_RES_MEM(0xfeb00000, 0x40000),
++ DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
++ DEFINE_RES_IRQ(gic_spi(256)),
++ DEFINE_RES_IRQ(gic_spi(268)),
++};
++
++static void __init koelsch_add_du_device(void)
++{
++ struct platform_device_info info = {
++ .name = "rcar-du-r8a7791",
++ .id = -1,
++ .res = du_resources,
++ .num_res = ARRAY_SIZE(du_resources),
++ .data = &koelsch_du_pdata,
++ .size_data = sizeof(koelsch_du_pdata),
++ .dma_mask = DMA_BIT_MASK(32),
++ };
++
++ platform_device_register_full(&info);
++}
++
+ /* LEDS */
+ static struct gpio_led koelsch_leds[] = {
+ {
+@@ -80,6 +134,13 @@ static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
+ };
+
+ static const struct pinctrl_map koelsch_pinctrl_map[] = {
++ /* DU */
++ PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
++ "du_rgb666", "du"),
++ PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
++ "du_sync", "du"),
++ PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
++ "du_clk_out_0", "du"),
+ /* SCIF0 (CN19: DEBUG SERIAL0) */
+ PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7791",
+ "scif0_data_d", "scif0"),
+@@ -101,6 +162,8 @@ static void __init koelsch_add_standard_devices(void)
+ platform_device_register_data(&platform_bus, "gpio-keys", -1,
+ &koelsch_keys_pdata,
+ sizeof(koelsch_keys_pdata));
++
++ koelsch_add_du_device();
+ }
+
+ static const char * const koelsch_boards_compat_dt[] __initconst = {
+--
+1.8.5.rc3
+
--- /dev/null
+From 47aac85b89e09dc052ee966973a1ae7ca8e4c270 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sun, 8 Dec 2013 23:52:44 +0300
+Subject: ARM: shmobile: Koelsch: add Ether support
+
+Register Ether platform device and pin data on the Koelsch board.
+Register platform fixup for Micrel KSZ8041 PHY, just like on the Lager board.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 974faba70550409049ee349939f4479ad98908ae)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch.c | 56 +++++++++++++++++++++++++++++++++-
+ 1 file changed, 55 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
+index 5d84fb6f3c5c..de7cc64b1f37 100644
+--- a/arch/arm/mach-shmobile/board-koelsch.c
++++ b/arch/arm/mach-shmobile/board-koelsch.c
+@@ -25,10 +25,12 @@
+ #include <linux/input.h>
+ #include <linux/kernel.h>
+ #include <linux/leds.h>
++#include <linux/phy.h>
+ #include <linux/pinctrl/machine.h>
+ #include <linux/platform_data/gpio-rcar.h>
+ #include <linux/platform_data/rcar-du.h>
+ #include <linux/platform_device.h>
++#include <linux/sh_eth.h>
+ #include <mach/common.h>
+ #include <mach/irqs.h>
+ #include <mach/r8a7791.h>
+@@ -87,6 +89,19 @@ static void __init koelsch_add_du_device(void)
+ platform_device_register_full(&info);
+ }
+
++/* Ether */
++static const struct sh_eth_plat_data ether_pdata __initconst = {
++ .phy = 0x1,
++ .edmac_endian = EDMAC_LITTLE_ENDIAN,
++ .phy_interface = PHY_INTERFACE_MODE_RMII,
++ .ether_link_active_low = 1,
++};
++
++static const struct resource ether_resources[] __initconst = {
++ DEFINE_RES_MEM(0xee700000, 0x400),
++ DEFINE_RES_IRQ(gic_spi(162)),
++};
++
+ /* LEDS */
+ static struct gpio_led koelsch_leds[] = {
+ {
+@@ -141,6 +156,15 @@ static const struct pinctrl_map koelsch_pinctrl_map[] = {
+ "du_sync", "du"),
+ PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
+ "du_clk_out_0", "du"),
++ /* Ether */
++ PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
++ "eth_link", "eth"),
++ PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
++ "eth_mdio", "eth"),
++ PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
++ "eth_rmii", "eth"),
++ PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
++ "intc_irq0", "intc"),
+ /* SCIF0 (CN19: DEBUG SERIAL0) */
+ PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7791",
+ "scif0_data_d", "scif0"),
+@@ -156,6 +180,10 @@ static void __init koelsch_add_standard_devices(void)
+ ARRAY_SIZE(koelsch_pinctrl_map));
+ r8a7791_pinmux_init();
+ r8a7791_add_standard_devices();
++ platform_device_register_resndata(&platform_bus, "r8a7791-ether", -1,
++ ether_resources,
++ ARRAY_SIZE(ether_resources),
++ ðer_pdata, sizeof(ether_pdata));
+ platform_device_register_data(&platform_bus, "leds-gpio", -1,
+ &koelsch_leds_pdata,
+ sizeof(koelsch_leds_pdata));
+@@ -166,6 +194,32 @@ static void __init koelsch_add_standard_devices(void)
+ koelsch_add_du_device();
+ }
+
++/*
++ * Ether LEDs on the Koelsch board are named LINK and ACTIVE which corresponds
++ * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
++ * 14-15. We have to set them back to 01 from the default 00 value each time
++ * the PHY is reset. It's also important because the PHY's LED0 signal is
++ * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
++ * bounce on and off after each packet, which we apparently want to avoid.
++ */
++static int koelsch_ksz8041_fixup(struct phy_device *phydev)
++{
++ u16 phyctrl1 = phy_read(phydev, 0x1e);
++
++ phyctrl1 &= ~0xc000;
++ phyctrl1 |= 0x4000;
++ return phy_write(phydev, 0x1e, phyctrl1);
++}
++
++static void __init koelsch_init(void)
++{
++ koelsch_add_standard_devices();
++
++ if (IS_ENABLED(CONFIG_PHYLIB))
++ phy_register_fixup_for_id("r8a7791-ether-ff:01",
++ koelsch_ksz8041_fixup);
++}
++
+ static const char * const koelsch_boards_compat_dt[] __initconst = {
+ "renesas,koelsch",
+ NULL,
+@@ -175,7 +229,7 @@ DT_MACHINE_START(KOELSCH_DT, "koelsch")
+ .smp = smp_ops(r8a7791_smp_ops),
+ .init_early = r8a7791_init_early,
+ .init_time = rcar_gen2_timer_init,
+- .init_machine = koelsch_add_standard_devices,
++ .init_machine = koelsch_init,
+ .init_late = shmobile_init_late,
+ .dt_compat = koelsch_boards_compat_dt,
+ MACHINE_END
+--
+1.8.5.rc3
+
--- /dev/null
+From 4e6b0d3d1b2ab62b81f1550f0d75526d9d4bbd91 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 03:48:16 +0100
+Subject: ARM: shmobile: armadillo: Set backlight enable GPIO
+
+The Armadillo 800 EVA panel module has a backlight enable signal
+connected to GPIO 61. Instead of requesting the GPIO in board code and
+setting it to a high level unconditionally, pass the GPIO number to the
+PWM backlight driver as the backlight enable GPIO.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9a3beb04ec32cab91a8e562ae068433387b84547)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-armadillo800eva.c | 5 +----
+ 1 file changed, 1 insertion(+), 4 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
+index c1e3a3bb2da6..d7513bc6d4ea 100644
+--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
++++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
+@@ -422,7 +422,7 @@ static struct platform_pwm_backlight_data pwm_backlight_data = {
+ .max_brightness = 255,
+ .dft_brightness = 255,
+ .pwm_period_ns = 33333, /* 30kHz */
+- .enable_gpio = -1,
++ .enable_gpio = 61,
+ };
+
+ static struct platform_device pwm_backlight_device = {
+@@ -1209,9 +1209,6 @@ static void __init eva_init(void)
+ r8a7740_pinmux_init();
+ r8a7740_meram_workaround();
+
+- /* LCDC0 */
+- gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
+-
+ /* GETHER */
+ gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 0431d7f6ef6fb03776ad5a604e2bc2bc6caa6923 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:13:52 +0100
+Subject: ARM: shmobile: lager-reference: Enable multiplaform kernel support
+
+Enable multiplaform ARM architecture support for the Lager reference
+board. Common clock framework initialization will be handled by the
+rcar_gen2_init_timer() call, we just need to remove the legacy clock
+code initialization.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 0ef3cde4d906041a497bfc585568a45ae84b4a8f)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/mach-shmobile/Kconfig | 8 ++++++++
+ arch/arm/mach-shmobile/Makefile | 1 +
+ arch/arm/mach-shmobile/board-lager-reference.c | 2 ++
+ 4 files changed, 12 insertions(+)
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 0eadc1af789b..bf100833943f 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -178,6 +178,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
+ sh7372-mackerel.dtb
+ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
+ r7s72100-genmai-reference.dtb \
++ r8a7790-lager-reference.dtb \
+ r8a7791-koelsch-reference.dtb
+ dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
+ socfpga_vt.dtb
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index cd89d6348e0e..e7033a858429 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -28,6 +28,10 @@ config ARCH_EMEV2
+ config ARCH_R7S72100
+ bool "RZ/A1H (R7S72100)"
+
++config ARCH_R8A7790
++ bool "R-Car H2 (R8A77900)"
++ select RENESAS_IRQC
++
+ config ARCH_R8A7791
+ bool "R-Car M2 (R8A77910)"
+ select RENESAS_IRQC
+@@ -47,6 +51,10 @@ config MACH_KZM9D
+ depends on ARCH_EMEV2
+ select REGULATOR_FIXED_VOLTAGE if REGULATOR
+
++config MACH_LAGER
++ bool "Lager board"
++ depends on ARCH_R8A7790
++
+ comment "Renesas ARM SoCs System Configuration"
+ endif
+
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index 1c131046dec6..9daa9c16e681 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -59,6 +59,7 @@ ifdef CONFIG_ARCH_SHMOBILE_MULTI
+ obj-$(CONFIG_MACH_GENMAI) += board-genmai-reference.o
+ obj-$(CONFIG_MACH_KOELSCH) += board-koelsch-reference.o
+ obj-$(CONFIG_MACH_KZM9D) += board-kzm9d-reference.o
++obj-$(CONFIG_MACH_LAGER) += board-lager-reference.o
+ else
+ obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
+ obj-$(CONFIG_MACH_APE6EVM_REFERENCE) += board-ape6evm-reference.o
+diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
+index 51a3bcc704e5..fc43f7ce6577 100644
+--- a/arch/arm/mach-shmobile/board-lager-reference.c
++++ b/arch/arm/mach-shmobile/board-lager-reference.c
+@@ -27,7 +27,9 @@
+
+ static void __init lager_add_standard_devices(void)
+ {
++#ifndef CONFIG_COMMON_CLK
+ r8a7790_clock_init();
++#endif
+ r8a7790_add_dt_devices();
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ }
+--
+1.8.5.rc3
+
--- /dev/null
+From c6da8bb7845d29cf3a4555d01e699d0c5742f37d Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:13:53 +0100
+Subject: ARM: shmobile: koelsch-reference: Remove duplicate CCF initialization
+
+The common clock framework is initialized in the rcar_gen2_init_timer()
+function, remove the of_clk_init() call.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e006502126a6a1f3afd879afa9101cc3df8b11f9)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 5 +----
+ 1 file changed, 1 insertion(+), 4 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+index a804a1798a71..4b48e2d4dec4 100644
+--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -19,7 +19,6 @@
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+-#include <linux/clk-provider.h>
+ #include <linux/kernel.h>
+ #include <linux/of_platform.h>
+ #include <mach/common.h>
+@@ -29,9 +28,7 @@
+
+ static void __init koelsch_add_standard_devices(void)
+ {
+-#ifdef CONFIG_COMMON_CLK
+- of_clk_init(NULL);
+-#else
++#ifndef CONFIG_COMMON_CLK
+ r8a7791_clock_init();
+ #endif
+ r8a7791_add_dt_devices();
+--
+1.8.5.rc3
+
--- /dev/null
+From 168764db129d318b7399d8756d85c59b259b14ed Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:13:54 +0100
+Subject: ARM: shmobile: lager-reference: Instantiate clkdevs for SCIF and CMT
+
+Now that the common clock framework is supported, the clock lookup
+entries in clock-r8a7790.c are not registered anymore. Devices must
+instead reference their clocks in the device tree. However, SCIF and CMT
+devices are still instantiated through platform code, and thus need a
+clock lookup entry.
+
+Retrieve the SCIF and CMT clock entries by name and register clkdevs for
+the corresponding devices. This will be removed when the SCIF and CMT
+devices will be instantiated from the device tree.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4a606af20d930dc1a8b62b0f753cdc018914e5de)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager-reference.c | 31 +++++++++++++++++++++++++-
+ 1 file changed, 30 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
+index fc43f7ce6577..7e3fe377e381 100644
+--- a/arch/arm/mach-shmobile/board-lager-reference.c
++++ b/arch/arm/mach-shmobile/board-lager-reference.c
+@@ -18,6 +18,8 @@
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
++#include <linux/clk.h>
++#include <linux/clkdev.h>
+ #include <linux/init.h>
+ #include <linux/of_platform.h>
+ #include <mach/common.h>
+@@ -27,9 +29,36 @@
+
+ static void __init lager_add_standard_devices(void)
+ {
+-#ifndef CONFIG_COMMON_CLK
++#ifdef CONFIG_COMMON_CLK
++ /*
++ * This is a really crude hack to provide clkdev support to the SCIF
++ * and CMT devices until they get moved to DT.
++ */
++ static const char * const scif_names[] = {
++ "scifa0", "scifa1", "scifb0", "scifb1",
++ "scifb2", "scifa2", "scif0", "scif1",
++ "hscif0", "hscif1",
++ };
++ struct clk *clk;
++ unsigned int i;
++
++ for (i = 0; i < ARRAY_SIZE(scif_names); ++i) {
++ clk = clk_get(NULL, scif_names[i]);
++ if (clk) {
++ clk_register_clkdev(clk, NULL, "sh-sci.%u", i);
++ clk_put(clk);
++ }
++ }
++
++ clk = clk_get(NULL, "cmt0");
++ if (clk) {
++ clk_register_clkdev(clk, NULL, "sh_cmt.0");
++ clk_put(clk);
++ }
++#else
+ r8a7790_clock_init();
+ #endif
++
+ r8a7790_add_dt_devices();
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ }
+--
+1.8.5.rc3
+
--- /dev/null
+From e10014507b5d37d9683f6a821ac3fbf57d649d21 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:13:55 +0100
+Subject: ARM: shmobile: koelsch-reference: Instantiate clkdevs for SCIF and
+ CMT
+
+Now that the common clock framework is supported, the clock lookup
+entries in clock-r8a7791.c are not registered anymore. Devices must
+instead reference their clocks in the device tree. However, SCIF and CMT
+devices are still instantiated through platform code, and thus need a
+clock lookup entry.
+
+Retrieve the SCIF and CMT clock entries by name and register clkdevs for
+the corresponding devices. This will be removed when the SCIF and CMT
+devices will be instantiated from the device tree.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f31239ef590186b6895a2f2cf7e0f2709a5c0da0)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 30 +++++++++++++++++++++++-
+ 1 file changed, 29 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+index 4b48e2d4dec4..e1c787e639eb 100644
+--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -19,6 +19,8 @@
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
++#include <linux/clk.h>
++#include <linux/clkdev.h>
+ #include <linux/kernel.h>
+ #include <linux/of_platform.h>
+ #include <mach/common.h>
+@@ -28,7 +30,33 @@
+
+ static void __init koelsch_add_standard_devices(void)
+ {
+-#ifndef CONFIG_COMMON_CLK
++#ifdef CONFIG_COMMON_CLK
++ /*
++ * This is a really crude hack to provide clkdev support to the SCIF
++ * and CMT devices until they get moved to DT.
++ */
++ static const char * const scif_names[] = {
++ "scifa0", "scifa1", "scifb0", "scifb1", "scifb2", "scifa2",
++ "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scifa3",
++ "scifa4", "scifa5",
++ };
++ struct clk *clk;
++ unsigned int i;
++
++ for (i = 0; i < ARRAY_SIZE(scif_names); ++i) {
++ clk = clk_get(NULL, scif_names[i]);
++ if (clk) {
++ clk_register_clkdev(clk, NULL, "sh-sci.%u", i);
++ clk_put(clk);
++ }
++ }
++
++ clk = clk_get(NULL, "cmt0");
++ if (clk) {
++ clk_register_clkdev(clk, NULL, "sh_cmt.0");
++ clk_put(clk);
++ }
++#else
+ r8a7791_clock_init();
+ #endif
+ r8a7791_add_dt_devices();
+--
+1.8.5.rc3
+
--- /dev/null
+From ad2902fc96b588703a8ea990c6d9dd3a6371dd5a Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:13:56 +0100
+Subject: ARM: shmobile: Remove non-multiplatform Lager reference support
+
+Now that r8a7790 has CCF support remove the legacy Lager reference
+Kconfig bits CONFIG_MACH_LAGER_REFERENCE for the non-multiplatform
+case.
+
+Starting from this commit Lager board support is always enabled via
+CONFIG_MACH_LAGER, and CONFIG_ARCH_MULTIPLATFORM is used to select
+between board-lager.c and board-lager-reference.c
+
+The file board-lager-reference.c can no longer be used together with
+the legacy sh-clk clock framework, instead CCF is used.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a8325d627fdd688de0b50e9edf4ed3787c6b5ee5)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/Makefile | 1 -
+ arch/arm/mach-shmobile/Kconfig | 11 -----------
+ arch/arm/mach-shmobile/Makefile | 1 -
+ arch/arm/mach-shmobile/Makefile.boot | 1 -
+ 4 files changed, 14 deletions(-)
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index bf100833943f..59f738438c21 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -170,7 +170,6 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
+ r8a7791-koelsch.dtb \
+ r8a7791-koelsch-reference.dtb \
+ r8a7790-lager.dtb \
+- r8a7790-lager-reference.dtb \
+ sh73a0-kzm9g.dtb \
+ sh73a0-kzm9g-reference.dtb \
+ r8a73a4-ape6evm.dtb \
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index e7033a858429..88bf98011b11 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -262,17 +262,6 @@ config MACH_LAGER
+ depends on ARCH_R8A7790
+ select USE_OF
+
+-config MACH_LAGER_REFERENCE
+- bool "Lager board - Reference Device Tree Implementation"
+- depends on ARCH_R8A7790
+- select USE_OF
+- ---help---
+- Use reference implementation of Lager board support
+- which makes use of device tree at the expense
+- of not supporting a number of devices.
+-
+- This is intended to aid developers
+-
+ config MACH_KOELSCH
+ bool "Koelsch board"
+ depends on ARCH_R8A7791
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index 9daa9c16e681..fad94ee57d66 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -71,7 +71,6 @@ obj-$(CONFIG_MACH_GENMAI_REFERENCE) += board-genmai-reference.o
+ obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
+ obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o
+ obj-$(CONFIG_MACH_LAGER) += board-lager.o
+-obj-$(CONFIG_MACH_LAGER_REFERENCE) += board-lager-reference.o
+ obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
+ obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
+ obj-$(CONFIG_MACH_KOELSCH) += board-koelsch.o
+diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
+index 759e4f8fcd37..f6d5119eaf50 100644
+--- a/arch/arm/mach-shmobile/Makefile.boot
++++ b/arch/arm/mach-shmobile/Makefile.boot
+@@ -13,7 +13,6 @@ loadaddr-$(CONFIG_MACH_KOELSCH_REFERENCE) += 0x40008000
+ loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
+ loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
+ loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
+-loadaddr-$(CONFIG_MACH_LAGER_REFERENCE) += 0x40008000
+ loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000
+ loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000
+ loadaddr-$(CONFIG_MACH_MARZEN_REFERENCE) += 0x60008000
+--
+1.8.5.rc3
+
--- /dev/null
+From 9eff15d24d92ae14c9c328b9f2c32b4603230e55 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:13:57 +0100
+Subject: ARM: shmobile: Remove non-multiplatform Koelsch reference support
+
+Now that r8a7791 has CCF support remove the legacy Koelsch reference
+Kconfig bits CONFIG_MACH_KOELSCH_REFERENCE for the non-multiplatform
+case.
+
+Starting from this commit Koelsch board support is always enabled via
+CONFIG_MACH_KOELSCH, and CONFIG_ARCH_MULTIPLATFORM is used to select
+between board-koelsch.c and board-koelsch-reference.c
+
+The file board-koelsch-reference.c can no longer be used together with
+the legacy sh-clk clock framework, instead CCF is used.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+[horms+renesas@verge.net.au: Dropped arch/arm/boot/dts/Makefile portion]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit 469cd76b53b474e3fa235656eef4257a5134b0d8)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 11 -----------
+ arch/arm/mach-shmobile/Makefile | 1 -
+ arch/arm/mach-shmobile/Makefile.boot | 1 -
+ 3 files changed, 13 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index 88bf98011b11..338640631e08 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -268,17 +268,6 @@ config MACH_KOELSCH
+ select USE_OF
+ select MICREL_PHY if SH_ETH
+
+-config MACH_KOELSCH_REFERENCE
+- bool "Koelsch board - Reference Device Tree Implementation"
+- depends on ARCH_R8A7791
+- select USE_OF
+- ---help---
+- Use reference implementation of Koelsch board support
+- which makes use of device tree at the expense
+- of not supporting a number of devices.
+-
+- This is intended to aid developers
+-
+ config MACH_KZM9G
+ bool "KZM-A9-GT board"
+ depends on ARCH_SH73A0
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index fad94ee57d66..fe7d4ff706e4 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -74,7 +74,6 @@ obj-$(CONFIG_MACH_LAGER) += board-lager.o
+ obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
+ obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
+ obj-$(CONFIG_MACH_KOELSCH) += board-koelsch.o
+-obj-$(CONFIG_MACH_KOELSCH_REFERENCE) += board-koelsch-reference.o
+ obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
+ obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o
+ endif
+diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
+index f6d5119eaf50..99455ecafa05 100644
+--- a/arch/arm/mach-shmobile/Makefile.boot
++++ b/arch/arm/mach-shmobile/Makefile.boot
+@@ -9,7 +9,6 @@ loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
+ loadaddr-$(CONFIG_MACH_GENMAI) += 0x08008000
+ loadaddr-$(CONFIG_MACH_GENMAI_REFERENCE) += 0x08008000
+ loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
+-loadaddr-$(CONFIG_MACH_KOELSCH_REFERENCE) += 0x40008000
+ loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
+ loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
+ loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
+--
+1.8.5.rc3
+
--- /dev/null
+From 49d9a8207b4026cd4874a92e9fe89783eb83a857 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:13:58 +0100
+Subject: ARM: shmobile: Let Lager multiplatform boot with Lager DTB
+
+Let the multiplatform Lager support boot with the legacy DTS for Lager
+as well as the Lager reference DTS.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1fb68146d5fa7656f48bc5caaa74312b7fc7257e)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/Makefile | 2 +-
+ arch/arm/mach-shmobile/board-lager-reference.c | 1 +
+ 2 files changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 59f738438c21..ceca59222fd8 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -177,7 +177,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
+ sh7372-mackerel.dtb
+ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
+ r7s72100-genmai-reference.dtb \
+- r8a7790-lager-reference.dtb \
++ r8a7790-lager.dtb \
+ r8a7791-koelsch-reference.dtb
+ dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
+ socfpga_vt.dtb
+diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
+index 7e3fe377e381..a6e271d92af0 100644
+--- a/arch/arm/mach-shmobile/board-lager-reference.c
++++ b/arch/arm/mach-shmobile/board-lager-reference.c
+@@ -64,6 +64,7 @@ static void __init lager_add_standard_devices(void)
+ }
+
+ static const char *lager_boards_compat_dt[] __initdata = {
++ "renesas,lager",
+ "renesas,lager-reference",
+ NULL,
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 33e372859522144c83460ed965b20a3688734d78 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:13:59 +0100
+Subject: ARM: shmobile: Let Koelsch multiplatform boot with Koelsch DTB
+
+Let the multiplatform Koelsch support boot with the legacy DTS for
+Koelsch as well as the Koelsch reference DTS.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1d2bdbc3a8f93b8c1dfc95b2df89c266dd6ce9d0)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ arch/arm/boot/dts/Makefile
+---
+ arch/arm/boot/dts/Makefile | 4 ++--
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 1 +
+ 2 files changed, 3 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index ceca59222fd8..f9a8196323bf 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -177,8 +177,8 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
+ sh7372-mackerel.dtb
+ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
+ r7s72100-genmai-reference.dtb \
+- r8a7790-lager.dtb \
+- r8a7791-koelsch-reference.dtb
++ r8a7791-koelsch.dtb \
++ r8a7790-lager.dtb
+ dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
+ socfpga_vt.dtb
+ dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+index e1c787e639eb..652b59268416 100644
+--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -64,6 +64,7 @@ static void __init koelsch_add_standard_devices(void)
+ }
+
+ static const char * const koelsch_boards_compat_dt[] __initconst = {
++ "renesas,koelsch",
+ "renesas,koelsch-reference",
+ NULL,
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 215c93372dd038546c978d231b7b9ed499622b0d Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 14 Dec 2013 15:45:01 +0100
+Subject: ARM: shmobile: mackerel: Fix USBHS pinconf entry
+
+Fix a typo in the USBHS1 pinconf entry that prevented the pull-down from
+being enabled.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b58c8e7b43ad804ad18b30f882b16da2e3d4ed9d)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-mackerel.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
+index 207acf0e07da..b3ee96e31b82 100644
+--- a/arch/arm/mach-shmobile/board-mackerel.c
++++ b/arch/arm/mach-shmobile/board-mackerel.c
+@@ -1406,7 +1406,7 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
+ /* USBHS1 */
+ PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
+ "usb1_vbus", "usb1"),
+- PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.&", "pfc-sh7372",
++ PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
+ "usb1_vbus", pin_pulldown_conf),
+ PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
+ "usb1_otg_id_0", "usb1"),
+--
+1.8.5.rc3
+
--- /dev/null
+From 6df476de3d1c029829a2d090043bdd7b336eaff0 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 03:48:17 +0100
+Subject: ARM: shmobile: armadillo: dts: Add PWM backlight power supply
+
+Commit 22ceeee16eb8f0d04de3ef43a5174fb30ec18af9 ("pwm-backlight: Add
+power supply support") added a mandatory power supply for the PWM
+backlight. Add a fixed 5V regulator and reference it for the backlight
+power supply.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit aeb193606d44bd37b2178c6b2b6f25ff679656a3)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+index 6d6fd3dff2d3..470575952297 100644
+--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
++++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+@@ -63,6 +63,15 @@
+ enable-active-high;
+ };
+
++ reg_5p0v: regulator@3 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-5.0V";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
+ leds {
+ compatible = "gpio-leds";
+ led1 {
+@@ -86,6 +95,7 @@
+ default-brightness-level = <9>;
+ pinctrl-0 = <&backlight_pins>;
+ pinctrl-names = "default";
++ power-supply = <®_5p0v>;
+ };
+
+ sound {
+--
+1.8.5.rc3
+
--- /dev/null
+From c4a72afb5c1c85f993504de9b7de9815b6bb0e4f Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 03:48:18 +0100
+Subject: ARM: shmobile: armadillo: dts: Add PWM backlight enable GPIO
+
+The Armadillo 800 EVA panel module has a backlight enable signal
+connected to GPIO 61. Report this in the backlight DT node.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a0c9efe65e00bd0a9b5b5814f6b3012d61f966f9)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+index 470575952297..e916aae2b725 100644
+--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
++++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+@@ -96,6 +96,7 @@
+ pinctrl-0 = <&backlight_pins>;
+ pinctrl-names = "default";
+ power-supply = <®_5p0v>;
++ enable-gpios = <&pfc 61 GPIO_ACTIVE_HIGH>;
+ };
+
+ sound {
+--
+1.8.5.rc3
+
--- /dev/null
+From 760edbfed4191c81dfe1af4d81dfcdf9e3ead58a Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 04:26:27 +0100
+Subject: ARM: shmobile: r8a73a4: Specify PFC interrupts in DT
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit defc82eabf962b83ac9e112238baa895890645ea)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a73a4.dtsi | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
+index 6b7ce89a68f7..62d0211bd192 100644
+--- a/arch/arm/boot/dts/r8a73a4.dtsi
++++ b/arch/arm/boot/dts/r8a73a4.dtsi
+@@ -288,6 +288,22 @@
+ reg = <0 0xe6050000 0 0x9000>;
+ gpio-controller;
+ #gpio-cells = <2>;
++ interrupts-extended =
++ <&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>,
++ <&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>,
++ <&irqc0 8 0>, <&irqc0 9 0>, <&irqc0 10 0>, <&irqc0 11 0>,
++ <&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>,
++ <&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>,
++ <&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>,
++ <&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>,
++ <&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>,
++ <&irqc1 0 0>, <&irqc1 1 0>, <&irqc1 2 0>, <&irqc1 3 0>,
++ <&irqc1 4 0>, <&irqc1 5 0>, <&irqc1 6 0>, <&irqc1 7 0>,
++ <&irqc1 8 0>, <&irqc1 9 0>, <&irqc1 10 0>, <&irqc1 11 0>,
++ <&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>,
++ <&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>,
++ <&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>,
++ <&irqc1 24 0>, <&irqc1 25 0>;
+ };
+
+ sdhi0: sd@ee100000 {
+--
+1.8.5.rc3
+
--- /dev/null
+From e40dac4b58abb849a6ebdfde4cd5b4389b0a6e64 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 04:26:28 +0100
+Subject: ARM: shmobile: r8a7740: Specify PFC interrupts in DT
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 778de006538d932b96c58dd3a43f9e4ef5060940)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740.dtsi | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
+index 2782f642acfc..8280884bfa59 100644
+--- a/arch/arm/boot/dts/r8a7740.dtsi
++++ b/arch/arm/boot/dts/r8a7740.dtsi
+@@ -155,6 +155,15 @@
+ <0xe605800c 0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
++ interrupts-extended =
++ <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
++ <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
++ <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
++ <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
++ <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
++ <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
++ <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
++ <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
+ };
+
+ tpu: pwm@e6600000 {
+--
+1.8.5.rc3
+
--- /dev/null
+From a334ed0f33dedf09ec8966bd2c9709bcba00feaf Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 04:26:29 +0100
+Subject: ARM: shmobile: sh73a0: Specify PFC interrupts in DT
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit aba76d286e8cccb05b3a4c23833faaee171a6c5d)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/sh73a0.dtsi | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
+index c460dd229b13..b7bd3b9a6753 100644
+--- a/arch/arm/boot/dts/sh73a0.dtsi
++++ b/arch/arm/boot/dts/sh73a0.dtsi
+@@ -242,6 +242,15 @@
+ <0xe605801c 0x1c>;
+ gpio-controller;
+ #gpio-cells = <2>;
++ interrupts-extended =
++ <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
++ <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
++ <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
++ <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
++ <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
++ <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
++ <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
++ <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
+ };
+
+ sh_fsi2: sound@ec230000 {
+--
+1.8.5.rc3
+
--- /dev/null
+From 4e5e0330a3113d62a0f062ce0b4a828304c5d4a7 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 04:26:30 +0100
+Subject: ARM: shmobile: armadillo: dts: Add gpio-keys device
+
+The board had 4 buttons connected to GPIOs, add a corresponding
+gpio-keys device.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 90c2434daa0b8c7ec2b75fcb182436813e9120bd)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ .../boot/dts/r8a7740-armadillo800eva-reference.dts | 29 ++++++++++++++++++++++
+ 1 file changed, 29 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+index e916aae2b725..95a849bf921f 100644
+--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
++++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+@@ -72,6 +72,35 @@
+ regulator-boot-on;
+ };
+
++ gpio-keys {
++ compatible = "gpio-keys";
++
++ power-key {
++ gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
++ linux,code = <116>;
++ label = "SW3";
++ gpio-key,wakeup;
++ };
++
++ back-key {
++ gpios = <&pfc 100 GPIO_ACTIVE_LOW>;
++ linux,code = <158>;
++ label = "SW4";
++ };
++
++ menu-key {
++ gpios = <&pfc 97 GPIO_ACTIVE_LOW>;
++ linux,code = <139>;
++ label = "SW5";
++ };
++
++ home-key {
++ gpios = <&pfc 98 GPIO_ACTIVE_LOW>;
++ linux,code = <102>;
++ label = "SW6";
++ };
++ };
++
+ leds {
+ compatible = "gpio-leds";
+ led1 {
+--
+1.8.5.rc3
+
--- /dev/null
+From 34d941fcc551543df929adb557aa06c546245906 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:05:14 +0100
+Subject: ARM: shmobile: r8a7790: Add clocks
+
+Declare all core clocks and DIV6 clocks, as well as all MSTP clocks
+currently used by r8a7790 boards.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 22a1f59547e1e63cd18ee1ddb32fa2d8ab591a22)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 318 +++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 318 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index c6001032d9a7..c549bf56bf84 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -8,6 +8,7 @@
+ * kind, whether express or implied.
+ */
+
++#include <dt-bindings/clock/r8a7790-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+@@ -287,4 +288,321 @@
+ cap-sd-highspeed;
+ status = "disabled";
+ };
++
++ clocks {
++ #address-cells = <2>;
++ #size-cells = <2>;
++ ranges;
++
++ /* External root clock */
++ extal_clk: extal_clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overriden by the board. */
++ clock-frequency = <0>;
++ clock-output-names = "extal";
++ };
++
++ /* Special CPG clocks */
++ cpg_clocks: cpg_clocks@e6150000 {
++ compatible = "renesas,r8a7790-cpg-clocks",
++ "renesas,rcar-gen2-cpg-clocks";
++ reg = <0 0xe6150000 0 0x1000>;
++ clocks = <&extal_clk>;
++ #clock-cells = <1>;
++ clock-output-names = "main", "pll0", "pll1", "pll3",
++ "lb", "qspi", "sdh", "sd0", "sd1",
++ "z";
++ };
++
++ /* Variable factor clocks */
++ sd2_clk: sd2_clk@e6150078 {
++ compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
++ reg = <0 0xe6150078 0 4>;
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-output-names = "sd2";
++ };
++ sd3_clk: sd3_clk@e615007c {
++ compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
++ reg = <0 0xe615007c 0 4>;
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-output-names = "sd3";
++ };
++ mmc0_clk: mmc0_clk@e6150240 {
++ compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
++ reg = <0 0xe6150240 0 4>;
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-output-names = "mmc0";
++ };
++ mmc1_clk: mmc1_clk@e6150244 {
++ compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
++ reg = <0 0xe6150244 0 4>;
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-output-names = "mmc1";
++ };
++ ssp_clk: ssp_clk@e6150248 {
++ compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
++ reg = <0 0xe6150248 0 4>;
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-output-names = "ssp";
++ };
++ ssprs_clk: ssprs_clk@e615024c {
++ compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
++ reg = <0 0xe615024c 0 4>;
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-output-names = "ssprs";
++ };
++
++ /* Fixed factor clocks */
++ pll1_div2_clk: pll1_div2_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <2>;
++ clock-mult = <1>;
++ clock-output-names = "pll1_div2";
++ };
++ z2_clk: z2_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <2>;
++ clock-mult = <1>;
++ clock-output-names = "z2";
++ };
++ zg_clk: zg_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <3>;
++ clock-mult = <1>;
++ clock-output-names = "zg";
++ };
++ zx_clk: zx_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <3>;
++ clock-mult = <1>;
++ clock-output-names = "zx";
++ };
++ zs_clk: zs_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <6>;
++ clock-mult = <1>;
++ clock-output-names = "zs";
++ };
++ hp_clk: hp_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <12>;
++ clock-mult = <1>;
++ clock-output-names = "hp";
++ };
++ i_clk: i_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <2>;
++ clock-mult = <1>;
++ clock-output-names = "i";
++ };
++ b_clk: b_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <12>;
++ clock-mult = <1>;
++ clock-output-names = "b";
++ };
++ p_clk: p_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <24>;
++ clock-mult = <1>;
++ clock-output-names = "p";
++ };
++ cl_clk: cl_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <48>;
++ clock-mult = <1>;
++ clock-output-names = "cl";
++ };
++ m2_clk: m2_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <8>;
++ clock-mult = <1>;
++ clock-output-names = "m2";
++ };
++ imp_clk: imp_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <4>;
++ clock-mult = <1>;
++ clock-output-names = "imp";
++ };
++ rclk_clk: rclk_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <(48 * 1024)>;
++ clock-mult = <1>;
++ clock-output-names = "rclk";
++ };
++ oscclk_clk: oscclk_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <(12 * 1024)>;
++ clock-mult = <1>;
++ clock-output-names = "oscclk";
++ };
++ zb3_clk: zb3_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
++ #clock-cells = <0>;
++ clock-div = <4>;
++ clock-mult = <1>;
++ clock-output-names = "zb3";
++ };
++ zb3d2_clk: zb3d2_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
++ #clock-cells = <0>;
++ clock-div = <8>;
++ clock-mult = <1>;
++ clock-output-names = "zb3d2";
++ };
++ ddr_clk: ddr_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
++ #clock-cells = <0>;
++ clock-div = <8>;
++ clock-mult = <1>;
++ clock-output-names = "ddr";
++ };
++ mp_clk: mp_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-div = <15>;
++ clock-mult = <1>;
++ clock-output-names = "mp";
++ };
++ cp_clk: cp_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&extal_clk>;
++ #clock-cells = <0>;
++ clock-div = <2>;
++ clock-mult = <1>;
++ clock-output-names = "cp";
++ };
++
++ /* Gate clocks */
++ mstp1_clks: mstp1_clks@e6150134 {
++ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
++ clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
++ <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>,
++ <&zs_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <
++ R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
++ R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1
++ R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_RT R8A7790_CLK_VSP1_SY
++ >;
++ clock-output-names =
++ "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
++ "vsp1-du0", "vsp1-rt", "vsp1-sy";
++ };
++ mstp2_clks: mstp2_clks@e6150138 {
++ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
++ clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
++ <&mp_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <
++ R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0
++ R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1 R8A7790_CLK_SCIFB2
++ >;
++ clock-output-names =
++ "scifa2", "scifa1", "scifa0", "scifb0", "scifb1",
++ "scifb2";
++ };
++ mstp3_clks: mstp3_clks@e615013c {
++ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
++ clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
++ <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>,
++ <&mmc0_clk>, <&rclk_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <
++ R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
++ R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
++ R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1
++ >;
++ clock-output-names =
++ "tpu0", "mmcif1", "sdhi3", "sdhi2",
++ "sdhi1", "sdhi0", "mmcif0", "cmt1";
++ };
++ mstp5_clks: mstp5_clks@e6150144 {
++ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
++ clocks = <&extal_clk>, <&p_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <R8A7790_CLK_THERMAL R8A7790_CLK_PWM>;
++ clock-output-names = "thermal", "pwm";
++ };
++ mstp7_clks: mstp7_clks@e615014c {
++ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
++ clocks = <&mp_clk>, <&mp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
++ <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>,
++ <&zx_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <
++ R8A7790_CLK_EHCI R8A7790_CLK_HSUSB R8A7790_CLK_HSCIF1
++ R8A7790_CLK_HSCIF0 R8A7790_CLK_SCIF1 R8A7790_CLK_SCIF0
++ R8A7790_CLK_DU2 R8A7790_CLK_DU1 R8A7790_CLK_DU0
++ R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0
++ >;
++ clock-output-names =
++ "ehci", "hsusb", "hscif1", "hscif0", "scif1",
++ "scif0", "du2", "du1", "du0", "lvds1", "lvds0";
++ };
++ mstp8_clks: mstp8_clks@e6150990 {
++ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
++ clocks = <&p_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <R8A7790_CLK_ETHER>;
++ clock-output-names = "ether";
++ };
++ mstp9_clks: mstp9_clks@e6150994 {
++ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
++ clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <
++ R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_I2C3
++ R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
++ >;
++ clock-output-names = "rcan1", "rcan0", "i2c3", "i2c2", "i2c1", "i2c0";
++ };
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From f032dfbd2e473d960f47f03862c4c9545d2749bc Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:05:15 +0100
+Subject: ARM: shmobile: r8a7790: Reference clocks
+
+Reference clocks using a "clocks" property in all nodes corresponding to
+devices that require a clock.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 72197ca7a1cb1cea5615c879f638d5d457c0b2e2)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index c549bf56bf84..28e946081797 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -197,6 +197,7 @@
+ reg = <0 0xe6508000 0 0x40>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7790_CLK_I2C0>;
+ status = "disabled";
+ };
+
+@@ -207,6 +208,7 @@
+ reg = <0 0xe6518000 0 0x40>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7790_CLK_I2C1>;
+ status = "disabled";
+ };
+
+@@ -217,6 +219,7 @@
+ reg = <0 0xe6530000 0 0x40>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7790_CLK_I2C2>;
+ status = "disabled";
+ };
+
+@@ -227,6 +230,7 @@
+ reg = <0 0xe6540000 0 0x40>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7790_CLK_I2C3>;
+ status = "disabled";
+ };
+
+@@ -235,6 +239,7 @@
+ reg = <0 0xee200000 0 0x80>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+@@ -244,6 +249,7 @@
+ reg = <0 0xee220000 0 0x80>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+@@ -258,6 +264,7 @@
+ reg = <0 0xee100000 0 0x200>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+@@ -267,6 +274,7 @@
+ reg = <0 0xee120000 0 0x200>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+@@ -276,6 +284,7 @@
+ reg = <0 0xee140000 0 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+@@ -285,6 +294,7 @@
+ reg = <0 0xee160000 0 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From c73a30b3def7438705b4d24ab327c4277b070715 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:05:16 +0100
+Subject: ARM: shmobile: r8a7791: Add clocks
+
+Declare all core clocks and DIV6 clocks, as well as all MSTP clocks
+currently used by r8a7791 boards.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 59e79895b95892863617ce630fbda467f2470575)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 313 +++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 313 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index a349aff54c76..0a8219258145 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -9,6 +9,7 @@
+ * kind, whether express or implied.
+ */
+
++#include <dt-bindings/clock/r8a7791-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+@@ -183,4 +184,316 @@
+ reg = <0 0xe6060000 0 0x250>;
+ #gpio-range-cells = <3>;
+ };
++
++ clocks {
++ #address-cells = <2>;
++ #size-cells = <2>;
++ ranges;
++
++ /* External root clock */
++ extal_clk: extal_clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overriden by the board. */
++ clock-frequency = <0>;
++ clock-output-names = "extal";
++ };
++
++ /* Special CPG clocks */
++ cpg_clocks: cpg_clocks@e6150000 {
++ compatible = "renesas,r8a7791-cpg-clocks",
++ "renesas,rcar-gen2-cpg-clocks";
++ reg = <0 0xe6150000 0 0x1000>;
++ clocks = <&extal_clk>;
++ #clock-cells = <1>;
++ clock-output-names = "main", "pll0", "pll1", "pll3",
++ "lb", "qspi", "sdh", "sd0", "z";
++ };
++
++ /* Variable factor clocks */
++ sd1_clk: sd2_clk@e6150078 {
++ compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
++ reg = <0 0xe6150078 0 4>;
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-output-names = "sd1";
++ };
++ sd2_clk: sd3_clk@e615007c {
++ compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
++ reg = <0 0xe615007c 0 4>;
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-output-names = "sd2";
++ };
++ mmc0_clk: mmc0_clk@e6150240 {
++ compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
++ reg = <0 0xe6150240 0 4>;
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-output-names = "mmc0";
++ };
++ ssp_clk: ssp_clk@e6150248 {
++ compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
++ reg = <0 0xe6150248 0 4>;
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-output-names = "ssp";
++ };
++ ssprs_clk: ssprs_clk@e615024c {
++ compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
++ reg = <0 0xe615024c 0 4>;
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-output-names = "ssprs";
++ };
++
++ /* Fixed factor clocks */
++ pll1_div2_clk: pll1_div2_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <2>;
++ clock-mult = <1>;
++ clock-output-names = "pll1_div2";
++ };
++ zg_clk: zg_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <3>;
++ clock-mult = <1>;
++ clock-output-names = "zg";
++ };
++ zx_clk: zx_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <3>;
++ clock-mult = <1>;
++ clock-output-names = "zx";
++ };
++ zs_clk: zs_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <6>;
++ clock-mult = <1>;
++ clock-output-names = "zs";
++ };
++ hp_clk: hp_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <12>;
++ clock-mult = <1>;
++ clock-output-names = "hp";
++ };
++ i_clk: i_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <2>;
++ clock-mult = <1>;
++ clock-output-names = "i";
++ };
++ b_clk: b_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <12>;
++ clock-mult = <1>;
++ clock-output-names = "b";
++ };
++ p_clk: p_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <24>;
++ clock-mult = <1>;
++ clock-output-names = "p";
++ };
++ cl_clk: cl_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <48>;
++ clock-mult = <1>;
++ clock-output-names = "cl";
++ };
++ m2_clk: m2_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <8>;
++ clock-mult = <1>;
++ clock-output-names = "m2";
++ };
++ imp_clk: imp_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <4>;
++ clock-mult = <1>;
++ clock-output-names = "imp";
++ };
++ rclk_clk: rclk_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <(48 * 1024)>;
++ clock-mult = <1>;
++ clock-output-names = "rclk";
++ };
++ oscclk_clk: oscclk_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
++ #clock-cells = <0>;
++ clock-div = <(12 * 1024)>;
++ clock-mult = <1>;
++ clock-output-names = "oscclk";
++ };
++ zb3_clk: zb3_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
++ #clock-cells = <0>;
++ clock-div = <4>;
++ clock-mult = <1>;
++ clock-output-names = "zb3";
++ };
++ zb3d2_clk: zb3d2_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
++ #clock-cells = <0>;
++ clock-div = <8>;
++ clock-mult = <1>;
++ clock-output-names = "zb3d2";
++ };
++ ddr_clk: ddr_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
++ #clock-cells = <0>;
++ clock-div = <8>;
++ clock-mult = <1>;
++ clock-output-names = "ddr";
++ };
++ mp_clk: mp_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-div = <15>;
++ clock-mult = <1>;
++ clock-output-names = "mp";
++ };
++ cp_clk: cp_clk {
++ compatible = "fixed-factor-clock";
++ clocks = <&extal_clk>;
++ #clock-cells = <0>;
++ clock-div = <2>;
++ clock-mult = <1>;
++ clock-output-names = "cp";
++ };
++
++ /* Gate clocks */
++ mstp1_clks: mstp1_clks@e6150134 {
++ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
++ clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
++ <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <
++ R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
++ R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1
++ R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_SY
++ >;
++ clock-output-names =
++ "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
++ "vsp1-du0", "vsp1-sy";
++ };
++ mstp2_clks: mstp2_clks@e6150138 {
++ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
++ clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
++ <&mp_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <
++ R8A7791_CLK_SCIFA2 R8A7791_CLK_SCIFA1 R8A7791_CLK_SCIFA0
++ R8A7791_CLK_SCIFB0 R8A7791_CLK_SCIFB1 R8A7791_CLK_SCIFB2
++ >;
++ clock-output-names =
++ "scifa2", "scifa1", "scifa0", "scifb0", "scifb1",
++ "scifb2";
++ };
++ mstp3_clks: mstp3_clks@e615013c {
++ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
++ clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>,
++ <&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <
++ R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1
++ R8A7791_CLK_SDHI0 R8A7791_CLK_MMCIF0 R8A7791_CLK_CMT1
++ >;
++ clock-output-names =
++ "tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "cmt1";
++ };
++ mstp5_clks: mstp5_clks@e6150144 {
++ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
++ clocks = <&extal_clk>, <&p_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <R8A7791_CLK_THERMAL R8A7791_CLK_PWM>;
++ clock-output-names = "thermal", "pwm";
++ };
++ mstp7_clks: mstp7_clks@e615014c {
++ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
++ clocks = <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
++ <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
++ <&zx_clk>, <&zx_clk>, <&zx_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <
++ R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
++ R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0
++ R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1
++ R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0
++ R8A7791_CLK_LVDS0
++ >;
++ clock-output-names =
++ "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
++ "scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0";
++ };
++ mstp8_clks: mstp8_clks@e6150990 {
++ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
++ clocks = <&p_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <R8A7791_CLK_ETHER>;
++ clock-output-names = "ether";
++ };
++ mstp9_clks: mstp9_clks@e6150994 {
++ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
++ clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
++ <&p_clk>, <&p_clk>, <&p_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <
++ R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_I2C4
++ R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
++ R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
++ >;
++ clock-output-names =
++ "rcan1", "rcan0", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1",
++ "i2c0";
++ };
++ mstp11_clks: mstp11_clks@e615099c {
++ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
++ clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
++ #clock-cells = <1>;
++ renesas,clock-indices = <
++ R8A7791_CLK_SCIFA3 R8A7791_CLK_SCIFA4 R8A7791_CLK_SCIFA5
++ >;
++ clock-output-names = "scifa3", "scifa4", "scifa5";
++ };
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From b02329a9787863a6326e81fad7e3181635dd3dae Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:13:47 +0100
+Subject: ARM: shmobile: Sync Lager DTS with Lager reference DTS
+
+Copy the device nodes from Lager reference into the Lager device tree
+file. This will allow us to use a single DTS file regarless of kernel
+configuration. In case of legacy C board code the device nodes may or
+may not be used, but in the multiplatform case all the DT device nodes
+are used.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 39fa511b8cd96395ee788267a16b8d3b20ac56e2)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 53 +++++++++++++++++++++++++++++++++++++
+ 1 file changed, 53 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
+index 10e6a08164e5..67a69399ba19 100644
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -10,6 +10,7 @@
+
+ /dts-v1/;
+ #include "r8a7790.dtsi"
++#include <dt-bindings/gpio/gpio.h>
+
+ / {
+ model = "Lager";
+@@ -33,4 +34,56 @@
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
++
++ leds {
++ compatible = "gpio-leds";
++ led6 {
++ gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
++ };
++ led7 {
++ gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
++ };
++ led8 {
++ gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
++ };
++ };
++
++ fixedregulator3v3: fixedregulator@0 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-3.3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++};
++
++&pfc {
++ pinctrl-0 = <&scif0_pins &scif1_pins>;
++ pinctrl-names = "default";
++
++ scif0_pins: serial0 {
++ renesas,groups = "scif0_data";
++ renesas,function = "scif0";
++ };
++
++ scif1_pins: serial1 {
++ renesas,groups = "scif1_data";
++ renesas,function = "scif1";
++ };
++
++ mmc1_pins: mmc1 {
++ renesas,groups = "mmc1_data8", "mmc1_ctrl";
++ renesas,function = "mmc1";
++ };
++};
++
++&mmcif1 {
++ pinctrl-0 = <&mmc1_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&fixedregulator3v3>;
++ bus-width = <8>;
++ non-removable;
++ status = "okay";
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 799dd40316e9ca4e55d2063a64519987f86f4467 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:13:48 +0100
+Subject: ARM: shmobile: Sync Koelsch DTS with Koelsch reference DTS
+
+Copy the device nodes from Koelsch reference into the Koeslch device
+tree file. This will allow us to use a single DTS file regarless of
+kernel configuration. In case of legacy C board code the device nodes
+may or may not be used, but in the multiplatform case all the DT device
+nodes are used.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f8e2535d988a7945fa2c11214d55c20c73c60840)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 29 +++++++++++++++++++++++++++++
+ 1 file changed, 29 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
+index c4e8b3a0cd13..d431f3189bba 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -11,6 +11,7 @@
+
+ /dts-v1/;
+ #include "r8a7791.dtsi"
++#include <dt-bindings/gpio/gpio.h>
+
+ / {
+ model = "Koelsch";
+@@ -29,4 +30,32 @@
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
++
++ leds {
++ compatible = "gpio-leds";
++ led6 {
++ gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
++ };
++ led7 {
++ gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
++ };
++ led8 {
++ gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
++ };
++ };
++};
++
++&pfc {
++ pinctrl-0 = <&scif0_pins &scif1_pins>;
++ pinctrl-names = "default";
++
++ scif0_pins: serial0 {
++ renesas,groups = "scif0_data_d";
++ renesas,function = "scif0";
++ };
++
++ scif1_pins: serial1 {
++ renesas,groups = "scif1_data_d";
++ renesas,function = "scif1";
++ };
+ };
+--
+1.8.5.rc3
+
--- /dev/null
+From 0ea128eddf65fed2d755d4cd83375c250ca2b260 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:13:49 +0100
+Subject: ARM: shmobile: lager: Specify external clock frequency in DT
+
+The external crystal frequency is 20MHz on the Lager board. Specify it
+in the device tree.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 62e43056ad5f584f8af83267c901f65e667e3657)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
+index 67a69399ba19..57569cba1528 100644
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -58,6 +58,10 @@
+ };
+ };
+
++&extal_clk {
++ clock-frequency = <20000000>;
++};
++
+ &pfc {
+ pinctrl-0 = <&scif0_pins &scif1_pins>;
+ pinctrl-names = "default";
+--
+1.8.5.rc3
+
--- /dev/null
+From 70f0bb90c09bbdbbdd85001d42908f4b8b758b00 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 11 Dec 2013 15:13:50 +0100
+Subject: ARM: shmobile: koelsch: Specify external clock frequency in DT
+
+The external crystal frequency is 20MHz on the Koelsch board. Specify it
+in the device tree.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit fcf0c725cb38f7d55a89e6f87183afee90a3846d)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
+index d431f3189bba..fd556c3483e3 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -45,6 +45,10 @@
+ };
+ };
+
++&extal_clk {
++ clock-frequency = <20000000>;
++};
++
+ &pfc {
+ pinctrl-0 = <&scif0_pins &scif1_pins>;
+ pinctrl-names = "default";
+--
+1.8.5.rc3
+
--- /dev/null
+From 32648aae9e454137609348cd6809594d072e2186 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 17 Oct 2013 17:22:16 +0200
+Subject: ARM: shmobile: Remove Lager reference DTS
+
+Now that the DTS file r8a7790-lager.dts can be used with board-lager.c
+and board-lager-reference.c, proceed with removing
+r8a7790-lager-reference.dts.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2b4baad03854ab23ce9a4c073e3795ac29985132)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager-reference.dts | 89 ---------------------------
+ 1 file changed, 89 deletions(-)
+ delete mode 100644 arch/arm/boot/dts/r8a7790-lager-reference.dts
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
+deleted file mode 100644
+index dfedc0ea82e1..000000000000
+--- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
++++ /dev/null
+@@ -1,89 +0,0 @@
+-/*
+- * Device Tree Source for the Lager board
+- *
+- * Copyright (C) 2013 Renesas Solutions Corp.
+- *
+- * This file is licensed under the terms of the GNU General Public License
+- * version 2. This program is licensed "as is" without any warranty of any
+- * kind, whether express or implied.
+- */
+-
+-/dts-v1/;
+-#include "r8a7790.dtsi"
+-#include <dt-bindings/gpio/gpio.h>
+-
+-/ {
+- model = "Lager";
+- compatible = "renesas,lager-reference", "renesas,r8a7790";
+-
+- chosen {
+- bootargs = "console=ttySC6,115200 ignore_loglevel rw";
+- };
+-
+- memory@40000000 {
+- device_type = "memory";
+- reg = <0 0x40000000 0 0x80000000>;
+- };
+-
+- memory@180000000 {
+- device_type = "memory";
+- reg = <1 0x80000000 0 0x80000000>;
+- };
+-
+- lbsc {
+- #address-cells = <1>;
+- #size-cells = <1>;
+- };
+-
+- leds {
+- compatible = "gpio-leds";
+- led6 {
+- gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
+- };
+- led7 {
+- gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
+- };
+- led8 {
+- gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
+- };
+- };
+-
+- fixedregulator3v3: fixedregulator@0 {
+- compatible = "regulator-fixed";
+- regulator-name = "fixed-3.3V";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-boot-on;
+- regulator-always-on;
+- };
+-};
+-
+-&pfc {
+- pinctrl-0 = <&scif0_pins &scif1_pins>;
+- pinctrl-names = "default";
+-
+- scif0_pins: serial0 {
+- renesas,groups = "scif0_data";
+- renesas,function = "scif0";
+- };
+-
+- scif1_pins: serial1 {
+- renesas,groups = "scif1_data";
+- renesas,function = "scif1";
+- };
+-
+- mmc1_pins: mmc1 {
+- renesas,groups = "mmc1_data8", "mmc1_ctrl";
+- renesas,function = "mmc1";
+- };
+-};
+-
+-&mmcif1 {
+- pinctrl-0 = <&mmc1_pins>;
+- pinctrl-names = "default";
+-
+- vmmc-supply = <&fixedregulator3v3>;
+- bus-width = <8>;
+- non-removable;
+- status = "okay";
+-};
+--
+1.8.5.rc3
+
--- /dev/null
+From e4944bc9b94c1ae09f6ccc4044628b2411678bdb Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 20 Dec 2013 02:20:54 +0300
+Subject: ARM: shmobile: Lager: conditionally select CONFIG_MICREL_PHY
+
+Now that support for KSZ8041RNLI is added to the Micrel PHY driver and we intend
+to support PHY IRQs on the Lager board, we have to enable the Micrel driver.
+Do this by selecting CONFIG_MICREL_PHY for Lager if CONFIG_SH_ETH is enabled.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 601e68c2232297cf1811adc09c82f49eeb276bd8)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index 338640631e08..a127252ab9e1 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -54,6 +54,7 @@ config MACH_KZM9D
+ config MACH_LAGER
+ bool "Lager board"
+ depends on ARCH_R8A7790
++ select MICREL_PHY if SH_ETH
+
+ comment "Renesas ARM SoCs System Configuration"
+ endif
+@@ -261,6 +262,7 @@ config MACH_LAGER
+ bool "Lager board"
+ depends on ARCH_R8A7790
+ select USE_OF
++ select MICREL_PHY if SH_ETH
+
+ config MACH_KOELSCH
+ bool "Koelsch board"
+--
+1.8.5.rc3
+
--- /dev/null
+From a8d50796c2ead70bac26c0fb52fde18e2ef7d533 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 19 Dec 2013 18:09:34 -0800
+Subject: ARM: shmobile: r8a7778: add sound SCU clock support
+
+This is needed to use SRC (= Sampling Rate Converter)
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 950c4477f7804174338fb32c8cc6f9d228eef833)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7778.c | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
+index 4b601bf4ede4..9783945f8bc7 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7778.c
++++ b/arch/arm/mach-shmobile/clock-r8a7778.c
+@@ -115,6 +115,8 @@ static struct clk *main_clks[] = {
+ };
+
+ enum {
++ MSTP531, MSTP530,
++ MSTP529, MSTP528, MSTP527, MSTP526, MSTP525, MSTP524, MSTP523,
+ MSTP331,
+ MSTP323, MSTP322, MSTP321,
+ MSTP311, MSTP310,
+@@ -129,6 +131,15 @@ enum {
+ MSTP_NR };
+
+ static struct clk mstp_clks[MSTP_NR] = {
++ [MSTP531] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 31, 0), /* SCU0 */
++ [MSTP530] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 30, 0), /* SCU1 */
++ [MSTP529] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 29, 0), /* SCU2 */
++ [MSTP528] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 28, 0), /* SCU3 */
++ [MSTP527] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 27, 0), /* SCU4 */
++ [MSTP526] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 26, 0), /* SCU5 */
++ [MSTP525] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 25, 0), /* SCU6 */
++ [MSTP524] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 24, 0), /* SCU7 */
++ [MSTP523] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 23, 0), /* SCU8 */
+ [MSTP331] = SH_CLK_MSTP32(&s4_clk, MSTPCR3, 31, 0), /* MMC */
+ [MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */
+ [MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
+@@ -219,6 +230,15 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]),
+ CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]),
+ CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]),
++ CLKDEV_ICK_ID("scu.0", "rcar_sound", &mstp_clks[MSTP531]),
++ CLKDEV_ICK_ID("scu.1", "rcar_sound", &mstp_clks[MSTP530]),
++ CLKDEV_ICK_ID("scu.2", "rcar_sound", &mstp_clks[MSTP529]),
++ CLKDEV_ICK_ID("scu.3", "rcar_sound", &mstp_clks[MSTP528]),
++ CLKDEV_ICK_ID("scu.4", "rcar_sound", &mstp_clks[MSTP527]),
++ CLKDEV_ICK_ID("scu.5", "rcar_sound", &mstp_clks[MSTP526]),
++ CLKDEV_ICK_ID("scu.6", "rcar_sound", &mstp_clks[MSTP525]),
++ CLKDEV_ICK_ID("scu.7", "rcar_sound", &mstp_clks[MSTP524]),
++ CLKDEV_ICK_ID("scu.8", "rcar_sound", &mstp_clks[MSTP523]),
+ };
+
+ void __init r8a7778_clock_init(void)
+--
+1.8.5.rc3
+
--- /dev/null
+From ceea01326344cae01fd7fe692d68b85282219b98 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:21 +0100
+Subject: ARM: shmobile: sh7372: Use macros to declare SCIF devices
+
+Replace copy-n-paste SCIF platform data and device declaration with a
+macro. This reduces the amount of code and improves readability.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c6a0d864b83178ab47822fdbfbe699c34a8b4b44)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-sh7372.c | 156 ++++++----------------------------
+ 1 file changed, 25 insertions(+), 131 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
+index 311878391e18..77627dd422b0 100644
+--- a/arch/arm/mach-shmobile/setup-sh7372.c
++++ b/arch/arm/mach-shmobile/setup-sh7372.c
+@@ -86,138 +86,32 @@ void __init sh7372_pinmux_init(void)
+ platform_device_register(&sh7372_pfc_device);
+ }
+
+-/* SCIFA0 */
+-static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xe6c40000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { evt2irq(0x0c00), evt2irq(0x0c00),
+- evt2irq(0x0c00), evt2irq(0x0c00) },
+-};
+-
+-static struct platform_device scif0_device = {
+- .name = "sh-sci",
+- .id = 0,
+- .dev = {
+- .platform_data = &scif0_platform_data,
+- },
+-};
+-
+-/* SCIFA1 */
+-static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xe6c50000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { evt2irq(0x0c20), evt2irq(0x0c20),
+- evt2irq(0x0c20), evt2irq(0x0c20) },
+-};
+-
+-static struct platform_device scif1_device = {
+- .name = "sh-sci",
+- .id = 1,
+- .dev = {
+- .platform_data = &scif1_platform_data,
+- },
+-};
+-
+-/* SCIFA2 */
+-static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xe6c60000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { evt2irq(0x0c40), evt2irq(0x0c40),
+- evt2irq(0x0c40), evt2irq(0x0c40) },
+-};
+-
+-static struct platform_device scif2_device = {
+- .name = "sh-sci",
+- .id = 2,
+- .dev = {
+- .platform_data = &scif2_platform_data,
+- },
+-};
+-
+-/* SCIFA3 */
+-static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xe6c70000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { evt2irq(0x0c60), evt2irq(0x0c60),
+- evt2irq(0x0c60), evt2irq(0x0c60) },
+-};
+-
+-static struct platform_device scif3_device = {
+- .name = "sh-sci",
+- .id = 3,
+- .dev = {
+- .platform_data = &scif3_platform_data,
+- },
+-};
+-
+-/* SCIFA4 */
+-static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xe6c80000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { evt2irq(0x0d20), evt2irq(0x0d20),
+- evt2irq(0x0d20), evt2irq(0x0d20) },
+-};
+-
+-static struct platform_device scif4_device = {
+- .name = "sh-sci",
+- .id = 4,
+- .dev = {
+- .platform_data = &scif4_platform_data,
+- },
+-};
+-
+-/* SCIFA5 */
+-static struct plat_sci_port scif5_platform_data = {
+- .mapbase = 0xe6cb0000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { evt2irq(0x0d40), evt2irq(0x0d40),
+- evt2irq(0x0d40), evt2irq(0x0d40) },
+-};
+-
+-static struct platform_device scif5_device = {
+- .name = "sh-sci",
+- .id = 5,
+- .dev = {
+- .platform_data = &scif5_platform_data,
+- },
+-};
+-
+-/* SCIFB */
+-static struct plat_sci_port scif6_platform_data = {
+- .mapbase = 0xe6c30000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFB,
+- .irqs = { evt2irq(0x0d60), evt2irq(0x0d60),
+- evt2irq(0x0d60), evt2irq(0x0d60) },
+-};
++/* SCIF */
++#define SH7372_SCIF(scif_type, index, baseaddr, irq) \
++static struct plat_sci_port scif##index##_platform_data = { \
++ .type = scif_type, \
++ .mapbase = baseaddr, \
++ .flags = UPF_BOOT_AUTOCONF, \
++ .irqs = SCIx_IRQ_MUXED(irq), \
++ .scbrr_algo_id = SCBRR_ALGO_4, \
++ .scscr = SCSCR_RE | SCSCR_TE, \
++}; \
++ \
++static struct platform_device scif##index##_device = { \
++ .name = "sh-sci", \
++ .id = index, \
++ .dev = { \
++ .platform_data = &scif##index##_platform_data, \
++ }, \
++}
+
+-static struct platform_device scif6_device = {
+- .name = "sh-sci",
+- .id = 6,
+- .dev = {
+- .platform_data = &scif6_platform_data,
+- },
+-};
++SH7372_SCIF(PORT_SCIFA, 0, 0xe6c40000, evt2irq(0x0c00));
++SH7372_SCIF(PORT_SCIFA, 1, 0xe6c50000, evt2irq(0x0c20));
++SH7372_SCIF(PORT_SCIFA, 2, 0xe6c60000, evt2irq(0x0c40));
++SH7372_SCIF(PORT_SCIFA, 3, 0xe6c70000, evt2irq(0x0c60));
++SH7372_SCIF(PORT_SCIFA, 4, 0xe6c80000, evt2irq(0x0d20));
++SH7372_SCIF(PORT_SCIFA, 5, 0xe6cb0000, evt2irq(0x0d40));
++SH7372_SCIF(PORT_SCIFB, 6, 0xe6c30000, evt2irq(0x0d60));
+
+ /* CMT */
+ static struct sh_timer_config cmt2_platform_data = {
+--
+1.8.5.rc3
+
--- /dev/null
+From bb7fd8fd3d6b3ab7deae3853f13749dc0b184149 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:22 +0100
+Subject: ARM: shmobile: sh73a0: Use macros to declare SCIF devices
+
+Replace copy-n-paste SCIF platform data and device declaration with a
+macro. This reduces the amount of code and improves readability.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d000fff90a8d0e2cd5b437b3fbc3d3d5b8322cba)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-sh73a0.c | 187 +++++-----------------------------
+ 1 file changed, 27 insertions(+), 160 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
+index 65151c48cbd4..9c94f34d5399 100644
+--- a/arch/arm/mach-shmobile/setup-sh73a0.c
++++ b/arch/arm/mach-shmobile/setup-sh73a0.c
+@@ -71,167 +71,34 @@ void __init sh73a0_pinmux_init(void)
+ ARRAY_SIZE(pfc_resources));
+ }
+
+-static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xe6c40000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { gic_spi(72), gic_spi(72),
+- gic_spi(72), gic_spi(72) },
+-};
+-
+-static struct platform_device scif0_device = {
+- .name = "sh-sci",
+- .id = 0,
+- .dev = {
+- .platform_data = &scif0_platform_data,
+- },
+-};
+-
+-static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xe6c50000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { gic_spi(73), gic_spi(73),
+- gic_spi(73), gic_spi(73) },
+-};
+-
+-static struct platform_device scif1_device = {
+- .name = "sh-sci",
+- .id = 1,
+- .dev = {
+- .platform_data = &scif1_platform_data,
+- },
+-};
+-
+-static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xe6c60000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { gic_spi(74), gic_spi(74),
+- gic_spi(74), gic_spi(74) },
+-};
+-
+-static struct platform_device scif2_device = {
+- .name = "sh-sci",
+- .id = 2,
+- .dev = {
+- .platform_data = &scif2_platform_data,
+- },
+-};
+-
+-static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xe6c70000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { gic_spi(75), gic_spi(75),
+- gic_spi(75), gic_spi(75) },
+-};
+-
+-static struct platform_device scif3_device = {
+- .name = "sh-sci",
+- .id = 3,
+- .dev = {
+- .platform_data = &scif3_platform_data,
+- },
+-};
+-
+-static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xe6c80000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { gic_spi(78), gic_spi(78),
+- gic_spi(78), gic_spi(78) },
+-};
+-
+-static struct platform_device scif4_device = {
+- .name = "sh-sci",
+- .id = 4,
+- .dev = {
+- .platform_data = &scif4_platform_data,
+- },
+-};
+-
+-static struct plat_sci_port scif5_platform_data = {
+- .mapbase = 0xe6cb0000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { gic_spi(79), gic_spi(79),
+- gic_spi(79), gic_spi(79) },
+-};
+-
+-static struct platform_device scif5_device = {
+- .name = "sh-sci",
+- .id = 5,
+- .dev = {
+- .platform_data = &scif5_platform_data,
+- },
+-};
+-
+-static struct plat_sci_port scif6_platform_data = {
+- .mapbase = 0xe6cc0000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { gic_spi(156), gic_spi(156),
+- gic_spi(156), gic_spi(156) },
+-};
+-
+-static struct platform_device scif6_device = {
+- .name = "sh-sci",
+- .id = 6,
+- .dev = {
+- .platform_data = &scif6_platform_data,
+- },
+-};
+-
+-static struct plat_sci_port scif7_platform_data = {
+- .mapbase = 0xe6cd0000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = { gic_spi(143), gic_spi(143),
+- gic_spi(143), gic_spi(143) },
+-};
+-
+-static struct platform_device scif7_device = {
+- .name = "sh-sci",
+- .id = 7,
+- .dev = {
+- .platform_data = &scif7_platform_data,
+- },
+-};
+-
+-static struct plat_sci_port scif8_platform_data = {
+- .mapbase = 0xe6c30000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFB,
+- .irqs = { gic_spi(80), gic_spi(80),
+- gic_spi(80), gic_spi(80) },
+-};
++/* SCIF */
++#define SH73A0_SCIF(scif_type, index, baseaddr, irq) \
++static struct plat_sci_port scif##index##_platform_data = { \
++ .type = scif_type, \
++ .mapbase = baseaddr, \
++ .flags = UPF_BOOT_AUTOCONF, \
++ .irqs = SCIx_IRQ_MUXED(irq), \
++ .scbrr_algo_id = SCBRR_ALGO_4, \
++ .scscr = SCSCR_RE | SCSCR_TE, \
++}; \
++ \
++static struct platform_device scif##index##_device = { \
++ .name = "sh-sci", \
++ .id = index, \
++ .dev = { \
++ .platform_data = &scif##index##_platform_data, \
++ }, \
++}
+
+-static struct platform_device scif8_device = {
+- .name = "sh-sci",
+- .id = 8,
+- .dev = {
+- .platform_data = &scif8_platform_data,
+- },
+-};
++SH73A0_SCIF(PORT_SCIFA, 0, 0xe6c40000, gic_spi(72));
++SH73A0_SCIF(PORT_SCIFA, 1, 0xe6c50000, gic_spi(73));
++SH73A0_SCIF(PORT_SCIFA, 2, 0xe6c60000, gic_spi(74));
++SH73A0_SCIF(PORT_SCIFA, 3, 0xe6c70000, gic_spi(75));
++SH73A0_SCIF(PORT_SCIFA, 4, 0xe6c80000, gic_spi(78));
++SH73A0_SCIF(PORT_SCIFA, 5, 0xe6cb0000, gic_spi(79));
++SH73A0_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(156));
++SH73A0_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(143));
++SH73A0_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(80));
+
+ static struct sh_timer_config cmt10_platform_data = {
+ .name = "CMT10",
+--
+1.8.5.rc3
+
--- /dev/null
+From e4fc2e07c52c5f04eb320332f35b5dfcbf35b173 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:23 +0100
+Subject: ARM: shmobile: r8a7740: Use macros to declare SCIF devices
+
+Replace copy-n-paste SCIF platform data and device declaration with a
+macro. This reduces the amount of code and improves readability.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c9e06d8edc56d87c1882824c2896c7227aedb358)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7740.c | 191 +++++----------------------------
+ 1 file changed, 29 insertions(+), 162 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
+index b7d4b2c3bc29..8778b57ed7d9 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7740.c
++++ b/arch/arm/mach-shmobile/setup-r8a7740.c
+@@ -203,167 +203,34 @@ static struct platform_device irqpin3_device = {
+ },
+ };
+
+-/* SCIFA0 */
+-static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xe6c40000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(gic_spi(100)),
+-};
+-
+-static struct platform_device scif0_device = {
+- .name = "sh-sci",
+- .id = 0,
+- .dev = {
+- .platform_data = &scif0_platform_data,
+- },
+-};
+-
+-/* SCIFA1 */
+-static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xe6c50000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(gic_spi(101)),
+-};
+-
+-static struct platform_device scif1_device = {
+- .name = "sh-sci",
+- .id = 1,
+- .dev = {
+- .platform_data = &scif1_platform_data,
+- },
+-};
+-
+-/* SCIFA2 */
+-static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xe6c60000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(gic_spi(102)),
+-};
+-
+-static struct platform_device scif2_device = {
+- .name = "sh-sci",
+- .id = 2,
+- .dev = {
+- .platform_data = &scif2_platform_data,
+- },
+-};
+-
+-/* SCIFA3 */
+-static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xe6c70000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(gic_spi(103)),
+-};
+-
+-static struct platform_device scif3_device = {
+- .name = "sh-sci",
+- .id = 3,
+- .dev = {
+- .platform_data = &scif3_platform_data,
+- },
+-};
+-
+-/* SCIFA4 */
+-static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xe6c80000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(gic_spi(104)),
+-};
+-
+-static struct platform_device scif4_device = {
+- .name = "sh-sci",
+- .id = 4,
+- .dev = {
+- .platform_data = &scif4_platform_data,
+- },
+-};
+-
+-/* SCIFA5 */
+-static struct plat_sci_port scif5_platform_data = {
+- .mapbase = 0xe6cb0000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(gic_spi(105)),
+-};
+-
+-static struct platform_device scif5_device = {
+- .name = "sh-sci",
+- .id = 5,
+- .dev = {
+- .platform_data = &scif5_platform_data,
+- },
+-};
+-
+-/* SCIFA6 */
+-static struct plat_sci_port scif6_platform_data = {
+- .mapbase = 0xe6cc0000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(gic_spi(106)),
+-};
+-
+-static struct platform_device scif6_device = {
+- .name = "sh-sci",
+- .id = 6,
+- .dev = {
+- .platform_data = &scif6_platform_data,
+- },
+-};
+-
+-/* SCIFA7 */
+-static struct plat_sci_port scif7_platform_data = {
+- .mapbase = 0xe6cd0000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFA,
+- .irqs = SCIx_IRQ_MUXED(gic_spi(107)),
+-};
+-
+-static struct platform_device scif7_device = {
+- .name = "sh-sci",
+- .id = 7,
+- .dev = {
+- .platform_data = &scif7_platform_data,
+- },
+-};
+-
+-/* SCIFB */
+-static struct plat_sci_port scifb_platform_data = {
+- .mapbase = 0xe6c30000,
+- .flags = UPF_BOOT_AUTOCONF,
+- .scscr = SCSCR_RE | SCSCR_TE,
+- .scbrr_algo_id = SCBRR_ALGO_4,
+- .type = PORT_SCIFB,
+- .irqs = SCIx_IRQ_MUXED(gic_spi(108)),
+-};
++/* SCIF */
++#define R8A7740_SCIF(scif_type, index, baseaddr, irq) \
++static struct plat_sci_port scif##index##_platform_data = { \
++ .type = scif_type, \
++ .mapbase = baseaddr, \
++ .flags = UPF_BOOT_AUTOCONF, \
++ .irqs = SCIx_IRQ_MUXED(irq), \
++ .scbrr_algo_id = SCBRR_ALGO_4, \
++ .scscr = SCSCR_RE | SCSCR_TE, \
++}; \
++ \
++static struct platform_device scif##index##_device = { \
++ .name = "sh-sci", \
++ .id = index, \
++ .dev = { \
++ .platform_data = &scif##index##_platform_data, \
++ }, \
++}
+
+-static struct platform_device scifb_device = {
+- .name = "sh-sci",
+- .id = 8,
+- .dev = {
+- .platform_data = &scifb_platform_data,
+- },
+-};
++R8A7740_SCIF(PORT_SCIFA, 0, 0xe6c40000, gic_spi(100));
++R8A7740_SCIF(PORT_SCIFA, 1, 0xe6c50000, gic_spi(101));
++R8A7740_SCIF(PORT_SCIFA, 2, 0xe6c60000, gic_spi(102));
++R8A7740_SCIF(PORT_SCIFA, 3, 0xe6c70000, gic_spi(103));
++R8A7740_SCIF(PORT_SCIFA, 4, 0xe6c80000, gic_spi(104));
++R8A7740_SCIF(PORT_SCIFA, 5, 0xe6cb0000, gic_spi(105));
++R8A7740_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(106));
++R8A7740_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(107));
++R8A7740_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(108));
+
+ /* CMT */
+ static struct sh_timer_config cmt10_platform_data = {
+@@ -528,7 +395,7 @@ static struct platform_device *r8a7740_devices_dt[] __initdata = {
+ &scif5_device,
+ &scif6_device,
+ &scif7_device,
+- &scifb_device,
++ &scif8_device,
+ &cmt10_device,
+ };
+
+@@ -981,7 +848,7 @@ void __init r8a7740_add_standard_devices(void)
+ rmobile_add_device_to_domain("A3SP", &scif5_device);
+ rmobile_add_device_to_domain("A3SP", &scif6_device);
+ rmobile_add_device_to_domain("A3SP", &scif7_device);
+- rmobile_add_device_to_domain("A3SP", &scifb_device);
++ rmobile_add_device_to_domain("A3SP", &scif8_device);
+ rmobile_add_device_to_domain("A3SP", &i2c1_device);
+ }
+
+--
+1.8.5.rc3
+
--- /dev/null
+From eb1932d7f75229dc87de71f8e3ecc4e4467807ba Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:24 +0100
+Subject: ARM: shmobile: r8a7779: Use macros to declare SCIF devices
+
+Replace copy-n-paste SCIF platform data and device declaration with a
+macro. This reduces the amount of code and improves readability.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit efced000744f9d2f9565d8a158967ac8f63ae23d)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7779.c | 124 +++++++--------------------------
+ 1 file changed, 24 insertions(+), 100 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
+index 8f9453152fb9..df418f16d82d 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7779.c
++++ b/arch/arm/mach-shmobile/setup-r8a7779.c
+@@ -188,107 +188,31 @@ void __init r8a7779_pinmux_init(void)
+ ARRAY_SIZE(r8a7779_pinctrl_devices));
+ }
+
+-static struct plat_sci_port scif0_platform_data = {
+- .mapbase = 0xffe40000,
+- .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+- .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+- .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(gic_iid(0x78)),
+-};
+-
+-static struct platform_device scif0_device = {
+- .name = "sh-sci",
+- .id = 0,
+- .dev = {
+- .platform_data = &scif0_platform_data,
+- },
+-};
+-
+-static struct plat_sci_port scif1_platform_data = {
+- .mapbase = 0xffe41000,
+- .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+- .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+- .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(gic_iid(0x79)),
+-};
+-
+-static struct platform_device scif1_device = {
+- .name = "sh-sci",
+- .id = 1,
+- .dev = {
+- .platform_data = &scif1_platform_data,
+- },
+-};
+-
+-static struct plat_sci_port scif2_platform_data = {
+- .mapbase = 0xffe42000,
+- .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+- .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+- .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(gic_iid(0x7a)),
+-};
+-
+-static struct platform_device scif2_device = {
+- .name = "sh-sci",
+- .id = 2,
+- .dev = {
+- .platform_data = &scif2_platform_data,
+- },
+-};
+-
+-static struct plat_sci_port scif3_platform_data = {
+- .mapbase = 0xffe43000,
+- .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+- .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+- .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(gic_iid(0x7b)),
+-};
+-
+-static struct platform_device scif3_device = {
+- .name = "sh-sci",
+- .id = 3,
+- .dev = {
+- .platform_data = &scif3_platform_data,
+- },
+-};
+-
+-static struct plat_sci_port scif4_platform_data = {
+- .mapbase = 0xffe44000,
+- .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+- .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+- .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(gic_iid(0x7c)),
+-};
+-
+-static struct platform_device scif4_device = {
+- .name = "sh-sci",
+- .id = 4,
+- .dev = {
+- .platform_data = &scif4_platform_data,
+- },
+-};
+-
+-static struct plat_sci_port scif5_platform_data = {
+- .mapbase = 0xffe45000,
+- .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+- .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
+- .scbrr_algo_id = SCBRR_ALGO_2,
+- .type = PORT_SCIF,
+- .irqs = SCIx_IRQ_MUXED(gic_iid(0x7d)),
+-};
++/* SCIF */
++#define R8A7779_SCIF(index, baseaddr, irq) \
++static struct plat_sci_port scif##index##_platform_data = { \
++ .type = PORT_SCIF, \
++ .mapbase = baseaddr, \
++ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
++ .irqs = SCIx_IRQ_MUXED(irq), \
++ .scbrr_algo_id = SCBRR_ALGO_2, \
++ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \
++}; \
++ \
++static struct platform_device scif##index##_device = { \
++ .name = "sh-sci", \
++ .id = index, \
++ .dev = { \
++ .platform_data = &scif##index##_platform_data, \
++ }, \
++}
+
+-static struct platform_device scif5_device = {
+- .name = "sh-sci",
+- .id = 5,
+- .dev = {
+- .platform_data = &scif5_platform_data,
+- },
+-};
++R8A7779_SCIF(0, 0xffe40000, gic_iid(0x78));
++R8A7779_SCIF(1, 0xffe41000, gic_iid(0x79));
++R8A7779_SCIF(2, 0xffe42000, gic_iid(0x7a));
++R8A7779_SCIF(3, 0xffe43000, gic_iid(0x7b));
++R8A7779_SCIF(4, 0xffe44000, gic_iid(0x7c));
++R8A7779_SCIF(5, 0xffe45000, gic_iid(0x7d));
+
+ /* TMU */
+ static struct sh_timer_config tmu00_platform_data = {
+--
+1.8.5.rc3
+
--- /dev/null
+From 778bca58cf3ed945675ceb9f304c5ac59e79bb79 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:26 +0100
+Subject: ARM: shmobile: r8a73a4: Don't define SCIF platform data in an array
+
+The SCIF driver is transitioning to platform resources. Board code will
+thus need to define an array of resources for each SCIF device. This is
+incompatible with the macro-based SCIF platform data definition as an
+array. Rework the macro to define platform data as individual
+structures.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4d32e834e19c34dcb510a7645ee8139c7e87bce4)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a73a4.c | 58 +++++++++++++++-------------------
+ 1 file changed, 26 insertions(+), 32 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
+index cc94b64c2ef5..605298b2ffe5 100644
+--- a/arch/arm/mach-shmobile/setup-r8a73a4.c
++++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
+@@ -40,41 +40,35 @@ void __init r8a73a4_pinmux_init(void)
+ ARRAY_SIZE(pfc_resources));
+ }
+
+-#define SCIF_COMMON(scif_type, baseaddr, irq) \
++#define R8A73A4_SCIF(scif_type, _scscr, index, baseaddr, irq) \
++static struct plat_sci_port scif##index##_platform_data = { \
+ .type = scif_type, \
+ .mapbase = baseaddr, \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+ .scbrr_algo_id = SCBRR_ALGO_4, \
+- .irqs = SCIx_IRQ_MUXED(irq)
+-
+-#define SCIFA_DATA(index, baseaddr, irq) \
+-[index] = { \
+- SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \
+- .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
++ .scscr = _scscr, \
++ .irqs = SCIx_IRQ_MUXED(irq), \
+ }
+
+-#define SCIFB_DATA(index, baseaddr, irq) \
+-[index] = { \
+- SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
+- .scscr = SCSCR_RE | SCSCR_TE, \
+-}
++#define R8A73A4_SCIFA(index, baseaddr, irq) \
++ R8A73A4_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
++ index, baseaddr, irq)
+
+-enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFB3 };
++#define R8A73A4_SCIFB(index, baseaddr, irq) \
++ R8A73A4_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \
++ index, baseaddr, irq)
+
+-static const struct plat_sci_port scif[] = {
+- SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
+- SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
+- SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
+- SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
+- SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
+- SCIFB_DATA(SCIFB3, 0xe6cf0000, gic_spi(151)), /* SCIFB3 */
+-};
++R8A73A4_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
++R8A73A4_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
++R8A73A4_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */
++R8A73A4_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */
++R8A73A4_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
++R8A73A4_SCIFB(5, 0xe6cf0000, gic_spi(151)); /* SCIFB3 */
+
+-static inline void r8a73a4_register_scif(int idx)
+-{
+- platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
+- sizeof(struct plat_sci_port));
+-}
++#define r8a73a4_register_scif(index) \
++ platform_device_register_data(&platform_bus, "sh-sci", index, \
++ &scif##index##_platform_data, \
++ sizeof(scif##index##_platform_data))
+
+ static const struct renesas_irqc_config irqc0_data = {
+ .irq_base = irq_pin(0), /* IRQ0 -> IRQ31 */
+@@ -192,12 +186,12 @@ static struct resource cmt10_resources[] = {
+
+ void __init r8a73a4_add_dt_devices(void)
+ {
+- r8a73a4_register_scif(SCIFA0);
+- r8a73a4_register_scif(SCIFA1);
+- r8a73a4_register_scif(SCIFB0);
+- r8a73a4_register_scif(SCIFB1);
+- r8a73a4_register_scif(SCIFB2);
+- r8a73a4_register_scif(SCIFB3);
++ r8a73a4_register_scif(0);
++ r8a73a4_register_scif(1);
++ r8a73a4_register_scif(2);
++ r8a73a4_register_scif(3);
++ r8a73a4_register_scif(4);
++ r8a73a4_register_scif(5);
+ r8a7790_register_cmt(10);
+ }
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 26ccb2b8359419778acd0a7b6eefa2be82e5ff74 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:25 +0100
+Subject: ARM: shmobile: r7s72100: Don't define SCIF platform data in an array
+
+The SCIF driver is transitioning to platform resources. Board code will
+thus need to define an array of resources for each SCIF device. This is
+incompatible with the macro-based SCIF platform data definition as an
+array. Rework the macro to define platform data as individual
+structures.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a958a31eb021a2c8ce24c718fcbf00d915f38e78)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r7s72100.c | 49 +++++++++++++++------------------
+ 1 file changed, 22 insertions(+), 27 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
+index 55f0b9c7c482..6ae7e3257bf3 100644
+--- a/arch/arm/mach-shmobile/setup-r7s72100.c
++++ b/arch/arm/mach-shmobile/setup-r7s72100.c
+@@ -28,8 +28,8 @@
+ #include <mach/r7s72100.h>
+ #include <asm/mach/arch.h>
+
+-#define SCIF_DATA(index, baseaddr, irq) \
+-[index] = { \
++#define R7S72100_SCIF(index, baseaddr, irq) \
++static const struct plat_sci_port scif##index##_platform_data = { \
+ .type = PORT_SCIF, \
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+@@ -40,24 +40,19 @@
+ .irqs = { irq + 1, irq + 2, irq + 3, irq }, \
+ }
+
+-enum { SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7 };
++R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
++R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
++R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
++R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
++R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
++R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
++R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
++R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
+
+-static const struct plat_sci_port scif[] __initconst = {
+- SCIF_DATA(SCIF0, 0xe8007000, gic_iid(221)), /* SCIF0 */
+- SCIF_DATA(SCIF1, 0xe8007800, gic_iid(225)), /* SCIF1 */
+- SCIF_DATA(SCIF2, 0xe8008000, gic_iid(229)), /* SCIF2 */
+- SCIF_DATA(SCIF3, 0xe8008800, gic_iid(233)), /* SCIF3 */
+- SCIF_DATA(SCIF4, 0xe8009000, gic_iid(237)), /* SCIF4 */
+- SCIF_DATA(SCIF5, 0xe8009800, gic_iid(241)), /* SCIF5 */
+- SCIF_DATA(SCIF6, 0xe800a000, gic_iid(245)), /* SCIF6 */
+- SCIF_DATA(SCIF7, 0xe800a800, gic_iid(249)), /* SCIF7 */
+-};
+-
+-static inline void r7s72100_register_scif(int idx)
+-{
+- platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
+- sizeof(struct plat_sci_port));
+-}
++#define r7s72100_register_scif(index) \
++ platform_device_register_data(&platform_bus, "sh-sci", index, \
++ &scif##index##_platform_data, \
++ sizeof(scif##index##_platform_data))
+
+
+ static struct sh_timer_config mtu2_0_platform_data __initdata = {
+@@ -81,14 +76,14 @@ static struct resource mtu2_0_resources[] __initdata = {
+
+ void __init r7s72100_add_dt_devices(void)
+ {
+- r7s72100_register_scif(SCIF0);
+- r7s72100_register_scif(SCIF1);
+- r7s72100_register_scif(SCIF2);
+- r7s72100_register_scif(SCIF3);
+- r7s72100_register_scif(SCIF4);
+- r7s72100_register_scif(SCIF5);
+- r7s72100_register_scif(SCIF6);
+- r7s72100_register_scif(SCIF7);
++ r7s72100_register_scif(0);
++ r7s72100_register_scif(1);
++ r7s72100_register_scif(2);
++ r7s72100_register_scif(3);
++ r7s72100_register_scif(4);
++ r7s72100_register_scif(5);
++ r7s72100_register_scif(6);
++ r7s72100_register_scif(7);
+ r7s72100_register_mtu2(0);
+ }
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 2a951e6d8c0437bcf6acb70dd8d945251466094a Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:27 +0100
+Subject: ARM: shmobile: r8a7778: Don't define SCIF platform data in an array
+
+The SCIF driver is transitioning to platform resources. Board code will
+thus need to define an array of resources for each SCIF device. This is
+incompatible with the macro-based SCIF platform data definition as an
+array. Rework the macro to define platform data as individual
+structures.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ecbcd715f098bf4b870ae5bd0f9b572987b3b219)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7778.c | 36 ++++++++++++++++++----------------
+ 1 file changed, 19 insertions(+), 17 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
+index 7ea6308e5da8..210c66315dd9 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7778.c
++++ b/arch/arm/mach-shmobile/setup-r8a7778.c
+@@ -44,8 +44,8 @@
+ #include <asm/hardware/cache-l2x0.h>
+
+ /* SCIF */
+-#define SCIF_INFO(baseaddr, irq) \
+-{ \
++#define R8A7778_SCIF(index, baseaddr, irq) \
++static struct plat_sci_port scif##index##_platform_data = { \
+ .mapbase = baseaddr, \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \
+@@ -54,14 +54,17 @@
+ .irqs = SCIx_IRQ_MUXED(irq), \
+ }
+
+-static struct plat_sci_port scif_platform_data[] __initdata = {
+- SCIF_INFO(0xffe40000, gic_iid(0x66)),
+- SCIF_INFO(0xffe41000, gic_iid(0x67)),
+- SCIF_INFO(0xffe42000, gic_iid(0x68)),
+- SCIF_INFO(0xffe43000, gic_iid(0x69)),
+- SCIF_INFO(0xffe44000, gic_iid(0x6a)),
+- SCIF_INFO(0xffe45000, gic_iid(0x6b)),
+-};
++R8A7778_SCIF(0, 0xffe40000, gic_iid(0x66));
++R8A7778_SCIF(1, 0xffe41000, gic_iid(0x67));
++R8A7778_SCIF(2, 0xffe42000, gic_iid(0x68));
++R8A7778_SCIF(3, 0xffe43000, gic_iid(0x69));
++R8A7778_SCIF(4, 0xffe44000, gic_iid(0x6a));
++R8A7778_SCIF(5, 0xffe45000, gic_iid(0x6b));
++
++#define r8a7778_register_scif(index) \
++ platform_device_register_data(&platform_bus, "sh-sci", index, \
++ &scif##index##_platform_data, \
++ sizeof(scif##index##_platform_data))
+
+ /* TMU */
+ static struct resource sh_tmu0_resources[] __initdata = {
+@@ -287,8 +290,6 @@ static void __init r8a7778_register_hspi(int id)
+
+ void __init r8a7778_add_dt_devices(void)
+ {
+- int i;
+-
+ #ifdef CONFIG_CACHE_L2X0
+ void __iomem *base = ioremap_nocache(0xf0100000, 0x1000);
+ if (base) {
+@@ -300,11 +301,12 @@ void __init r8a7778_add_dt_devices(void)
+ }
+ #endif
+
+- for (i = 0; i < ARRAY_SIZE(scif_platform_data); i++)
+- platform_device_register_data(&platform_bus, "sh-sci", i,
+- &scif_platform_data[i],
+- sizeof(struct plat_sci_port));
+-
++ r8a7778_register_scif(0);
++ r8a7778_register_scif(1);
++ r8a7778_register_scif(2);
++ r8a7778_register_scif(3);
++ r8a7778_register_scif(4);
++ r8a7778_register_scif(5);
+ r8a7778_register_tmu(0);
+ r8a7778_register_tmu(1);
+ }
+--
+1.8.5.rc3
+
--- /dev/null
+From bd2c2cbe8d27717930a29993b9b83aa17ecf433a Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:29 +0100
+Subject: ARM: shmobile: r8a7791: Don't define SCIF platform data in an array
+
+The SCIF driver is transitioning to platform resources. Board code will
+thus need to define an array of resources for each SCIF device. This is
+incompatible with the macro-based SCIF platform data definition as an
+array. Rework the macro to define platform data as individual
+structures.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 135d0e602a2f2700bcbde8315000e21cbdc4208e)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7791.c | 125 ++++++++++++++-------------------
+ 1 file changed, 52 insertions(+), 73 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
+index cddca99b434f..3fe0d7de08fc 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7791.c
++++ b/arch/arm/mach-shmobile/setup-r8a7791.c
+@@ -84,66 +84,45 @@ void __init r8a7791_pinmux_init(void)
+ r8a7791_register_gpio(7);
+ }
+
+-#define SCIF_COMMON(scif_type, baseaddr, irq) \
+- .type = scif_type, \
+- .mapbase = baseaddr, \
+- .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+- .irqs = SCIx_IRQ_MUXED(irq)
+-
+-#define SCIFA_DATA(index, baseaddr, irq) \
+-[index] = { \
+- SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \
+- .scbrr_algo_id = SCBRR_ALGO_4, \
+- .scscr = SCSCR_RE | SCSCR_TE, \
++#define __R8A7791_SCIF(scif_type, algo, index, baseaddr, irq) \
++static struct plat_sci_port scif##index##_platform_data = { \
++ .type = scif_type, \
++ .mapbase = baseaddr, \
++ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
++ .scbrr_algo_id = algo, \
++ .scscr = SCSCR_RE | SCSCR_TE, \
++ .irqs = SCIx_IRQ_MUXED(irq), \
+ }
+
+-#define SCIFB_DATA(index, baseaddr, irq) \
+-[index] = { \
+- SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
+- .scbrr_algo_id = SCBRR_ALGO_4, \
+- .scscr = SCSCR_RE | SCSCR_TE, \
+-}
+-
+-#define SCIF_DATA(index, baseaddr, irq) \
+-[index] = { \
+- SCIF_COMMON(PORT_SCIF, baseaddr, irq), \
+- .scbrr_algo_id = SCBRR_ALGO_2, \
+- .scscr = SCSCR_RE | SCSCR_TE, \
+-}
+-
+-#define HSCIF_DATA(index, baseaddr, irq) \
+-[index] = { \
+- SCIF_COMMON(PORT_HSCIF, baseaddr, irq), \
+- .scbrr_algo_id = SCBRR_ALGO_6, \
+- .scscr = SCSCR_RE | SCSCR_TE, \
+-}
+-
+-enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
+- SCIF2, SCIF3, SCIF4, SCIF5, SCIFA3, SCIFA4, SCIFA5 };
+-
+-static const struct plat_sci_port scif[] __initconst = {
+- SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
+- SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
+- SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
+- SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
+- SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
+- SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
+- SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
+- SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
+- SCIF_DATA(SCIF2, 0xe6e58000, gic_spi(22)), /* SCIF2 */
+- SCIF_DATA(SCIF3, 0xe6ea8000, gic_spi(23)), /* SCIF3 */
+- SCIF_DATA(SCIF4, 0xe6ee0000, gic_spi(24)), /* SCIF4 */
+- SCIF_DATA(SCIF5, 0xe6ee8000, gic_spi(25)), /* SCIF5 */
+- SCIFA_DATA(SCIFA3, 0xe6c70000, gic_spi(29)), /* SCIFA3 */
+- SCIFA_DATA(SCIFA4, 0xe6c78000, gic_spi(30)), /* SCIFA4 */
+- SCIFA_DATA(SCIFA5, 0xe6c80000, gic_spi(31)), /* SCIFA5 */
+-};
+-
+-static inline void r8a7791_register_scif(int idx)
+-{
+- platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
+- sizeof(struct plat_sci_port));
+-}
++#define R8A7791_SCIF(index, baseaddr, irq) \
++ __R8A7791_SCIF(PORT_SCIF, SCBRR_ALGO_2, index, baseaddr, irq)
++
++#define R8A7791_SCIFA(index, baseaddr, irq) \
++ __R8A7791_SCIF(PORT_SCIFA, SCBRR_ALGO_4, index, baseaddr, irq)
++
++#define R8A7791_SCIFB(index, baseaddr, irq) \
++ __R8A7791_SCIF(PORT_SCIFB, SCBRR_ALGO_4, index, baseaddr, irq)
++
++R8A7791_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
++R8A7791_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
++R8A7791_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */
++R8A7791_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */
++R8A7791_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
++R8A7791_SCIFA(5, 0xe6c60000, gic_spi(151)); /* SCIFA2 */
++R8A7791_SCIF(6, 0xe6e60000, gic_spi(152)); /* SCIF0 */
++R8A7791_SCIF(7, 0xe6e68000, gic_spi(153)); /* SCIF1 */
++R8A7791_SCIF(8, 0xe6e58000, gic_spi(22)); /* SCIF2 */
++R8A7791_SCIF(9, 0xe6ea8000, gic_spi(23)); /* SCIF3 */
++R8A7791_SCIF(10, 0xe6ee0000, gic_spi(24)); /* SCIF4 */
++R8A7791_SCIF(11, 0xe6ee8000, gic_spi(25)); /* SCIF5 */
++R8A7791_SCIFA(12, 0xe6c70000, gic_spi(29)); /* SCIFA3 */
++R8A7791_SCIFA(13, 0xe6c78000, gic_spi(30)); /* SCIFA4 */
++R8A7791_SCIFA(14, 0xe6c80000, gic_spi(31)); /* SCIFA5 */
++
++#define r8a7791_register_scif(index) \
++ platform_device_register_data(&platform_bus, "sh-sci", index, \
++ &scif##index##_platform_data, \
++ sizeof(scif##index##_platform_data))
+
+ static const struct sh_timer_config cmt00_platform_data __initconst = {
+ .name = "CMT00",
+@@ -202,21 +181,21 @@ static const struct resource thermal_resources[] __initconst = {
+
+ void __init r8a7791_add_dt_devices(void)
+ {
+- r8a7791_register_scif(SCIFA0);
+- r8a7791_register_scif(SCIFA1);
+- r8a7791_register_scif(SCIFB0);
+- r8a7791_register_scif(SCIFB1);
+- r8a7791_register_scif(SCIFB2);
+- r8a7791_register_scif(SCIFA2);
+- r8a7791_register_scif(SCIF0);
+- r8a7791_register_scif(SCIF1);
+- r8a7791_register_scif(SCIF2);
+- r8a7791_register_scif(SCIF3);
+- r8a7791_register_scif(SCIF4);
+- r8a7791_register_scif(SCIF5);
+- r8a7791_register_scif(SCIFA3);
+- r8a7791_register_scif(SCIFA4);
+- r8a7791_register_scif(SCIFA5);
++ r8a7791_register_scif(0);
++ r8a7791_register_scif(1);
++ r8a7791_register_scif(2);
++ r8a7791_register_scif(3);
++ r8a7791_register_scif(4);
++ r8a7791_register_scif(5);
++ r8a7791_register_scif(6);
++ r8a7791_register_scif(7);
++ r8a7791_register_scif(8);
++ r8a7791_register_scif(9);
++ r8a7791_register_scif(10);
++ r8a7791_register_scif(11);
++ r8a7791_register_scif(12);
++ r8a7791_register_scif(13);
++ r8a7791_register_scif(14);
+ r8a7791_register_cmt(00);
+ }
+
+--
+1.8.5.rc3
+
--- /dev/null
+From 8ed00eae0c585899673859255ff6bee4b2ddd007 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sun, 3 Nov 2013 13:50:31 +0100
+Subject: ARM: shmobile: r8a7790: Don't define SCIF platform data in an array
+
+The SCIF driver is transitioning to platform resources. Board code will
+thus need to define an array of resources for each SCIF device. This is
+incompatible with the macro-based SCIF platform data definition as an
+array. Rework the macro to define platform data as individual
+structures.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 302d8898ade1ad5f84cfedc7e8d43ff7720f3f25)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7790.c | 112 +++++++++++++++------------------
+ 1 file changed, 49 insertions(+), 63 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
+index 8474818a7ae0..a9bcc56ffe01 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7790.c
++++ b/arch/arm/mach-shmobile/setup-r8a7790.c
+@@ -103,61 +103,47 @@ void __init r8a7790_pinmux_init(void)
+ r8a7790_register_i2c(3);
+ }
+
+-#define SCIF_COMMON(scif_type, baseaddr, irq) \
+- .type = scif_type, \
+- .mapbase = baseaddr, \
+- .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+- .irqs = SCIx_IRQ_MUXED(irq)
+-
+-#define SCIFA_DATA(index, baseaddr, irq) \
+-[index] = { \
+- SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \
+- .scbrr_algo_id = SCBRR_ALGO_4, \
+- .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
++#define __R8A7790_SCIF(scif_type, _scscr, algo, index, baseaddr, irq) \
++static struct plat_sci_port scif##index##_platform_data = { \
++ .type = scif_type, \
++ .mapbase = baseaddr, \
++ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
++ .scbrr_algo_id = algo, \
++ .scscr = _scscr, \
++ .irqs = SCIx_IRQ_MUXED(irq), \
+ }
+
+-#define SCIFB_DATA(index, baseaddr, irq) \
+-[index] = { \
+- SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
+- .scbrr_algo_id = SCBRR_ALGO_4, \
+- .scscr = SCSCR_RE | SCSCR_TE, \
+-}
+-
+-#define SCIF_DATA(index, baseaddr, irq) \
+-[index] = { \
+- SCIF_COMMON(PORT_SCIF, baseaddr, irq), \
+- .scbrr_algo_id = SCBRR_ALGO_2, \
+- .scscr = SCSCR_RE | SCSCR_TE, \
+-}
+-
+-#define HSCIF_DATA(index, baseaddr, irq) \
+-[index] = { \
+- SCIF_COMMON(PORT_HSCIF, baseaddr, irq), \
+- .scbrr_algo_id = SCBRR_ALGO_6, \
+- .scscr = SCSCR_RE | SCSCR_TE, \
+-}
+-
+-enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
+- HSCIF0, HSCIF1 };
+-
+-static const struct plat_sci_port scif[] __initconst = {
+- SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
+- SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
+- SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
+- SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
+- SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
+- SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
+- SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
+- SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
+- HSCIF_DATA(HSCIF0, 0xe62c0000, gic_spi(154)), /* HSCIF0 */
+- HSCIF_DATA(HSCIF1, 0xe62c8000, gic_spi(155)), /* HSCIF1 */
+-};
+-
+-static inline void r8a7790_register_scif(int idx)
+-{
+- platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
+- sizeof(struct plat_sci_port));
+-}
++#define R8A7790_SCIF(index, baseaddr, irq) \
++ __R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE, \
++ SCBRR_ALGO_2, index, baseaddr, irq)
++
++#define R8A7790_SCIFA(index, baseaddr, irq) \
++ __R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
++ SCBRR_ALGO_4, index, baseaddr, irq)
++
++#define R8A7790_SCIFB(index, baseaddr, irq) \
++ __R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \
++ SCBRR_ALGO_4, index, baseaddr, irq)
++
++#define R8A7790_HSCIF(index, baseaddr, irq) \
++ __R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE, \
++ SCBRR_ALGO_6, index, baseaddr, irq)
++
++R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
++R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
++R8A7790_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */
++R8A7790_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */
++R8A7790_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
++R8A7790_SCIFA(5, 0xe6c60000, gic_spi(151)); /* SCIFA2 */
++R8A7790_SCIF(6, 0xe6e60000, gic_spi(152)); /* SCIF0 */
++R8A7790_SCIF(7, 0xe6e68000, gic_spi(153)); /* SCIF1 */
++R8A7790_HSCIF(8, 0xe62c0000, gic_spi(154)); /* HSCIF0 */
++R8A7790_HSCIF(9, 0xe62c8000, gic_spi(155)); /* HSCIF1 */
++
++#define r8a7790_register_scif(index) \
++ platform_device_register_data(&platform_bus, "sh-sci", index, \
++ &scif##index##_platform_data, \
++ sizeof(scif##index##_platform_data))
+
+ static const struct renesas_irqc_config irqc0_data __initconst = {
+ .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
+@@ -210,16 +196,16 @@ static const struct resource cmt00_resources[] __initconst = {
+
+ void __init r8a7790_add_dt_devices(void)
+ {
+- r8a7790_register_scif(SCIFA0);
+- r8a7790_register_scif(SCIFA1);
+- r8a7790_register_scif(SCIFB0);
+- r8a7790_register_scif(SCIFB1);
+- r8a7790_register_scif(SCIFB2);
+- r8a7790_register_scif(SCIFA2);
+- r8a7790_register_scif(SCIF0);
+- r8a7790_register_scif(SCIF1);
+- r8a7790_register_scif(HSCIF0);
+- r8a7790_register_scif(HSCIF1);
++ r8a7790_register_scif(0);
++ r8a7790_register_scif(1);
++ r8a7790_register_scif(2);
++ r8a7790_register_scif(3);
++ r8a7790_register_scif(4);
++ r8a7790_register_scif(5);
++ r8a7790_register_scif(6);
++ r8a7790_register_scif(7);
++ r8a7790_register_scif(8);
++ r8a7790_register_scif(9);
+ r8a7790_register_cmt(00);
+ }
+
+--
+1.8.5.rc3
+
--- /dev/null
+From fafb6403c8132d0af74661d37b99a140ff6ce052 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:30 +0100
+Subject: ARM: shmobile: sh7372: Declare SCIF register base and IRQ as
+ resources
+
+Passing the register base address and IRQ through platform data is
+deprecated. Use resources instead.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d39f98b3bb1f56180997442ee59e0d60ef2b71b8)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-sh7372.c | 9 +++++++--
+ 1 file changed, 7 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
+index 77627dd422b0..798f8acc6195 100644
+--- a/arch/arm/mach-shmobile/setup-sh7372.c
++++ b/arch/arm/mach-shmobile/setup-sh7372.c
+@@ -90,16 +90,21 @@ void __init sh7372_pinmux_init(void)
+ #define SH7372_SCIF(scif_type, index, baseaddr, irq) \
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = scif_type, \
+- .mapbase = baseaddr, \
+ .flags = UPF_BOOT_AUTOCONF, \
+- .irqs = SCIx_IRQ_MUXED(irq), \
+ .scbrr_algo_id = SCBRR_ALGO_4, \
+ .scscr = SCSCR_RE | SCSCR_TE, \
+ }; \
+ \
++static struct resource scif##index##_resources[] = { \
++ DEFINE_RES_MEM(baseaddr, 0x100), \
++ DEFINE_RES_IRQ(irq), \
++}; \
++ \
+ static struct platform_device scif##index##_device = { \
+ .name = "sh-sci", \
+ .id = index, \
++ .resource = scif##index##_resources, \
++ .num_resources = ARRAY_SIZE(scif##index##_resources), \
+ .dev = { \
+ .platform_data = &scif##index##_platform_data, \
+ }, \
+--
+1.8.5.rc3
+
--- /dev/null
+From ba2bb03dec04bfe41b23b72b07bd6a9cdb6a9b4f Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:31 +0100
+Subject: ARM: shmobile: sh73a0: Declare SCIF register base and IRQ as
+ resources
+
+Passing the register base address and IRQ through platform data is
+deprecated. Use resources instead.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 31e1ee86b16b2f0e3c7237582c1f10886189d3c2)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-sh73a0.c | 9 +++++++--
+ 1 file changed, 7 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
+index 9c94f34d5399..55ed98ff087c 100644
+--- a/arch/arm/mach-shmobile/setup-sh73a0.c
++++ b/arch/arm/mach-shmobile/setup-sh73a0.c
+@@ -75,16 +75,21 @@ void __init sh73a0_pinmux_init(void)
+ #define SH73A0_SCIF(scif_type, index, baseaddr, irq) \
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = scif_type, \
+- .mapbase = baseaddr, \
+ .flags = UPF_BOOT_AUTOCONF, \
+- .irqs = SCIx_IRQ_MUXED(irq), \
+ .scbrr_algo_id = SCBRR_ALGO_4, \
+ .scscr = SCSCR_RE | SCSCR_TE, \
+ }; \
+ \
++static struct resource scif##index##_resources[] = { \
++ DEFINE_RES_MEM(baseaddr, 0x100), \
++ DEFINE_RES_IRQ(irq), \
++}; \
++ \
+ static struct platform_device scif##index##_device = { \
+ .name = "sh-sci", \
+ .id = index, \
++ .resource = scif##index##_resources, \
++ .num_resources = ARRAY_SIZE(scif##index##_resources), \
+ .dev = { \
+ .platform_data = &scif##index##_platform_data, \
+ }, \
+--
+1.8.5.rc3
+
--- /dev/null
+From fa113edf8c35fb7a5113f2ab0b4bf48804be2026 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:32 +0100
+Subject: ARM: shmobile: r7s72100: Declare SCIF register base and IRQ as
+ resources
+
+Passing the register base address and IRQ through platform data is
+deprecated. Use resources instead.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 572f218095dcca5b2e02923c68a152f5f506bfd4)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r7s72100.c | 20 ++++++++++++++------
+ 1 file changed, 14 insertions(+), 6 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
+index 6ae7e3257bf3..81b995bb1a56 100644
+--- a/arch/arm/mach-shmobile/setup-r7s72100.c
++++ b/arch/arm/mach-shmobile/setup-r7s72100.c
+@@ -36,9 +36,15 @@ static const struct plat_sci_port scif##index##_platform_data = { \
+ .scbrr_algo_id = SCBRR_ALGO_2, \
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
+ SCSCR_REIE, \
+- .mapbase = baseaddr, \
+- .irqs = { irq + 1, irq + 2, irq + 3, irq }, \
+-}
++}; \
++ \
++static struct resource scif##index##_resources[] = { \
++ DEFINE_RES_MEM(baseaddr, 0x100), \
++ DEFINE_RES_IRQ(irq + 1), \
++ DEFINE_RES_IRQ(irq + 2), \
++ DEFINE_RES_IRQ(irq + 3), \
++ DEFINE_RES_IRQ(irq), \
++} \
+
+ R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
+ R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
+@@ -50,9 +56,11 @@ R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
+ R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
+
+ #define r7s72100_register_scif(index) \
+- platform_device_register_data(&platform_bus, "sh-sci", index, \
+- &scif##index##_platform_data, \
+- sizeof(scif##index##_platform_data))
++ platform_device_register_resndata(&platform_bus, "sh-sci", index, \
++ scif##index##_resources, \
++ ARRAY_SIZE(scif##index##_resources), \
++ &scif##index##_platform_data, \
++ sizeof(scif##index##_platform_data))
+
+
+ static struct sh_timer_config mtu2_0_platform_data __initdata = {
+--
+1.8.5.rc3
+
--- /dev/null
+From 6d899fee5b218037b3fb23dfbb91642d58b61bff Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:33 +0100
+Subject: ARM: shmobile: r8a73a4: Declare SCIF register base and IRQ as
+ resources
+
+Passing the register base address and IRQ through platform data is
+deprecated. Use resources instead.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8826478e1125db9f05f902c5c7105ada164a8358)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a73a4.c | 15 ++++++++++-----
+ 1 file changed, 10 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
+index 605298b2ffe5..ef32ce222525 100644
+--- a/arch/arm/mach-shmobile/setup-r8a73a4.c
++++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
+@@ -43,11 +43,14 @@ void __init r8a73a4_pinmux_init(void)
+ #define R8A73A4_SCIF(scif_type, _scscr, index, baseaddr, irq) \
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = scif_type, \
+- .mapbase = baseaddr, \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+ .scbrr_algo_id = SCBRR_ALGO_4, \
+ .scscr = _scscr, \
+- .irqs = SCIx_IRQ_MUXED(irq), \
++}; \
++ \
++static struct resource scif##index##_resources[] = { \
++ DEFINE_RES_MEM(baseaddr, 0x100), \
++ DEFINE_RES_IRQ(irq), \
+ }
+
+ #define R8A73A4_SCIFA(index, baseaddr, irq) \
+@@ -66,9 +69,11 @@ R8A73A4_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
+ R8A73A4_SCIFB(5, 0xe6cf0000, gic_spi(151)); /* SCIFB3 */
+
+ #define r8a73a4_register_scif(index) \
+- platform_device_register_data(&platform_bus, "sh-sci", index, \
+- &scif##index##_platform_data, \
+- sizeof(scif##index##_platform_data))
++ platform_device_register_resndata(&platform_bus, "sh-sci", index, \
++ scif##index##_resources, \
++ ARRAY_SIZE(scif##index##_resources), \
++ &scif##index##_platform_data, \
++ sizeof(scif##index##_platform_data))
+
+ static const struct renesas_irqc_config irqc0_data = {
+ .irq_base = irq_pin(0), /* IRQ0 -> IRQ31 */
+--
+1.8.5.rc3
+
--- /dev/null
+From fb6f6d20d738c17a01df35f2c82f25df12b4ee09 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:34 +0100
+Subject: ARM: shmobile: r8a7740: Declare SCIF register base and IRQ as
+ resources
+
+Passing the register base address and IRQ through platform data is
+deprecated. Use resources instead.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8bf2f8c5ccd4119b9e4bba6c2db5c93c237a84cb)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7740.c | 9 +++++++--
+ 1 file changed, 7 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
+index 8778b57ed7d9..81a4366b95f8 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7740.c
++++ b/arch/arm/mach-shmobile/setup-r8a7740.c
+@@ -207,16 +207,21 @@ static struct platform_device irqpin3_device = {
+ #define R8A7740_SCIF(scif_type, index, baseaddr, irq) \
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = scif_type, \
+- .mapbase = baseaddr, \
+ .flags = UPF_BOOT_AUTOCONF, \
+- .irqs = SCIx_IRQ_MUXED(irq), \
+ .scbrr_algo_id = SCBRR_ALGO_4, \
+ .scscr = SCSCR_RE | SCSCR_TE, \
+ }; \
+ \
++static struct resource scif##index##_resources[] = { \
++ DEFINE_RES_MEM(baseaddr, 0x100), \
++ DEFINE_RES_IRQ(irq), \
++}; \
++ \
+ static struct platform_device scif##index##_device = { \
+ .name = "sh-sci", \
+ .id = index, \
++ .resource = scif##index##_resources, \
++ .num_resources = ARRAY_SIZE(scif##index##_resources), \
+ .dev = { \
+ .platform_data = &scif##index##_platform_data, \
+ }, \
+--
+1.8.5.rc3
+
--- /dev/null
+From c9ad8f867b7b1df486c6e35a8d5e7753fa129461 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:36 +0100
+Subject: ARM: shmobile: r8a7779: Declare SCIF register base and IRQ as
+ resources
+
+Passing the register base address and IRQ through platform data is
+deprecated. Use resources instead.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit aa61ee2ee3bdeee17242bb7357f3edc19d417f41)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7779.c | 9 +++++++--
+ 1 file changed, 7 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
+index df418f16d82d..85371ee77b63 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7779.c
++++ b/arch/arm/mach-shmobile/setup-r8a7779.c
+@@ -192,16 +192,21 @@ void __init r8a7779_pinmux_init(void)
+ #define R8A7779_SCIF(index, baseaddr, irq) \
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = PORT_SCIF, \
+- .mapbase = baseaddr, \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+- .irqs = SCIx_IRQ_MUXED(irq), \
+ .scbrr_algo_id = SCBRR_ALGO_2, \
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \
+ }; \
+ \
++static struct resource scif##index##_resources[] = { \
++ DEFINE_RES_MEM(baseaddr, 0x100), \
++ DEFINE_RES_IRQ(irq), \
++}; \
++ \
+ static struct platform_device scif##index##_device = { \
+ .name = "sh-sci", \
+ .id = index, \
++ .resource = scif##index##_resources, \
++ .num_resources = ARRAY_SIZE(scif##index##_resources), \
+ .dev = { \
+ .platform_data = &scif##index##_platform_data, \
+ }, \
+--
+1.8.5.rc3
+
--- /dev/null
+From d7b6fcf41a4788b7542c8e84090cf54d9a72332b Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:39 +0100
+Subject: ARM: shmobile: sh7372: Don't set plat_sci_port scbrr_algo_id field
+
+The field will be removed from the sh-sci driver. Don't set it and let
+the driver handle baud rate calculation internally.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d910224928058b6632010987dfed5ca72022e4b4)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-sh7372.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
+index 798f8acc6195..27301278c208 100644
+--- a/arch/arm/mach-shmobile/setup-sh7372.c
++++ b/arch/arm/mach-shmobile/setup-sh7372.c
+@@ -91,7 +91,6 @@ void __init sh7372_pinmux_init(void)
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = scif_type, \
+ .flags = UPF_BOOT_AUTOCONF, \
+- .scbrr_algo_id = SCBRR_ALGO_4, \
+ .scscr = SCSCR_RE | SCSCR_TE, \
+ }; \
+ \
+--
+1.8.5.rc3
+
--- /dev/null
+From 74e6af1f860c90001efe4eaf171bdce82afdf151 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:35 +0100
+Subject: ARM: shmobile: r8a7778: Declare SCIF register base and IRQ as
+ resources
+
+Passing the register base address and IRQ through platform data is
+deprecated. Use resources instead.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 23399a6ff8e2070e7695fa6c1283212d1d69b372)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7778.c | 15 ++++++++++-----
+ 1 file changed, 10 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
+index 210c66315dd9..3e583cd79bea 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7778.c
++++ b/arch/arm/mach-shmobile/setup-r8a7778.c
+@@ -46,12 +46,15 @@
+ /* SCIF */
+ #define R8A7778_SCIF(index, baseaddr, irq) \
+ static struct plat_sci_port scif##index##_platform_data = { \
+- .mapbase = baseaddr, \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \
+ .scbrr_algo_id = SCBRR_ALGO_2, \
+ .type = PORT_SCIF, \
+- .irqs = SCIx_IRQ_MUXED(irq), \
++}; \
++ \
++static struct resource scif##index##_resources[] = { \
++ DEFINE_RES_MEM(baseaddr, 0x100), \
++ DEFINE_RES_IRQ(irq), \
+ }
+
+ R8A7778_SCIF(0, 0xffe40000, gic_iid(0x66));
+@@ -62,9 +65,11 @@ R8A7778_SCIF(4, 0xffe44000, gic_iid(0x6a));
+ R8A7778_SCIF(5, 0xffe45000, gic_iid(0x6b));
+
+ #define r8a7778_register_scif(index) \
+- platform_device_register_data(&platform_bus, "sh-sci", index, \
+- &scif##index##_platform_data, \
+- sizeof(scif##index##_platform_data))
++ platform_device_register_resndata(&platform_bus, "sh-sci", index, \
++ scif##index##_resources, \
++ ARRAY_SIZE(scif##index##_resources), \
++ &scif##index##_platform_data, \
++ sizeof(scif##index##_platform_data))
+
+ /* TMU */
+ static struct resource sh_tmu0_resources[] __initdata = {
+--
+1.8.5.rc3
+
--- /dev/null
+From 12dd168e69b3b4287ecd4c1d3a362952f6616651 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:38 +0100
+Subject: ARM: shmobile: r8a7791: Declare SCIF register base and IRQ as
+ resources
+
+Passing the register base address and IRQ through platform data is
+deprecated. Use resources instead.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d95a95a85bb2ebb628f2d1667e7e45ad8fdf0297)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7791.c | 15 ++++++++++-----
+ 1 file changed, 10 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
+index 3fe0d7de08fc..f15b53786713 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7791.c
++++ b/arch/arm/mach-shmobile/setup-r8a7791.c
+@@ -87,11 +87,14 @@ void __init r8a7791_pinmux_init(void)
+ #define __R8A7791_SCIF(scif_type, algo, index, baseaddr, irq) \
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = scif_type, \
+- .mapbase = baseaddr, \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+ .scbrr_algo_id = algo, \
+ .scscr = SCSCR_RE | SCSCR_TE, \
+- .irqs = SCIx_IRQ_MUXED(irq), \
++}; \
++ \
++static struct resource scif##index##_resources[] = { \
++ DEFINE_RES_MEM(baseaddr, 0x100), \
++ DEFINE_RES_IRQ(irq), \
+ }
+
+ #define R8A7791_SCIF(index, baseaddr, irq) \
+@@ -120,9 +123,11 @@ R8A7791_SCIFA(13, 0xe6c78000, gic_spi(30)); /* SCIFA4 */
+ R8A7791_SCIFA(14, 0xe6c80000, gic_spi(31)); /* SCIFA5 */
+
+ #define r8a7791_register_scif(index) \
+- platform_device_register_data(&platform_bus, "sh-sci", index, \
+- &scif##index##_platform_data, \
+- sizeof(scif##index##_platform_data))
++ platform_device_register_resndata(&platform_bus, "sh-sci", index, \
++ scif##index##_resources, \
++ ARRAY_SIZE(scif##index##_resources), \
++ &scif##index##_platform_data, \
++ sizeof(scif##index##_platform_data))
+
+ static const struct sh_timer_config cmt00_platform_data __initconst = {
+ .name = "CMT00",
+--
+1.8.5.rc3
+
--- /dev/null
+From 705b9c51701a8baa4609e4499dbc5582599516b1 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 1 Nov 2013 01:44:07 +0100
+Subject: ARM: shmobile: r8a7790: Declare SCIF register base and IRQ as
+ resources
+
+Passing the register base address and IRQ through platform data is
+deprecated. Use resources instead.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c0a384f5ed28031315e5f61220982d31d517e672)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7790.c | 15 ++++++++++-----
+ 1 file changed, 10 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
+index a9bcc56ffe01..c08c761b9506 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7790.c
++++ b/arch/arm/mach-shmobile/setup-r8a7790.c
+@@ -106,11 +106,14 @@ void __init r8a7790_pinmux_init(void)
+ #define __R8A7790_SCIF(scif_type, _scscr, algo, index, baseaddr, irq) \
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = scif_type, \
+- .mapbase = baseaddr, \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+ .scbrr_algo_id = algo, \
+ .scscr = _scscr, \
+- .irqs = SCIx_IRQ_MUXED(irq), \
++}; \
++ \
++static struct resource scif##index##_resources[] = { \
++ DEFINE_RES_MEM(baseaddr, 0x100), \
++ DEFINE_RES_IRQ(irq), \
+ }
+
+ #define R8A7790_SCIF(index, baseaddr, irq) \
+@@ -141,9 +144,11 @@ R8A7790_HSCIF(8, 0xe62c0000, gic_spi(154)); /* HSCIF0 */
+ R8A7790_HSCIF(9, 0xe62c8000, gic_spi(155)); /* HSCIF1 */
+
+ #define r8a7790_register_scif(index) \
+- platform_device_register_data(&platform_bus, "sh-sci", index, \
+- &scif##index##_platform_data, \
+- sizeof(scif##index##_platform_data))
++ platform_device_register_resndata(&platform_bus, "sh-sci", index, \
++ scif##index##_resources, \
++ ARRAY_SIZE(scif##index##_resources), \
++ &scif##index##_platform_data, \
++ sizeof(scif##index##_platform_data))
+
+ static const struct renesas_irqc_config irqc0_data __initconst = {
+ .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
+--
+1.8.5.rc3
+
--- /dev/null
+From 249168cbcea0b48df8ead3bae1ab53d2a000197e Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:40 +0100
+Subject: ARM: shmobile: sh73a0: Don't set plat_sci_port scbrr_algo_id field
+
+The field will be removed from the sh-sci driver. Don't set it and let
+the driver handle baud rate calculation internally.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 39be9936c84ebc7408ab7f567e6077d349d62330)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-sh73a0.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
+index 55ed98ff087c..f74ab530c71d 100644
+--- a/arch/arm/mach-shmobile/setup-sh73a0.c
++++ b/arch/arm/mach-shmobile/setup-sh73a0.c
+@@ -76,7 +76,6 @@ void __init sh73a0_pinmux_init(void)
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = scif_type, \
+ .flags = UPF_BOOT_AUTOCONF, \
+- .scbrr_algo_id = SCBRR_ALGO_4, \
+ .scscr = SCSCR_RE | SCSCR_TE, \
+ }; \
+ \
+--
+1.8.5.rc3
+
--- /dev/null
+From 4c26c5a011ee46569cc9415dc27bf0541f0f42d7 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:41 +0100
+Subject: ARM: shmobile: r7s72100: Don't set plat_sci_port scbrr_algo_id field
+
+The field will be removed from the sh-sci driver. Don't set it and let
+the driver handle baud rate calculation internally.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 79fb5b4c6fc2222e5cf3899454b8c669a9f5c485)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r7s72100.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
+index 81b995bb1a56..9c0b3a9d5f7a 100644
+--- a/arch/arm/mach-shmobile/setup-r7s72100.c
++++ b/arch/arm/mach-shmobile/setup-r7s72100.c
+@@ -33,7 +33,6 @@ static const struct plat_sci_port scif##index##_platform_data = { \
+ .type = PORT_SCIF, \
+ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+- .scbrr_algo_id = SCBRR_ALGO_2, \
+ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
+ SCSCR_REIE, \
+ }; \
+--
+1.8.5.rc3
+
--- /dev/null
+From 8943c69fd86370da5849af34679334aacaf715c8 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:44 +0100
+Subject: ARM: shmobile: r8a7778: Don't set plat_sci_port scbrr_algo_id field
+
+The field will be removed from the sh-sci driver. Don't set it and let
+the driver handle baud rate calculation internally.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 938ed60f7a0698a27f40369f3f89e0f07f570959)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7778.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
+index 3e583cd79bea..6d694526e4ca 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7778.c
++++ b/arch/arm/mach-shmobile/setup-r8a7778.c
+@@ -48,7 +48,6 @@
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \
+- .scbrr_algo_id = SCBRR_ALGO_2, \
+ .type = PORT_SCIF, \
+ }; \
+ \
+--
+1.8.5.rc3
+
--- /dev/null
+From 0440580e65277a815f5f416115d8b792bb69a045 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:42 +0100
+Subject: ARM: shmobile: r8a73a4: Don't set plat_sci_port scbrr_algo_id field
+
+The field will be removed from the sh-sci driver. Don't set it and let
+the driver handle baud rate calculation internally.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 720938a10519cc2511199d4eab7e885f214c10f6)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a73a4.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
+index ef32ce222525..cd36f8078325 100644
+--- a/arch/arm/mach-shmobile/setup-r8a73a4.c
++++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
+@@ -44,7 +44,6 @@ void __init r8a73a4_pinmux_init(void)
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = scif_type, \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+- .scbrr_algo_id = SCBRR_ALGO_4, \
+ .scscr = _scscr, \
+ }; \
+ \
+--
+1.8.5.rc3
+
--- /dev/null
+From 7059a9a1da4bc92a526eac2940edc8ed44c856af Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:43 +0100
+Subject: ARM: shmobile: r8a7740: Don't set plat_sci_port scbrr_algo_id field
+
+The field will be removed from the sh-sci driver. Don't set it and let
+the driver handle baud rate calculation internally.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 52613951a600207df9d75185b677d91bbde44a9e)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7740.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
+index 81a4366b95f8..8f3c68101d59 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7740.c
++++ b/arch/arm/mach-shmobile/setup-r8a7740.c
+@@ -208,7 +208,6 @@ static struct platform_device irqpin3_device = {
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = scif_type, \
+ .flags = UPF_BOOT_AUTOCONF, \
+- .scbrr_algo_id = SCBRR_ALGO_4, \
+ .scscr = SCSCR_RE | SCSCR_TE, \
+ }; \
+ \
+--
+1.8.5.rc3
+
--- /dev/null
+From 7cfa2a6ae099d834c2fde2268a8a7d2953e02e6a Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:46 +0100
+Subject: ARM: shmobile: r8a7790: Don't set plat_sci_port scbrr_algo_id field
+
+The field will be removed from the sh-sci driver. Don't set it and let
+the driver handle baud rate calculation internally.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6319ea5089a267b3a1cbd1d745ecc7cdae9a0a7e)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7790.c | 11 +++++------
+ 1 file changed, 5 insertions(+), 6 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
+index c08c761b9506..7800cec79652 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7790.c
++++ b/arch/arm/mach-shmobile/setup-r8a7790.c
+@@ -103,11 +103,10 @@ void __init r8a7790_pinmux_init(void)
+ r8a7790_register_i2c(3);
+ }
+
+-#define __R8A7790_SCIF(scif_type, _scscr, algo, index, baseaddr, irq) \
++#define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq) \
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = scif_type, \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+- .scbrr_algo_id = algo, \
+ .scscr = _scscr, \
+ }; \
+ \
+@@ -118,19 +117,19 @@ static struct resource scif##index##_resources[] = { \
+
+ #define R8A7790_SCIF(index, baseaddr, irq) \
+ __R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE, \
+- SCBRR_ALGO_2, index, baseaddr, irq)
++ index, baseaddr, irq)
+
+ #define R8A7790_SCIFA(index, baseaddr, irq) \
+ __R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
+- SCBRR_ALGO_4, index, baseaddr, irq)
++ index, baseaddr, irq)
+
+ #define R8A7790_SCIFB(index, baseaddr, irq) \
+ __R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \
+- SCBRR_ALGO_4, index, baseaddr, irq)
++ index, baseaddr, irq)
+
+ #define R8A7790_HSCIF(index, baseaddr, irq) \
+ __R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE, \
+- SCBRR_ALGO_6, index, baseaddr, irq)
++ index, baseaddr, irq)
+
+ R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
+ R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
+--
+1.8.5.rc3
+
--- /dev/null
+From e3bcdb325798afd4c72fe2dea278a1c89be16356 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:45 +0100
+Subject: ARM: shmobile: r8a7779: Don't set plat_sci_port scbrr_algo_id field
+
+The field will be removed from the sh-sci driver. Don't set it and let
+the driver handle baud rate calculation internally.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 0bb075cea8b527a1f33d965f6c891cea9261e9bf)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7779.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
+index 85371ee77b63..8e860b36997a 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7779.c
++++ b/arch/arm/mach-shmobile/setup-r8a7779.c
+@@ -193,7 +193,6 @@ void __init r8a7779_pinmux_init(void)
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = PORT_SCIF, \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+- .scbrr_algo_id = SCBRR_ALGO_2, \
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \
+ }; \
+ \
+--
+1.8.5.rc3
+
--- /dev/null
+From b1ee42e098a83b388387ba56fc5307d8adcc2257 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 6 Dec 2013 10:59:47 +0100
+Subject: ARM: shmobile: r8a7791: Don't set plat_sci_port scbrr_algo_id field
+
+The field will be removed from the sh-sci driver. Don't set it and let
+the driver handle baud rate calculation internally.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f72ed4beb198eb25c8532e76addc0034ae2aa8c7)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7791.c | 9 ++++-----
+ 1 file changed, 4 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
+index f15b53786713..e28404e43860 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7791.c
++++ b/arch/arm/mach-shmobile/setup-r8a7791.c
+@@ -84,11 +84,10 @@ void __init r8a7791_pinmux_init(void)
+ r8a7791_register_gpio(7);
+ }
+
+-#define __R8A7791_SCIF(scif_type, algo, index, baseaddr, irq) \
++#define __R8A7791_SCIF(scif_type, index, baseaddr, irq) \
+ static struct plat_sci_port scif##index##_platform_data = { \
+ .type = scif_type, \
+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+- .scbrr_algo_id = algo, \
+ .scscr = SCSCR_RE | SCSCR_TE, \
+ }; \
+ \
+@@ -98,13 +97,13 @@ static struct resource scif##index##_resources[] = { \
+ }
+
+ #define R8A7791_SCIF(index, baseaddr, irq) \
+- __R8A7791_SCIF(PORT_SCIF, SCBRR_ALGO_2, index, baseaddr, irq)
++ __R8A7791_SCIF(PORT_SCIF, index, baseaddr, irq)
+
+ #define R8A7791_SCIFA(index, baseaddr, irq) \
+- __R8A7791_SCIF(PORT_SCIFA, SCBRR_ALGO_4, index, baseaddr, irq)
++ __R8A7791_SCIF(PORT_SCIFA, index, baseaddr, irq)
+
+ #define R8A7791_SCIFB(index, baseaddr, irq) \
+- __R8A7791_SCIF(PORT_SCIFB, SCBRR_ALGO_4, index, baseaddr, irq)
++ __R8A7791_SCIF(PORT_SCIFB, index, baseaddr, irq)
+
+ R8A7791_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
+ R8A7791_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
+--
+1.8.5.rc3
+
--- /dev/null
+From 0206da3999186d8bda9160266a653f2fd5910b77 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@sang-engineering.com>
+Date: Wed, 18 Dec 2013 22:31:58 +0100
+Subject: arm: shmobile: r7s72100: add i2c clocks
+
+Tested with RIIC2 on a genmai board. Others untested but hopefully
+trivial enough to be added.
+
+Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d85bcfa916ffdf078f188aeab60f738b290f4309)
+(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r7s72100.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
+index 0814a508fd61..e6ab0cd5b286 100644
+--- a/arch/arm/mach-shmobile/clock-r7s72100.c
++++ b/arch/arm/mach-shmobile/clock-r7s72100.c
+@@ -27,6 +27,7 @@
+ #define FRQCR2 0xfcfe0014
+ #define STBCR3 0xfcfe0420
+ #define STBCR4 0xfcfe0424
++#define STBCR9 0xfcfe0438
+
+ #define PLL_RATE 30
+
+@@ -144,10 +145,15 @@ struct clk div4_clks[DIV4_NR] = {
+ | CLK_ENABLE_ON_INIT),
+ };
+
+-enum { MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
++enum { MSTP97, MSTP96, MSTP95, MSTP94,
++ MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
+ MSTP33, MSTP_NR };
+
+ static struct clk mstp_clks[MSTP_NR] = {
++ [MSTP97] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 7, 0), /* RIIC0 */
++ [MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */
++ [MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */
++ [MSTP94] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 4, 0), /* RIIC3 */
+ [MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */
+ [MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */
+ [MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */
+--
+1.8.5.rc3
+
--- /dev/null
+From 3ce525d17e74d5b288b039382f39234d19c47189 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Fri, 6 Dec 2013 13:01:38 -0800
+Subject: net: sh_eth: do not issue a wild PHY reset through BMCR
+
+The sh_eth driver issues an uncontrolled PHY reset through the MII
+register BMCR but fails to wait for the reset to complete, and will also
+implicitely wipe out all possible PHY fixups applied. Use phy_init_hw()
+which remedies both problems.
+
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 0c9eb5b931c3da3a79faa889b903dc7bd318203c)
+(Queued by David Miller for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index 8bced1c44378..be9b6ab11c94 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -1704,7 +1704,10 @@ static int sh_eth_phy_start(struct net_device *ndev)
+ return ret;
+
+ /* reset phy - this also wakes it from PDOWN */
+- phy_write(mdp->phydev, MII_BMCR, BMCR_RESET);
++ ret = phy_init_hw(mdp->phydev);
++ if (ret)
++ return ret;
++
+ phy_start(mdp->phydev);
+
+ return 0;
+--
+1.8.5.rc3
+
--- /dev/null
+From dd78efb39df662790974e364e88b316c1781b6c0 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sun, 8 Dec 2013 02:59:18 +0300
+Subject: sh_eth: add R8A7791 support
+
+Add support for yet another ARM member of the R-Car family, R-Car M2, also known
+as R8A7791 -- it will share the code and data with previously added R8A7790.
+Despite the Ether devices in these SoCs are indistinguishable at least from the
+driver's point of view, we do introduce a new platform device ID "r8a7791-ether"
+unlike the wildcard ID used for R8A7778/9 SoCs, due to newly established policy
+for the Renesas SoCs.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 94a12b15e4c575e0aa0ba5e24a4f213163a823d0)
+(Queued by David Miller for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/ethernet/renesas/Kconfig | 2 +-
+ drivers/net/ethernet/renesas/sh_eth.c | 7 ++++---
+ 2 files changed, 5 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/Kconfig b/drivers/net/ethernet/renesas/Kconfig
+index c299e7f07660..3bff114d3ef4 100644
+--- a/drivers/net/ethernet/renesas/Kconfig
++++ b/drivers/net/ethernet/renesas/Kconfig
+@@ -14,4 +14,4 @@ config SH_ETH
+ Renesas SuperH Ethernet device driver.
+ This driver supporting CPUs are:
+ - SH7619, SH7710, SH7712, SH7724, SH7734, SH7763, SH7757,
+- R8A7740, R8A777x and R8A7790.
++ R8A7740, R8A777x and R8A779x.
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index be9b6ab11c94..7f6dc6d8642e 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -395,8 +395,8 @@ static struct sh_eth_cpu_data r8a777x_data = {
+ .hw_swap = 1,
+ };
+
+-/* R8A7790 */
+-static struct sh_eth_cpu_data r8a7790_data = {
++/* R8A7790/1 */
++static struct sh_eth_cpu_data r8a779x_data = {
+ .set_duplex = sh_eth_set_duplex,
+ .set_rate = sh_eth_set_rate_r8a777x,
+
+@@ -2811,7 +2811,8 @@ static struct platform_device_id sh_eth_id_table[] = {
+ { "sh7763-gether", (kernel_ulong_t)&sh7763_data },
+ { "r8a7740-gether", (kernel_ulong_t)&r8a7740_data },
+ { "r8a777x-ether", (kernel_ulong_t)&r8a777x_data },
+- { "r8a7790-ether", (kernel_ulong_t)&r8a7790_data },
++ { "r8a7790-ether", (kernel_ulong_t)&r8a779x_data },
++ { "r8a7791-ether", (kernel_ulong_t)&r8a779x_data },
+ { }
+ };
+ MODULE_DEVICE_TABLE(platform, sh_eth_id_table);
+--
+1.8.5.rc3
+
--- /dev/null
+From ccc048c244b5b6dd848113931676773657cf7fc3 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 20 Dec 2013 01:39:52 +0300
+Subject: sh_eth: add PHY IRQ to platform data
+
+Allow the platform code to pass PHY's IRQ to the driver. Print this IRQ along
+with the other PHY datails in sh_eth_phy_init().
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 18be099badcfc4a12f058addc55c4270d5a8bec8)
+(Queued by David Miller for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 6 ++++--
+ include/linux/sh_eth.h | 1 +
+ 2 files changed, 5 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index 7f6dc6d8642e..2b8ef6ec0025 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -1685,8 +1685,8 @@ static int sh_eth_phy_init(struct net_device *ndev)
+ return PTR_ERR(phydev);
+ }
+
+- dev_info(&ndev->dev, "attached phy %i to driver %s\n",
+- phydev->addr, phydev->drv->name);
++ dev_info(&ndev->dev, "attached PHY %d (IRQ %d) to driver %s\n",
++ phydev->addr, phydev->irq, phydev->drv->name);
+
+ mdp->phydev = phydev;
+
+@@ -2544,6 +2544,8 @@ static int sh_mdio_init(struct net_device *ndev, int id,
+
+ for (i = 0; i < PHY_MAX_ADDR; i++)
+ mdp->mii_bus->irq[i] = PHY_POLL;
++ if (pd->phy_irq > 0)
++ mdp->mii_bus->irq[pd->phy] = pd->phy_irq;
+
+ /* register mdio bus */
+ ret = mdiobus_register(mdp->mii_bus);
+diff --git a/include/linux/sh_eth.h b/include/linux/sh_eth.h
+index 15b2ea9381bd..8c3dc4cf838c 100644
+--- a/include/linux/sh_eth.h
++++ b/include/linux/sh_eth.h
+@@ -7,6 +7,7 @@ enum {EDMAC_LITTLE_ENDIAN, EDMAC_BIG_ENDIAN};
+
+ struct sh_eth_plat_data {
+ int phy;
++ int phy_irq;
+ int edmac_endian;
+ phy_interface_t phy_interface;
+ void (*set_mdio_gate)(void *addr);
+--
+1.8.5.rc3
+
--- /dev/null
+From 0bee888c66def356a15d70b727b0e9fe4c4895d3 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 20 Dec 2013 01:41:12 +0300
+Subject: sh_eth: do not reset PHY needlessly
+
+There's no need anymore to call phy_init_hw() to reset/resume the PHY from the
+driver, as the call chain in phylib already has reached it, and so reset/resumed
+the PHY (even resuming it twice). This duplicate reset is not only needless, it
+e.g. clears the PHY's interrupt enables just setup by phylib and so prevents the
+expected IRQs from the PHY.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 4174ecd78f6591a3d1ec04738ef7bc900a11f5ce)
+(Queued by David Miller for v3.14 but not yet in Linus's tree)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 5 -----
+ 1 file changed, 5 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index 2b8ef6ec0025..6551b72776ce 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -1703,11 +1703,6 @@ static int sh_eth_phy_start(struct net_device *ndev)
+ if (ret)
+ return ret;
+
+- /* reset phy - this also wakes it from PDOWN */
+- ret = phy_init_hw(mdp->phydev);
+- if (ret)
+- return ret;
+-
+ phy_start(mdp->phydev);
+
+ return 0;
+--
+1.8.5.rc3
+
--- /dev/null
+From 33564a783a21d0e1ad3450904ad8fd4503f8fae3 Mon Sep 17 00:00:00 2001
+From: Fabio Estevam <festevam@gmail.com>
+Date: Tue, 23 Jul 2013 15:13:06 +0100
+Subject: ARM: 7789/1: Do not run dummy_flush_tlb_a15_erratum() on
+ non-Cortex-A15
+
+Commit 93dc688 (ARM: 7684/1: errata: Workaround for Cortex-A15 erratum 798181 (TLBI/DSB operations)) causes the following undefined instruction error on a mx53 (Cortex-A8):
+
+Internal error: Oops - undefined instruction: 0 [#1] SMP ARM
+CPU: 0 PID: 275 Comm: modprobe Not tainted 3.11.0-rc2-next-20130722-00009-g9b0f371 #881
+task: df46cc00 ti: df48e000 task.ti: df48e000
+PC is at check_and_switch_context+0x17c/0x4d0
+LR is at check_and_switch_context+0xdc/0x4d0
+
+This problem happens because check_and_switch_context() calls dummy_flush_tlb_a15_erratum() without checking if we are really running on a Cortex-A15 or not.
+
+To avoid this issue, only call dummy_flush_tlb_a15_erratum() inside
+check_and_switch_context() if erratum_a15_798181() returns true, which means that we are really running on a Cortex-A15.
+
+Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
+Acked-by: Catalin Marinas <catalin.marinas@arm.com>
+Reviewed-by: Roger Quadros <rogerq@ti.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+(cherry picked from commit 1f49856bb029779d8f1b63517a3a3b34ffe672c7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/include/asm/tlbflush.h | 16 ++++++++++++++++
+ arch/arm/kernel/smp_tlb.c | 17 -----------------
+ arch/arm/mm/context.c | 3 ++-
+ 3 files changed, 18 insertions(+), 18 deletions(-)
+
+diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
+index a3625d141c1d..378ff78623b7 100644
+--- a/arch/arm/include/asm/tlbflush.h
++++ b/arch/arm/include/asm/tlbflush.h
+@@ -443,7 +443,18 @@ static inline void local_flush_bp_all(void)
+ isb();
+ }
+
++#include <asm/cputype.h>
+ #ifdef CONFIG_ARM_ERRATA_798181
++static inline int erratum_a15_798181(void)
++{
++ unsigned int midr = read_cpuid_id();
++
++ /* Cortex-A15 r0p0..r3p2 affected */
++ if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
++ return 0;
++ return 1;
++}
++
+ static inline void dummy_flush_tlb_a15_erratum(void)
+ {
+ /*
+@@ -453,6 +464,11 @@ static inline void dummy_flush_tlb_a15_erratum(void)
+ dsb();
+ }
+ #else
++static inline int erratum_a15_798181(void)
++{
++ return 0;
++}
++
+ static inline void dummy_flush_tlb_a15_erratum(void)
+ {
+ }
+diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c
+index a98b62dca2fa..c2edfff573c2 100644
+--- a/arch/arm/kernel/smp_tlb.c
++++ b/arch/arm/kernel/smp_tlb.c
+@@ -70,23 +70,6 @@ static inline void ipi_flush_bp_all(void *ignored)
+ local_flush_bp_all();
+ }
+
+-#ifdef CONFIG_ARM_ERRATA_798181
+-static int erratum_a15_798181(void)
+-{
+- unsigned int midr = read_cpuid_id();
+-
+- /* Cortex-A15 r0p0..r3p2 affected */
+- if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
+- return 0;
+- return 1;
+-}
+-#else
+-static int erratum_a15_798181(void)
+-{
+- return 0;
+-}
+-#endif
+-
+ static void ipi_flush_tlb_a15_erratum(void *arg)
+ {
+ dmb();
+diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
+index eeab06ebd06e..3cc9157f4532 100644
+--- a/arch/arm/mm/context.c
++++ b/arch/arm/mm/context.c
+@@ -250,7 +250,8 @@ void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
+ if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) {
+ local_flush_bp_all();
+ local_flush_tlb_all();
+- dummy_flush_tlb_a15_erratum();
++ if (erratum_a15_798181())
++ dummy_flush_tlb_a15_erratum();
+ }
+
+ atomic64_set(&per_cpu(active_asids, cpu), asid);
+--
+1.8.5.rc3
+
projects / platform / kernel / linux-3.10.git / commitdiff