drm/amdgpu: soc15 register access through RLC should only apply to sriov runtime
authorshaoyunl <shaoyun.liu@amd.com>
Tue, 1 Jun 2021 14:50:14 +0000 (10:50 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 4 Jun 2021 16:40:00 +0000 (12:40 -0400)
On SRIOV, driver should only access register through RLC in runtime

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/soc15_common.h

index c781808..f6cf70e 100644 (file)
 #define SOC15_REG_OFFSET(ip, inst, reg)        (adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg)
 
 #define __WREG32_SOC15_RLC__(reg, value, flag, hwip) \
-       ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs->rlcg_wreg) ? \
+       ((amdgpu_sriov_runtime(adev) && adev->gfx.rlc.funcs->rlcg_wreg) ? \
         adev->gfx.rlc.funcs->rlcg_wreg(adev, reg, value, flag, hwip) : \
         WREG32(reg, value))
 
 #define __RREG32_SOC15_RLC__(reg, flag, hwip) \
-       ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs->rlcg_rreg) ? \
+       ((amdgpu_sriov_runtime(adev) && adev->gfx.rlc.funcs->rlcg_rreg) ? \
         adev->gfx.rlc.funcs->rlcg_rreg(adev, reg, flag, hwip) : \
         RREG32(reg))