stmmac: intel: Enable 2.5Gbps for Intel AlderLake-S
authorWong Vee Khee <vee.khee.wong@linux.intel.com>
Fri, 25 Feb 2022 02:33:25 +0000 (10:33 +0800)
committerJakub Kicinski <kuba@kernel.org>
Sat, 26 Feb 2022 06:22:09 +0000 (22:22 -0800)
Intel AlderLake-S platform is capable of running on 2.5GBps link speed.

This patch enables 2.5Gbps link speed on AlderLake-S platform.

Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com>
Link: https://lore.kernel.org/r/20220225023325.474242-1-vee.khee.wong@linux.intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c

index 5943ff9..32ef3df 100644 (file)
@@ -721,6 +721,7 @@ static int tgl_common_data(struct pci_dev *pdev,
        plat->rx_queues_to_use = 6;
        plat->tx_queues_to_use = 4;
        plat->clk_ptp_rate = 200000000;
+       plat->speed_mode_2500 = intel_speed_mode_2500;
 
        plat->safety_feat_cfg->tsoee = 1;
        plat->safety_feat_cfg->mrxpee = 0;
@@ -740,7 +741,6 @@ static int tgl_sgmii_phy0_data(struct pci_dev *pdev,
 {
        plat->bus_id = 1;
        plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
-       plat->speed_mode_2500 = intel_speed_mode_2500;
        plat->serdes_powerup = intel_serdes_powerup;
        plat->serdes_powerdown = intel_serdes_powerdown;
        return tgl_common_data(pdev, plat);
@@ -755,7 +755,6 @@ static int tgl_sgmii_phy1_data(struct pci_dev *pdev,
 {
        plat->bus_id = 2;
        plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
-       plat->speed_mode_2500 = intel_speed_mode_2500;
        plat->serdes_powerup = intel_serdes_powerup;
        plat->serdes_powerdown = intel_serdes_powerdown;
        return tgl_common_data(pdev, plat);