thermal: intel_pch_thermal: Read large temp values correctly

On all supported platforms, the TS Reading (TSR) field in the
Temperature (TEMP) register is 9 bits wide. Values above 0x100 (78
degrees C) are plausible, so don't mask out the topmost bit. And the
register itself is 16 bits wide, so use readw() rather than readl().

Signed-off-by: Ed Swierk <eswierk@skyportsystems.com>
Reviewed-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>

diff --git a/drivers/thermal/intel_pch_thermal.c b/drivers/thermal/intel_pch_thermal.c
index 2b49e8d..8c39206 100644 (file)
--- a/drivers/thermal/intel_pch_thermal.c
+++ b/drivers/thermal/intel_pch_thermal.c
@@ -49,7 +49,7 @@
 #define WPT_TSGPEN     0x84    /* General Purpose Event Enables */
 
 /*  Wildcat Point-LP  PCH Thermal Register bit definitions */
-#define WPT_TEMP_TSR   0x00ff  /* Temp TS Reading */
+#define WPT_TEMP_TSR   0x01ff  /* Temp TS Reading */
 #define WPT_TSC_CPDE   0x01    /* Catastrophic Power-Down Enable */
 #define WPT_TSS_TSDSS  0x10    /* Thermal Sensor Dynamic Shutdown Status */
 #define WPT_TSS_GPES   0x08    /* GPE status */
@@ -174,9 +174,9 @@ read_trips:
 
 static int pch_wpt_get_temp(struct pch_thermal_device *ptd, int *temp)
 {
-       u8 wpt_temp;
+       u16 wpt_temp;
 
-       wpt_temp = WPT_TEMP_TSR & readl(ptd->hw_base + WPT_TEMP);
+       wpt_temp = WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP);
 
        /* Resolution of 1/2 degree C and an offset of -50C */
        *temp = (wpt_temp * 1000 / 2 - 50000);