{"zksh", ISA_SPEC_CLASS_NONE, 1, 0},
{"zkt", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zicboz",ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zicbom",ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zicbop",ISA_SPEC_CLASS_NONE, 1, 0},
+
{"zk", ISA_SPEC_CLASS_NONE, 1, 0},
{"zkn", ISA_SPEC_CLASS_NONE, 1, 0},
{"zks", ISA_SPEC_CLASS_NONE, 1, 0},
{"zksh", &gcc_options::x_riscv_zk_subext, MASK_ZKSH},
{"zkt", &gcc_options::x_riscv_zk_subext, MASK_ZKT},
+ {"zicboz", &gcc_options::x_riscv_zicmo_subext, MASK_ZICBOZ},
+ {"zicbom", &gcc_options::x_riscv_zicmo_subext, MASK_ZICBOM},
+ {"zicbop", &gcc_options::x_riscv_zicmo_subext, MASK_ZICBOP},
+
{"zve32x", &gcc_options::x_target_flags, MASK_VECTOR},
{"zve32f", &gcc_options::x_target_flags, MASK_VECTOR},
{"zve64x", &gcc_options::x_target_flags, MASK_VECTOR},
#define TARGET_ZVL32768B ((riscv_zvl_flags & MASK_ZVL32768B) != 0)
#define TARGET_ZVL65536B ((riscv_zvl_flags & MASK_ZVL65536B) != 0)
+#define MASK_ZICBOZ (1 << 0)
+#define MASK_ZICBOM (1 << 1)
+#define MASK_ZICBOP (1 << 2)
+
+#define TARGET_ZICBOZ ((riscv_zicmo_subext & MASK_ZICBOZ) != 0)
+#define TARGET_ZICBOM ((riscv_zicmo_subext & MASK_ZICBOM) != 0)
+#define TARGET_ZICBOP ((riscv_zicmo_subext & MASK_ZICBOP) != 0)
+
/* Bit of riscv_zvl_flags will set contintuly, N-1 bit will set if N-bit is
set, e.g. MASK_ZVL64B has set then MASK_ZVL32B is set, so we can use
popcount to caclulate the minimal VLEN. */