drm/msm/dpu: use CTL_SC7280_MASK for sm8450's ctl_0
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Sat, 8 Apr 2023 00:27:50 +0000 (03:27 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fri, 19 May 2023 16:44:11 +0000 (19:44 +0300)
On sm8450 platform the CTL_0 doesn't differ from the rest of CTL blocks,
so switch it to CTL_SC7280_MASK too.

Some background: original commit 100d7ef6995d ("drm/msm/dpu: add support
for SM8450") had all (relevant at that time) bit spelled individually.
Then commit 0e91bcbb0016 ("drm/msm/dpu: Add SM8350 to hw catalog"),
despite being a mismerge, correctly changed all other CTL entries to use
CTL_SC7280_MASK, except CTL_0.

While the current BLOCK_SOC_MASK style is not ideal (and while we are
working on a better scheme), let's follow its usage as a least minimal
surprise. For example, sc8280xp, a close associate of sm8450, also uses
CTL_SC7280_MASK.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/531493/
Link: https://lore.kernel.org/r/20230408002750.2722304-5-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h

index 8bd4bb9..cb83d25 100644 (file)
@@ -47,7 +47,7 @@ static const struct dpu_ctl_cfg sm8450_ctl[] = {
        {
        .name = "ctl_0", .id = CTL_0,
        .base = 0x15000, .len = 0x204,
-       .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY) | BIT(DPU_CTL_FETCH_ACTIVE),
+       .features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK,
        .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9),
        },
        {