arm64: dts: renesas: r8a774c0: Fix register range of display node
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 21 Aug 2019 09:52:19 +0000 (11:52 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 21 Aug 2019 11:39:42 +0000 (13:39 +0200)
Since the R8A774C0 SoC uses DU{0,1} only, the register block length
should be 0x40000.

Based on commit 06585ed38b6698bc ("arm64: dts: renesas: r8a77990: Fix
register range of display node") for R-Car E3.

Fixes: 8ed3a6b223159df3 ("arm64: dts: renesas: r8a774c0: Add display output support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm64/boot/dts/renesas/r8a774c0.dtsi

index dc80c1a2ac1d04eeb96b20929508db2b59e7f3be..d0c9b419d190dba224d0fedc35d6944b7fb844b1 100644 (file)
 
                du: display@feb00000 {
                        compatible = "renesas,du-r8a774c0";
-                       reg = <0 0xfeb00000 0 0x80000>;
+                       reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 724>,