unsigned ArgNo = 0;
if (auto *WO = dyn_cast<WithOverflowInst>(CS.getInstruction())) {
- if (willNotOverflow(WO, LVI)) {
+ if (WO->getLHS()->getType()->isIntegerTy() && willNotOverflow(WO, LVI)) {
processOverflowIntrinsic(WO);
return true;
}
declare { i8, i1 } @llvm.umul.with.overflow.i8(i8, i8)
+declare { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32>, <2 x i32>)
+
declare i8 @llvm.uadd.sat.i8(i8, i8)
declare i8 @llvm.sadd.sat.i8(i8, i8)
declare i8 @llvm.usub.sat.i8(i8, i8)
ret { i8, i1 } %mul
}
+define { <2 x i32>, <2 x i1> } @uaddo_vec(<2 x i32> %a) {
+; CHECK-LABEL: @uaddo_vec(
+; CHECK-NEXT: [[ADD:%.*]] = call { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32> [[A:%.*]], <2 x i32> <i32 1, i32 1>)
+; CHECK-NEXT: ret { <2 x i32>, <2 x i1> } [[ADD]]
+;
+ %add = call { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32> %a, <2 x i32> <i32 1, i32 1>)
+ ret { <2 x i32>, <2 x i1> } %add
+}
+
+
define i8 @uadd_sat_no_overflow(i8 %x) {
; CHECK-LABEL: @uadd_sat_no_overflow(
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[X:%.*]], 100