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armv8: ls2080a: Add serdes1 protocol 0x3b support
author
Priyanka Jain
<priyanka.jain@nxp.com>
Tue, 29 Nov 2016 11:15:05 +0000
(16:45 +0530)
committer
York Sun
<york.sun@nxp.com>
Mon, 5 Dec 2016 16:31:45 +0000
(08:31 -0800)
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
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diff --git
a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
index
67d605e
..
ab83e85
100644
(file)
--- a/
arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
+++ b/
arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
@@
-36,6
+36,7
@@
static struct serdes_config serdes1_cfg_tbl[] = {
{0x35, {QSGMII_D, QSGMII_C, QSGMII_B, PCIE2, XFI4, XFI3, XFI2, XFI1 } },
{0x39, {SGMII8, SGMII7, SGMII6, PCIE2, SGMII4, SGMII3, SGMII2,
PCIE1 } },
+ {0x3B, {XFI8, XFI7, XFI6, PCIE2, XFI4, XFI3, XFI2, PCIE1 } },
{0x4B, {PCIE2, PCIE2, PCIE2, PCIE2, XFI4, XFI3, XFI2, XFI1 } },
{0x4C, {XFI8, XFI7, XFI6, XFI5, PCIE1, PCIE1, PCIE1, PCIE1 } },
{0x4D, {SGMII8, SGMII7, PCIE2, PCIE2, SGMII4, SGMII3, PCIE1, PCIE1 } },