mlxsw: pci: Implement reset done check

Firmware now tells us that the reset is done by passing a magic value
via register. Use it to shorten the wait in case this is supported.
With old firmware, we still wait until the timeout is reached.

Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c
index 7992c553c1f5ce2e4de9cec4caa798e0da676531..7f4173c8eda36c979b0d0e5b14f5bacc81a23a3e 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlxsw/pci.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c
@@ -1681,11 +1681,18 @@ static const struct mlxsw_bus mlxsw_pci_bus = {
 
 static int mlxsw_pci_sw_reset(struct mlxsw_pci *mlxsw_pci)
 {
+       unsigned long end;
+
        mlxsw_pci_write32(mlxsw_pci, SW_RESET, MLXSW_PCI_SW_RESET_RST_BIT);
-       /* Current firware does not let us know when the reset is done.
-        * So we just wait here for constant time and hope for the best.
-        */
-       msleep(MLXSW_PCI_SW_RESET_TIMEOUT_MSECS);
+       wmb(); /* reset needs to be written before we read control register */
+       end = jiffies + msecs_to_jiffies(MLXSW_PCI_SW_RESET_TIMEOUT_MSECS);
+       do {
+               u32 val = mlxsw_pci_read32(mlxsw_pci, FW_READY);
+
+               if ((val & MLXSW_PCI_FW_READY_MASK) == MLXSW_PCI_FW_READY_MAGIC)
+                       break;
+               cond_resched();
+       } while (time_before(jiffies, end));
        return 0;
 }
 

diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.h b/drivers/net/ethernet/mellanox/mlxsw/pci.h
index 912106054ff2701d29a805b8e31cb41dc939b5d4..d942a3e6fa4151cbc10f4207b25c95ea8aa734c6 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlxsw/pci.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/pci.h
@@ -61,6 +61,9 @@
 #define MLXSW_PCI_SW_RESET                     0xF0010
 #define MLXSW_PCI_SW_RESET_RST_BIT             BIT(0)
 #define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS       5000
+#define MLXSW_PCI_FW_READY                     0xA1844
+#define MLXSW_PCI_FW_READY_MASK                        0xFF
+#define MLXSW_PCI_FW_READY_MAGIC               0x5E
 
 #define MLXSW_PCI_DOORBELL_SDQ_OFFSET          0x000
 #define MLXSW_PCI_DOORBELL_RDQ_OFFSET          0x200