... and give more guidance to users.
If specifying -msve-vector-bits on a non-SVE target, clang would say:
error: '-msve-vector-bits' is not supported without SVE enabled
1. The driver lacks logic for "implied features".
This would result in this error being raised for -march=...+sve2,
even though +sve2 implies +sve.
2. Feature implication is well modelled in LLVM, so push the error down
the stack.
3. Hint to the user what flag they need to consider setting.
Now clang fails later, when the feature is used, saying:
aarch64-sve-vector-bits.c:42:41: error: 'arm_sve_vector_bits' attribute is not supported on targets missing 'sve'; specify an appropriate -march= or -mcpu=
typedef svint32_t noflag __attribute__((arm_sve_vector_bits(256)));
Move clang/test/Sema/{neon => arm}-vector-types-support.c and put tests for
this warning together in one place.
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D92487
def err_drv_invalid_object_mode : Error<"OBJECT_MODE setting %0 is not recognized and is not a valid setting.">;
-def err_drv_invalid_sve_vector_bits : Error<
- "'-msve-vector-bits' is not supported without SVE enabled">;
-
def err_aix_default_altivec_abi : Error<
"The default Altivec ABI on AIX is not yet supported, use '-mabi=vec-extabi' for the extended Altivec ABI">;
"attribute ignored">,
InGroup<IgnoredAttributes>;
def err_attribute_unsupported
- : Error<"%0 attribute is not supported for this target">;
+ : Error<"%0 attribute is not supported on targets missing %1;"
+ " specify an appropriate -march= or -mcpu=">;
// The err_*_attribute_argument_not_int are separate because they're used by
// VerifyIntegerConstantExpression.
def err_aligned_attribute_argument_not_int : Error<
if (V8_6Pos != std::end(Features))
V8_6Pos = Features.insert(std::next(V8_6Pos), {"+i8mm", "+bf16"});
- bool HasSve = llvm::is_contained(Features, "+sve");
- // -msve-vector-bits=<bits> flag is valid only if SVE is enabled.
- if (Args.hasArg(options::OPT_msve_vector_bits_EQ))
- if (!HasSve)
- D.Diag(diag::err_drv_invalid_sve_vector_bits);
-
if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
options::OPT_munaligned_access)) {
if (A->getOption().matches(options::OPT_mno_unaligned_access))
// not to need a separate attribute)
if (!S.Context.getTargetInfo().hasFeature("neon") &&
!S.Context.getTargetInfo().hasFeature("mve")) {
- S.Diag(Attr.getLoc(), diag::err_attribute_unsupported) << Attr;
+ S.Diag(Attr.getLoc(), diag::err_attribute_unsupported)
+ << Attr << "'neon' or 'mve'";
Attr.setInvalid();
return;
}
Sema &S) {
// Target must have SVE.
if (!S.Context.getTargetInfo().hasFeature("sve")) {
- S.Diag(Attr.getLoc(), diag::err_attribute_unsupported) << Attr;
+ S.Diag(Attr.getLoc(), diag::err_attribute_unsupported) << Attr << "'sve'";
Attr.setInvalid();
return;
}
// CHECK-2048: "-msve-vector-bits=2048"
// CHECK-SCALABLE-NOT: "-msve-vector-bits=
-// Bail out if -msve-vector-bits is specified without SVE enabled
-// -----------------------------------------------------------------------------
-// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -msve-vector-bits=128 \
-// RUN: 2>&1 | FileCheck --check-prefix=CHECK-NO-SVE-ERROR %s
-// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -msve-vector-bits=256 \
-// RUN: 2>&1 | FileCheck --check-prefix=CHECK-NO-SVE-ERROR %s
-// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -msve-vector-bits=512 \
-// RUN: 2>&1 | FileCheck --check-prefix=CHECK-NO-SVE-ERROR %s
-// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -msve-vector-bits=1024 \
-// RUN: 2>&1 | FileCheck --check-prefix=CHECK-NO-SVE-ERROR %s
-// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -msve-vector-bits=2048 \
-// RUN: 2>&1 | FileCheck --check-prefix=CHECK-NO-SVE-ERROR %s
-
-// CHECK-NO-SVE-ERROR: error: '-msve-vector-bits' is not supported without SVE enabled
-
// Error out if an unsupported value is passed to -msve-vector-bits.
// -----------------------------------------------------------------------------
// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
--- /dev/null
+// RUN: %clang_cc1 %s -triple armv7 -fsyntax-only -verify
+
+typedef __attribute__((neon_vector_type(2))) int int32x2_t; // expected-error{{'neon_vector_type' attribute is not supported on targets missing 'neon' or 'mve'; specify an appropriate -march= or -mcpu=}}
+typedef __attribute__((neon_polyvector_type(16))) short poly8x16_t; // expected-error{{'neon_polyvector_type' attribute is not supported on targets missing 'neon' or 'mve'; specify an appropriate -march= or -mcpu=}}
+typedef __attribute__((arm_sve_vector_bits(256))) void nosveflag; // expected-error{{'arm_sve_vector_bits' attribute is not supported on targets missing 'sve'; specify an appropriate -march= or -mcpu=}}
+++ /dev/null
-// RUN: %clang_cc1 %s -triple armv7 -fsyntax-only -verify
-
-typedef __attribute__((neon_vector_type(2))) int int32x2_t; // expected-error{{'neon_vector_type' attribute is not supported for this target}}
-typedef __attribute__((neon_polyvector_type(16))) short poly8x16_t; // expected-error{{'neon_polyvector_type' attribute is not supported for this target}}