arm64: dts: qcom: sm8550: Add video clock controller
authorJagadeesh Kona <quic_jkona@quicinc.com>
Wed, 24 May 2023 14:52:03 +0000 (20:22 +0530)
committerBjorn Andersson <andersson@kernel.org>
Thu, 25 May 2023 04:50:44 +0000 (21:50 -0700)
Add device node for video clock controller on Qualcomm SM8550 platform.

Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524145203.13153-5-quic_jkona@quicinc.com
arch/arm64/boot/dts/qcom/sm8550.dtsi

index 1c9460d..0595190 100644 (file)
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/clock/qcom,sm8450-videocc.h>
 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
                        };
                };
 
+               videocc: clock-controller@aaf0000 {
+                       compatible = "qcom,sm8550-videocc";
+                       reg = <0 0x0aaf0000 0 0x10000>;
+                       clocks = <&bi_tcxo_div2>,
+                                <&gcc GCC_VIDEO_AHB_CLK>;
+                       power-domains = <&rpmhpd SM8550_MMCX>;
+                       required-opps = <&rpmhpd_opp_low_svs>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       #power-domain-cells = <1>;
+               };
+
                mdss: display-subsystem@ae00000 {
                        compatible = "qcom,sm8550-mdss";
                        reg = <0 0x0ae00000 0 0x1000>;