* Delete a no-longer-used override, and mark the other
getRegisterTypeForCallingConv() as override.
* SPE only supports i32, not i64, as the internal type, so simply remove
the type check, so that DestReg and Opc are provably always set.
GCC 6.4 did not warn about either of the above.
llvm-svn: 337350
unsigned Opc;
if (PPCSubTarget->hasSPE()) {
- if (DstVT == MVT::i32) {
- DestReg = createResultReg(&PPC::GPRCRegClass);
- if (IsSigned)
- Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ;
- else
- Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ;
- }
+ DestReg = createResultReg(&PPC::GPRCRegClass);
+ if (IsSigned)
+ Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ;
+ else
+ Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ;
} else {
DestReg = createResultReg(&PPC::F8RCRegClass);
if (DstVT == MVT::i32)
return PPCTargetLowering::getRegisterType(Context, VT);
}
-MVT PPCTargetLowering::getRegisterTypeForCallingConv(MVT VT) const {
- if (Subtarget.hasSPE() && VT == MVT::f64)
- return MVT::i32;
- return PPCTargetLowering::getRegisterType(VT);
-}
-
bool PPCTargetLowering::useSoftFloat() const {
return Subtarget.useSoftFloat();
}
unsigned getNumRegistersForCallingConv(LLVMContext &Context,
EVT VT) const override;
- MVT getRegisterTypeForCallingConv(MVT VT) const;
MVT getRegisterTypeForCallingConv(LLVMContext &Context,
- EVT VT) const;
+ EVT VT) const override;
private:
struct ReuseLoadInfo {