drm/amd/display: Fix double cursor on non-video RGB MPO

[Why]

DC makes use of layer_index (zpos) when picking the HW plane to enable
HW cursor on. However, some compositors will not attach zpos information
to each DRM plane. Consequently, in amdgpu, we default layer_index to 0
and do not update it.

This causes said DC logic to enable HW cursor on all planes of the same
layer_index, which manifests as a double cursor issue if one of the
planes is scaled (and hence scaling the cursor as well).

[How]

Use DRM core helpers to calculate a normalized_zpos value for each
drm_plane_state under each crtc, within the atomic state.

This helper will first consider existing zpos values, and if
identical/unset, fallback to plane ID ordering.

The normalized_zpos is then passed to dc_plane_info during atomic check
for later use by the cursor logic.

Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 5da2a1d..e53562d 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4739,7 +4739,7 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev,
        plane_info->visible = true;
        plane_info->stereo_format = PLANE_STEREO_FORMAT_NONE;
 
-       plane_info->layer_index = 0;
+       plane_info->layer_index = plane_state->normalized_zpos;
 
        ret = fill_plane_color_attributes(plane_state, plane_info->format,
                                          &plane_info->color_space);
@@ -4807,7 +4807,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev,
        dc_plane_state->global_alpha = plane_info.global_alpha;
        dc_plane_state->global_alpha_value = plane_info.global_alpha_value;
        dc_plane_state->dcc = plane_info.dcc;
-       dc_plane_state->layer_index = plane_info.layer_index; // Always returns 0
+       dc_plane_state->layer_index = plane_info.layer_index;
        dc_plane_state->flip_int_enabled = true;
 
        /*
@@ -9460,6 +9460,14 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                }
        }
 
+       /*
+        * DC consults the zpos (layer_index in DC terminology) to determine the
+        * hw plane on which to enable the hw cursor (see
+        * `dcn10_can_pipe_disable_cursor`). By now, all modified planes are in
+        * atomic state, so call drm helper to normalize zpos.
+        */
+       drm_atomic_normalize_zpos(dev, state);
+
        /* Remove exiting planes if they are modified */
        for_each_oldnew_plane_in_state_reverse(state, plane, old_plane_state, new_plane_state, i) {
                ret = dm_update_plane_state(dc, state, plane,