/// CreateLiveInRegister - Helper function that adds Reg to the LiveIn list
/// of the DAG's MachineFunction. This returns a Register SDNode representing
- /// Reg.
+ /// Reg.
SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
unsigned Reg, EVT VT) const;
//==-----------------------------------------------------------------------===//
#include "AMDIL7XXDevice.h"
#include "AMDGPUSubtarget.h"
-#ifdef UPSTREAM_LLVM
-#include "AMDIL7XXAsmPrinter.h"
-#endif
#include "AMDILDevice.h"
using namespace llvm;
return 1;
}
-AsmPrinter*
-AMDGPU7XXDevice::getAsmPrinter(TargetMachine& TM, MCStreamer &Streamer) const
-{
-#ifdef UPSTREAM_LLVM
- return new AMDGPU7XXAsmPrinter(TM, Streamer);
-#else
- return NULL;
-#endif
-}
-
AMDGPU770Device::AMDGPU770Device(AMDGPUSubtarget *ST): AMDGPU7XXDevice(ST)
{
setCaps();
virtual uint32_t getGeneration() const;
virtual uint32_t getResourceID(uint32_t DeviceID) const;
virtual uint32_t getMaxNumUAVs() const;
- AsmPrinter*
- getAsmPrinter(TargetMachine& TM, MCStreamer &Streamer) const;
protected:
virtual void setCaps();
namespace llvm {
class AMDGPUSubtarget;
- class AMDGPUAsmPrinter;
- class AMDGPUPointerManager;
- class AsmPrinter;
class MCStreamer;
//===----------------------------------------------------------------------===//
// Interface for data that is specific to a single device
// Get the max number of UAV's for this device.
virtual uint32_t getMaxNumUAVs() const = 0;
- // Interface to get the Asm printer for each device.
- virtual AsmPrinter*
- getAsmPrinter(TargetMachine& TM, MCStreamer &Streamer) const = 0;
-
// API utilizing more detailed capabilities of each family of
// cards. If a capability is supported, then either usesHardware or
// usesSoftware returned true. If usesHardware returned true, then
//
//==-----------------------------------------------------------------------===//
#include "AMDILEvergreenDevice.h"
-#ifdef UPSTREAM_LLVM
-#include "AMDILEGAsmPrinter.h"
-#endif
using namespace llvm;
mHWBits.set(AMDGPUDeviceInfo::TmrReg);
}
-AsmPrinter*
-AMDGPUEvergreenDevice::getAsmPrinter(TargetMachine& TM, MCStreamer &Streamer) const
-{
-#ifdef UPSTREAM_LLVM
- return new AMDGPUEGAsmPrinter(TM, Streamer);
-#else
- return NULL;
-#endif
-}
-
AMDGPUCypressDevice::AMDGPUCypressDevice(AMDGPUSubtarget *ST)
: AMDGPUEvergreenDevice(ST) {
setCaps();
virtual uint32_t getGeneration() const;
virtual uint32_t getMaxNumUAVs() const;
virtual uint32_t getResourceID(uint32_t) const;
- virtual AsmPrinter*
- getAsmPrinter(TargetMachine& TM, MCStreamer &Streamer) const;
protected:
virtual void setCaps();
}; // AMDGPUEvergreenDevice
#undef GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN
AMDGPUIntrinsicInfo::AMDGPUIntrinsicInfo(TargetMachine *tm)
- : TargetIntrinsicInfo(), mTM(tm)
+ : TargetIntrinsicInfo()
{
}
class AMDGPUIntrinsicInfo : public TargetIntrinsicInfo {
- TargetMachine *mTM;
public:
AMDGPUIntrinsicInfo(TargetMachine *tm);
std::string getName(unsigned int IntrId, Type **Tys = 0,
//
//===----------------------------------------------------------------------===//
-#include "MCTargetDesc/AMDILMCTargetDesc.h"
+#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/MC/MCAsmBackend.h"
#include "llvm/MC/MCAssembler.h"
-//===-- MCTargetDesc/AMDILMCAsmInfo.cpp - TODO: Add brief description -------===//
+//===-- MCTargetDesc/AMDGPUMCAsmInfo.cpp - TODO: Add brief description -------===//
//
// The LLVM Compiler Infrastructure
//
//
//===----------------------------------------------------------------------===//
-#include "AMDILMCAsmInfo.h"
+#include "AMDGPUMCAsmInfo.h"
#ifndef NULL
#define NULL 0
#endif
using namespace llvm;
-AMDILMCAsmInfo::AMDILMCAsmInfo(const Target &T, StringRef &TT) : MCAsmInfo()
+AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Target &T, StringRef &TT) : MCAsmInfo()
{
HasSingleParameterDotFile = false;
WeakDefDirective = NULL;
AsmTransCBE = NULL;
}
const char*
-AMDILMCAsmInfo::getDataASDirective(unsigned int Size, unsigned int AS) const
+AMDGPUMCAsmInfo::getDataASDirective(unsigned int Size, unsigned int AS) const
{
switch (AS) {
default:
}
const MCSection*
-AMDILMCAsmInfo::getNonexecutableStackSection(MCContext &CTX) const
+AMDGPUMCAsmInfo::getNonexecutableStackSection(MCContext &CTX) const
{
return NULL;
}
-//===-- MCTargetDesc/AMDILMCAsmInfo.h - TODO: Add brief description -------===//
+//===-- MCTargetDesc/AMDGPUMCAsmInfo.h - TODO: Add brief description -------===//
//
// The LLVM Compiler Infrastructure
//
//
//===----------------------------------------------------------------------===//
-#ifndef AMDILMCASMINFO_H_
-#define AMDILMCASMINFO_H_
+#ifndef AMDGPUMCASMINFO_H_
+#define AMDGPUMCASMINFO_H_
#include "llvm/MC/MCAsmInfo.h"
namespace llvm {
class Target;
class StringRef;
- class AMDILMCAsmInfo : public MCAsmInfo {
+ class AMDGPUMCAsmInfo : public MCAsmInfo {
public:
- explicit AMDILMCAsmInfo(const Target &T, StringRef &TT);
+ explicit AMDGPUMCAsmInfo(const Target &T, StringRef &TT);
const char*
getDataASDirective(unsigned int Size, unsigned int AS) const;
const MCSection* getNonexecutableStackSection(MCContext &CTX) const;
};
} // namespace llvm
-#endif // AMDILMCASMINFO_H_
+#endif // AMDGPUMCASMINFO_H_
-#include "AMDILMCTargetDesc.h"
-#include "AMDILMCAsmInfo.h"
+#include "AMDGPUMCTargetDesc.h"
+#include "AMDGPUMCAsmInfo.h"
#include "InstPrinter/AMDGPUInstPrinter.h"
#include "llvm/MC/MachineLocation.h"
#include "llvm/MC/MCCodeGenInfo.h"
extern "C" void LLVMInitializeAMDGPUTargetMC() {
- RegisterMCAsmInfo<AMDILMCAsmInfo> Y(TheAMDGPUTarget);
+ RegisterMCAsmInfo<AMDGPUMCAsmInfo> Y(TheAMDGPUTarget);
TargetRegistry::RegisterMCCodeGenInfo(TheAMDGPUTarget, createAMDGPUMCCodeGenInfo);
-//===-- AMDILMCTargetDesc.h - AMDIL Target Descriptions -----*- C++ -*-===//
+//===-- AMDGPUMCTargetDesc.h - AMDGPU Target Descriptions -----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
//
//===----------------------------------------------------------------------===//
//
-// This file provides AMDIL specific target descriptions.
+// This file provides AMDGPU specific target descriptions.
//
//===----------------------------------------------------------------------===//
//
-#ifndef AMDILMCTARGETDESC_H
-#define AMDILMCTARGETDESC_H
+#ifndef AMDGPUMCTARGETDESC_H
+#define AMDGPUMCTARGETDESC_H
#include "llvm/ADT/StringRef.h"
#define GET_SUBTARGETINFO_ENUM
#include "AMDGPUGenSubtargetInfo.inc"
-#endif // AMDILMCTARGETDESC_H
+#endif // AMDGPUMCTARGETDESC_H
//===----------------------------------------------------------------------===//
#include "R600Defines.h"
-#include "MCTargetDesc/AMDILMCTargetDesc.h"
+#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "MCTargetDesc/AMDGPUMCCodeEmitter.h"
#include "llvm/MC/MCCodeEmitter.h"
#include "llvm/MC/MCContext.h"
//
//===----------------------------------------------------------------------===//
-#include "MCTargetDesc/AMDILMCTargetDesc.h"
+#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "MCTargetDesc/AMDGPUMCCodeEmitter.h"
#include "llvm/MC/MCCodeEmitter.h"
#include "llvm/MC/MCContext.h"
SIMachineFunctionInfo.cpp \
SIRegisterInfo.cpp \
InstPrinter/AMDGPUInstPrinter.cpp \
- MCTargetDesc/AMDILMCAsmInfo.cpp \
+ MCTargetDesc/AMDGPUMCAsmInfo.cpp \
MCTargetDesc/AMDGPUAsmBackend.cpp \
- MCTargetDesc/AMDILMCTargetDesc.cpp \
+ MCTargetDesc/AMDGPUMCTargetDesc.cpp \
MCTargetDesc/SIMCCodeEmitter.cpp \
MCTargetDesc/R600MCCodeEmitter.cpp \
- TargetInfo/AMDILTargetInfo.cpp \
+ TargetInfo/AMDGPUTargetInfo.cpp \
radeon_llvm_emit.cpp
C_SOURCES := \
{
// Convert to DWORD address
unsigned NewAddr = MRI.createVirtualRegister(
- AMDGPU::R600_TReg32_XRegisterClass);
+ &AMDGPU::R600_TReg32_XRegClass);
unsigned ShiftValue = MRI.createVirtualRegister(
- AMDGPU::R600_TReg32RegisterClass);
+ &AMDGPU::R600_TReg32RegClass);
// XXX In theory, we should be able to pass ShiftValue directly to
// the LSHR_eg instruction as an inline literal, but I tried doing it
case AMDGPU::TXD:
{
- unsigned t0 = MRI.createVirtualRegister(AMDGPU::R600_Reg128RegisterClass);
- unsigned t1 = MRI.createVirtualRegister(AMDGPU::R600_Reg128RegisterClass);
+ unsigned t0 = MRI.createVirtualRegister(&AMDGPU::R600_Reg128RegClass);
+ unsigned t1 = MRI.createVirtualRegister(&AMDGPU::R600_Reg128RegClass);
BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SET_GRADIENTS_H), t0)
.addOperand(MI->getOperand(3))
{
switch(VT.SimpleTy) {
default:
- case MVT::i32: return AMDGPU::R600_TReg32RegisterClass;
+ case MVT::i32: return &AMDGPU::R600_TReg32RegClass;
}
}
for (unsigned reg_idx = 0; reg_idx < InterpUse[interp_idx].reg_count;
reg_idx++, used_vgprs++) {
- unsigned new_reg = AMDGPU::VReg_32RegisterClass->getRegister(used_vgprs);
- unsigned virt_reg = MRI.createVirtualRegister(AMDGPU::VReg_32RegisterClass);
+ unsigned new_reg = AMDGPU::VReg_32RegClass.getRegister(used_vgprs);
+ unsigned virt_reg = MRI.createVirtualRegister(&AMDGPU::VReg_32RegClass);
MRI.replaceRegWith(InterpUse[interp_idx].regs[reg_idx], virt_reg);
AddLiveIn(&MF, MRI, new_reg, virt_reg);
}
{
switch(VT.SimpleTy) {
default:
- case MVT::i32: return AMDGPU::VReg_32RegisterClass;
+ case MVT::i32: return &AMDGPU::VReg_32RegClass;
}
}
#include "SIRegisterGetHWRegNum.inc"
-//===-- TargetInfo/AMDILTargetInfo.cpp - TODO: Add brief description -------===//
+//===-- TargetInfo/AMDGPUTargetInfo.cpp - TODO: Add brief description -------===//
//
// The LLVM Compiler Infrastructure
//
//
//===----------------------------------------------------------------------===//
-#include "AMDIL.h"
+#include "AMDGPU.h"
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
/// The target for the AMDGPU backend
Target llvm::TheAMDGPUTarget;
-/// Extern function to initialize the targets for the AMDIL backend
+/// Extern function to initialize the targets for the AMDGPU backend
extern "C" void LLVMInitializeAMDGPUTargetInfo() {
RegisterTarget<Triple::r600, false>
R600(TheAMDGPUTarget, "r600", "AMD GPUs HD2XXX-HD6XXX");