Rename splatw0q to splatw3q

diff --git a/orc/orcemulateopcodes.c b/orc/orcemulateopcodes.c
index b396f85..f8ad367 100644 (file)
--- a/orc/orcemulateopcodes.c
+++ b/orc/orcemulateopcodes.c
@@ -2603,7 +2603,7 @@ emulate_storeq (OrcOpcodeExecutor *ex, int offset, int n)
 }
 
 void
-emulate_splatw0q (OrcOpcodeExecutor *ex, int offset, int n)
+emulate_splatw3q (OrcOpcodeExecutor *ex, int offset, int n)
 {
   int i;
   orc_union64 * ptr0;
@@ -2617,7 +2617,7 @@ emulate_splatw0q (OrcOpcodeExecutor *ex, int offset, int n)
   for (i = 0; i < n; i++) {
     /* 0: loadq */
     var32 = ptr4[i];
-    /* 1: splatw0q */
+    /* 1: splatw3q */
     var33.i = ((((orc_uint64)var32.i)>>48) << 48) | ((((orc_uint64)var32.i)>>48)<<32) | ((((orc_uint64)var32.i)>>48) << 16) | ((((orc_uint64)var32.i)>>48));
     /* 2: storeq */
     ptr0[i] = var33;

diff --git a/orc/orcemulateopcodes.h b/orc/orcemulateopcodes.h
index 7a93b61..b6546bf 100644 (file)
--- a/orc/orcemulateopcodes.h
+++ b/orc/orcemulateopcodes.h
@@ -104,7 +104,7 @@ void emulate_xorl (OrcOpcodeExecutor *ex, int i, int n);
 void emulate_loadq (OrcOpcodeExecutor *ex, int i, int n);
 void emulate_loadpq (OrcOpcodeExecutor *ex, int i, int n);
 void emulate_storeq (OrcOpcodeExecutor *ex, int i, int n);
-void emulate_splatw0q (OrcOpcodeExecutor *ex, int i, int n);
+void emulate_splatw3q (OrcOpcodeExecutor *ex, int i, int n);
 void emulate_convsbw (OrcOpcodeExecutor *ex, int i, int n);
 void emulate_convubw (OrcOpcodeExecutor *ex, int i, int n);
 void emulate_splatbw (OrcOpcodeExecutor *ex, int i, int n);

diff --git a/orc/orcopcodes.c b/orc/orcopcodes.c
index 405869f..31731eb 100644 (file)
--- a/orc/orcopcodes.c
+++ b/orc/orcopcodes.c
@@ -390,7 +390,7 @@ static OrcStaticOpcode opcodes[] = {
   { "loadq", ORC_STATIC_OPCODE_LOAD, { 8 }, { 8 }, emulate_loadq },
   { "loadpq", ORC_STATIC_OPCODE_LOAD|ORC_STATIC_OPCODE_SCALAR|ORC_STATIC_OPCODE_INVARIANT, { 8 }, { 8 }, emulate_loadpq },
   { "storeq", ORC_STATIC_OPCODE_STORE, { 8 }, { 8 }, emulate_storeq },
-  { "splatw0q", 0, { 8 }, { 8 }, emulate_splatw0q },
+  { "splatw3q", 0, { 8 }, { 8 }, emulate_splatw3q },
 
   { "convsbw", 0, { 2 }, { 1 }, emulate_convsbw },
   { "convubw", 0, { 2 }, { 1 }, emulate_convubw },

diff --git a/orc/orcprogram-c.c b/orc/orcprogram-c.c
index b9e44e3..88725fc 100644 (file)
--- a/orc/orcprogram-c.c
+++ b/orc/orcprogram-c.c
@@ -824,7 +824,7 @@ c_rule_splatbl (OrcCompiler *p, void *user, OrcInstruction *insn)
 }
 
 static void
-c_rule_splatw0q (OrcCompiler *p, void *user, OrcInstruction *insn)
+c_rule_splatw3q (OrcCompiler *p, void *user, OrcInstruction *insn)
 {
   char dest[40], src[40];
 
@@ -948,7 +948,7 @@ orc_c_init (void)
   orc_rule_register (rule_set, "splitwb", c_rule_splitwb, NULL);
   orc_rule_register (rule_set, "splatbw", c_rule_splatbw, NULL);
   orc_rule_register (rule_set, "splatbl", c_rule_splatbl, NULL);
-  orc_rule_register (rule_set, "splatw0q", c_rule_splatw0q, NULL);
+  orc_rule_register (rule_set, "splatw3q", c_rule_splatw3q, NULL);
   orc_rule_register (rule_set, "div255w", c_rule_div255w, NULL);
   orc_rule_register (rule_set, "divluw", c_rule_divluw, NULL);
 }

diff --git a/orc/orcrules-neon.c b/orc/orcrules-neon.c
index 8bb7655..08b5f12 100644 (file)
--- a/orc/orcrules-neon.c
+++ b/orc/orcrules-neon.c
@@ -1977,7 +1977,7 @@ orc_neon_rule_splatbl (OrcCompiler *p, void *user, OrcInstruction *insn)
 }
 
 static void
-orc_neon_rule_splatw0q (OrcCompiler *p, void *user, OrcInstruction *insn)
+orc_neon_rule_splatw3q (OrcCompiler *p, void *user, OrcInstruction *insn)
 {
   orc_uint32 code;
   int offset = 0;
@@ -2583,7 +2583,7 @@ orc_compiler_neon_register_rules (OrcTarget *target)
 
   REG(splatbw);
   REG(splatbl);
-  REG(splatw0q);
+  REG(splatw3q);
   REG(div255w);
 
   orc_rule_register (rule_set, "loadpb", neon_rule_loadpX, (void *)1);

diff --git a/orc/orcrules-sse.c b/orc/orcrules-sse.c
index f751878..313c697 100644 (file)
--- a/orc/orcrules-sse.c
+++ b/orc/orcrules-sse.c
@@ -916,7 +916,7 @@ sse_rule_convql (OrcCompiler *p, void *user, OrcInstruction *insn)
 }
 
 static void
-sse_rule_splatw0q (OrcCompiler *p, void *user, OrcInstruction *insn)
+sse_rule_splatw3q (OrcCompiler *p, void *user, OrcInstruction *insn)
 {
   int src = p->vars[insn->src_args[0]].alloc;
   int dest = p->vars[insn->dest_args[0]].alloc;
@@ -2330,7 +2330,7 @@ orc_compiler_sse_register_rules (OrcTarget *target)
   orc_rule_register (rule_set, "subusl", sse_rule_subusl_slow, NULL);
   orc_rule_register (rule_set, "convhwb", sse_rule_convhwb, NULL);
   orc_rule_register (rule_set, "convhlw", sse_rule_convhlw, NULL);
-  orc_rule_register (rule_set, "splatw0q", sse_rule_splatw0q, NULL);
+  orc_rule_register (rule_set, "splatw3q", sse_rule_splatw3q, NULL);
   orc_rule_register (rule_set, "splatbw", sse_rule_splatbw, NULL);
   orc_rule_register (rule_set, "splatbl", sse_rule_splatbl, NULL);
   orc_rule_register (rule_set, "div255w", sse_rule_div255w, NULL);

diff --git a/testsuite/test.orc b/testsuite/test.orc
index 6b65a68..0b52bfb 100644 (file)
--- a/testsuite/test.orc
+++ b/testsuite/test.orc
@@ -1791,7 +1791,7 @@ addusb d1, d1, t2
 
 x4 convubw t1, s1
 x4 convubw t2, s2
-splatw0q t2, t2
+splatw3q t2, t2
 x4 mullw t1, t1, t2
 x4 div255w t1, t1
 x4 convwb t3, t1
@@ -1819,7 +1819,7 @@ x4 addusb d1, d1, s1
 #compover d1, d1, t1
 x4 convubw t1, s1
 x4 convubw t2, s2
-splatw0q t2, t2
+splatw3q t2, t2
 x4 mullw t1, t1, t2
 x4 div255w t1, t1
 x4 convwb t3, t1
@@ -1827,7 +1827,7 @@ x4 convwb t3, t1
 loadl d, d1
 x4 convubw d_wide, d
 x4 xorw t1, t1, 0x00ff
-splatw0q t2, t1
+splatw3q t2, t1
 x4 mullw t1, d_wide, t2
 x4 div255w t1, t1
 x4 convwb d, t1
@@ -1848,7 +1848,7 @@ x4 convubw t1, s
 loadl d, d1
 x4 convubw d_wide, d
 x4 xorw t1, t1, 0x00ff
-splatw0q t2, t1
+splatw3q t2, t1
 x4 mullw t1, d_wide, t2
 x4 div255w t1, t1
 x4 convwb d, t1
@@ -1867,12 +1867,12 @@ x4 addusb d1, d, s
 
 x4 convubw t1, s1
 x4 convubw t2, s2
-splatw0q t2, t2
+splatw3q t2, t2
 x4 mullw t1, t1, t2
 x4 div255w t1, t1
 # ORC_MULDIV_255((s),(m)), m is from dest
 x4 convubw d_wide, d1
-splatw0q t2, d_wide
+splatw3q t2, d_wide
 x4 mullw t1, t1, t2
 x4 div255w t1, t1
 x4 convwb d1, t1
@@ -1891,7 +1891,7 @@ x4 convwb d1, t1
 x4 convubw t1, s1
 # ORC_MULDIV_255((s),(m)), m is from dest
 x4 convubw d_wide, d1
-splatw0q t2, d_wide
+splatw3q t2, d_wide
 x4 mullw t1, t1, t2
 x4 div255w t1, t1
 x4 convwb d1, t1
@@ -1909,12 +1909,12 @@ x4 convwb d1, t1
 
 x4 convubw t1, s1
 x4 convubw t2, s2
-splatw0q t2, t2
+splatw3q t2, t2
 x4 mullw t1, t1, t2
 x4 div255w t1, t1
 # ORC_MULDIV_255((s),(m)), m is from dest
 x4 convubw d_wide, d1
-splatw0q t2, d_wide
+splatw3q t2, d_wide
 x4 xorw t2, t2, 0x00ff
 x4 mullw t1, t1, t2
 x4 div255w t1, t1
@@ -1934,7 +1934,7 @@ x4 convwb d1, t1
 x4 convubw t1, s1
 # ORC_MULDIV_255((s),(m)), m is from dest
 x4 convubw d_wide, d1
-splatw0q t2, d_wide
+splatw3q t2, d_wide
 x4 xorw t2, t2, 0x00ff
 x4 mullw t1, t1, t2
 x4 div255w t1, t1
@@ -1958,18 +1958,18 @@ x4 convwb d1, t1
 
 x4 convubw t1, s1
 x4 convubw t2, s2
-splatw0q t2, t2
+splatw3q t2, t2
 x4 mullw t1, t1, t2
 x4 div255w t1, t1
 
 x4 convubw d_wide, d1
-splatw0q t2, d_wide
+splatw3q t2, d_wide
 x4 mullw t3, t1, t2
 x4 div255w t3, t3
 x4 convwb t4, t3
 
 x4 convubw d_wide, d1
-splatw0q t2, t1
+splatw3q t2, t1
 x4 xorw t2, t2, 0x00ff
 x4 mullw t1, d_wide, t2
 x4 div255w t1, t1
@@ -1993,13 +1993,13 @@ x4 addusb d1, t4, t5
 x4 convubw t1, s1
 
 x4 convubw d_wide, d1
-splatw0q t2, d_wide
+splatw3q t2, d_wide
 x4 mullw t3, t1, t2
 x4 div255w t3, t3
 x4 convwb t4, t3
 
 x4 convubw d_wide, d1
-splatw0q t2, t1
+splatw3q t2, t1
 x4 xorw t2, t2, 0x00ff
 x4 mullw t1, d_wide, t2
 x4 div255w t1, t1
@@ -2024,19 +2024,19 @@ x4 addusb d1, t4, t5
 
 x4 convubw t1, s1
 x4 convubw t2, s2
-splatw0q t2, t2
+splatw3q t2, t2
 x4 mullw t1, t1, t2
 x4 div255w t1, t1
 
 x4 convubw d_wide, d1
-splatw0q t2, d_wide
+splatw3q t2, d_wide
 x4 xorw t2, t2, 0x00ff
 x4 mullw t3, t1, t2
 x4 div255w t3, t3
 x4 convwb t4, t3
 
 x4 convubw d_wide, d1
-splatw0q t2, t1
+splatw3q t2, t1
 x4 xorw t2, t2, 0x00ff
 x4 mullw t1, d_wide, t2
 x4 div255w t1, t1
@@ -2059,14 +2059,14 @@ x4 addusb d1, t4, t5
 
 x4 convubw t1, s1
 x4 convubw d_wide, d1
-splatw0q t2, d_wide
+splatw3q t2, d_wide
 x4 xorw t2, t2, 0x00ff
 x4 mullw t3, t1, t2
 x4 div255w t3, t3
 x4 convwb t4, t3
 
 x4 convubw d_wide, d1
-splatw0q t2, t1
+splatw3q t2, t1
 x4 xorw t2, t2, 0x00ff
 x4 mullw t1, d_wide, t2
 x4 div255w t1, t1
@@ -2086,7 +2086,7 @@ x4 addusb d1, t4, t5
 
 x4 convubw t1, s1
 x4 convubw t2, s2
-#splatw0q t2, t2
+#splatw3q t2, t2
 x4 mullw t1, t1, t2
 x4 div255w t1, t1
 x4 convwb t3, t1
@@ -2115,7 +2115,7 @@ x4 addusb d1, d1, s1
 
 x4 convubw s_wide, s1
 x4 convubw m_wide, s2
-splatw0q xa, s_wide
+splatw3q xa, s_wide
 x4 mullw s_wide, s_wide, m_wide
 x4 div255w s_wide, s_wide
 x4 convwb s, s_wide
@@ -2144,7 +2144,7 @@ x4 addusb d1, d, s
 .temp 4 s
 
 x4 convubw s_wide, s1
-splatw0q xa, s_wide
+splatw3q xa, s_wide
 x4 convwb s, s_wide
 x4 copyw m_wide, xa
 loadl d, d1
@@ -2177,7 +2177,7 @@ x4 convwb t3, t1
 loadl d, d1
 x4 convubw d_wide, d
 x4 xorw t1, t1, 0x00ff
-splatw0q t2, t1
+splatw3q t2, t1
 x4 mullw t1, d_wide, t2
 x4 div255w t1, t1
 x4 convwb d, t1
@@ -2201,7 +2201,7 @@ x4 addusb d1, d, t3
 
 x4 convubw s_wide, p1
 x4 convubw m_wide, s1
-splatw0q xa, s_wide
+splatw3q xa, s_wide
 x4 mullw s_wide, s_wide, m_wide
 x4 div255w s_wide, s_wide
 x4 convwb s, s_wide