Known.Zero.setBitsFrom(1);
break;
case ISD::SETCC:
+ case ISD::SETCCCARRY:
case ISD::STRICT_FSETCC:
case ISD::STRICT_FSETCCS: {
unsigned OpNo = Op->isStrictFPOpcode() ? 1 : 0;
break;
case ISD::USUBO:
case ISD::SSUBO:
+ case ISD::SUBCARRY:
+ case ISD::SSUBO_CARRY:
if (Op.getResNo() == 1) {
// If we know the result of a setcc has the top bits zero, use this info.
if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
assert(Op.getResNo() == 0 &&
"We only compute knownbits for the difference here.");
+ // TODO: Compute influence of the carry operand.
+ if (Opcode == ISD::SUBCARRY || Opcode == ISD::SSUBO_CARRY)
+ break;
+
Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
Known = KnownBits::computeForAddSub(/* Add */ false, /* NSW */ false,
case ISD::UADDO:
case ISD::SADDO:
case ISD::ADDCARRY:
+ case ISD::SADDO_CARRY:
if (Op.getResNo() == 1) {
// If we know the result of a setcc has the top bits zero, use this info.
if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
if (Opcode == ISD::ADDE)
// Can't track carry from glue, set carry to unknown.
Carry.resetAll();
- else if (Opcode == ISD::ADDCARRY)
+ else if (Opcode == ISD::ADDCARRY || Opcode == ISD::SADDO_CARRY)
// TODO: Compute known bits for the carry operand. Not sure if it is worth
// the trouble (how often will we find a known carry bit). And I haven't
// tested this very much yet, but something like this might work:
return std::min(Tmp, Tmp2);
case ISD::SADDO:
case ISD::UADDO:
+ case ISD::SADDO_CARRY:
+ case ISD::ADDCARRY:
case ISD::SSUBO:
case ISD::USUBO:
+ case ISD::SSUBO_CARRY:
+ case ISD::SUBCARRY:
case ISD::SMULO:
case ISD::UMULO:
if (Op.getResNo() != 1)
return VTBits;
break;
case ISD::SETCC:
+ case ISD::SETCCCARRY:
case ISD::STRICT_FSETCC:
case ISD::STRICT_FSETCCS: {
unsigned OpNo = Op->isStrictFPOpcode() ? 1 : 0;
; CHECK: // %bb.0:
; CHECK-NEXT: subs x0, x0, x4
; CHECK-NEXT: sbcs x1, x1, x5
-; CHECK-NEXT: cset w8, lo
-; CHECK-NEXT: cmp wzr, w8
; CHECK-NEXT: sbcs x2, x2, x6
-; CHECK-NEXT: cset w8, lo
-; CHECK-NEXT: cmp wzr, w8
; CHECK-NEXT: sbcs x3, x3, x7
; CHECK-NEXT: cset w8, lo
; CHECK-NEXT: eor w4, w8, #0x1
; CHECK: // %bb.0:
; CHECK-NEXT: subs x0, x0, x4
; CHECK-NEXT: sbcs x1, x1, x5
-; CHECK-NEXT: cset w8, lo
-; CHECK-NEXT: cmp wzr, w8
; CHECK-NEXT: sbcs x2, x2, x6
-; CHECK-NEXT: cset w8, lo
-; CHECK-NEXT: cmp wzr, w8
; CHECK-NEXT: sbcs x3, x3, x7
; CHECK-NEXT: cset w4, lo
; CHECK-NEXT: ret
; CHECK: // %bb.0:
; CHECK-NEXT: subs x0, x0, x4
; CHECK-NEXT: sbcs x1, x1, x5
-; CHECK-NEXT: cset w8, lo
-; CHECK-NEXT: cmp wzr, w8
; CHECK-NEXT: sbcs x2, x2, x6
-; CHECK-NEXT: cset w8, lo
-; CHECK-NEXT: cmp wzr, w8
; CHECK-NEXT: sbcs x3, x3, x7
; CHECK-NEXT: cset w8, vs
; CHECK-NEXT: eor w4, w8, #0x1
; CHECK: // %bb.0:
; CHECK-NEXT: subs x0, x0, x4
; CHECK-NEXT: sbcs x1, x1, x5
-; CHECK-NEXT: cset w8, lo
-; CHECK-NEXT: cmp wzr, w8
; CHECK-NEXT: sbcs x2, x2, x6
-; CHECK-NEXT: cset w8, lo
-; CHECK-NEXT: cmp wzr, w8
; CHECK-NEXT: sbcs x3, x3, x7
; CHECK-NEXT: cset w4, vs
; CHECK-NEXT: ret