((ti->vblank_hi << 8) | ti->vblank_lo);
mode->clock = ti->pixel_clock * 10;
- PSB_DEBUG_ENTRY("hdisplay is %d\n", mode->hdisplay);
- PSB_DEBUG_ENTRY("vdisplay is %d\n", mode->vdisplay);
- PSB_DEBUG_ENTRY("HSS is %d\n", mode->hsync_start);
- PSB_DEBUG_ENTRY("HSE is %d\n", mode->hsync_end);
- PSB_DEBUG_ENTRY("htotal is %d\n", mode->htotal);
- PSB_DEBUG_ENTRY("VSS is %d\n", mode->vsync_start);
- PSB_DEBUG_ENTRY("VSE is %d\n", mode->vsync_end);
- PSB_DEBUG_ENTRY("vtotal is %d\n", mode->vtotal);
- PSB_DEBUG_ENTRY("clock is %d\n", mode->clock);
} else {
mode->hdisplay = 540;
mode->vdisplay = 960;
mode->vtotal = mode->vsync_end + 4;
mode->vrefresh = 60;
mode->clock = mode->vrefresh * mode->vtotal *
- mode->htotal / 1000;
- }
+ mode->htotal / 1000;
+ }
+
+ PSB_DEBUG_ENTRY("hdisplay is %d\n", mode->hdisplay);
+ PSB_DEBUG_ENTRY("vdisplay is %d\n", mode->vdisplay);
+ PSB_DEBUG_ENTRY("HSS is %d\n", mode->hsync_start);
+ PSB_DEBUG_ENTRY("HSE is %d\n", mode->hsync_end);
+ PSB_DEBUG_ENTRY("htotal is %d\n", mode->htotal);
+ PSB_DEBUG_ENTRY("VSS is %d\n", mode->vsync_start);
+ PSB_DEBUG_ENTRY("VSE is %d\n", mode->vsync_end);
+ PSB_DEBUG_ENTRY("vtotal is %d\n", mode->vtotal);
+ PSB_DEBUG_ENTRY("clock is %d\n", mode->clock);
drm_mode_set_name(mode);
drm_mode_set_crtcinfo(mode, 0);
mode->vtotal = mode->vdisplay + \
((ti->vblank_hi << 8) | ti->vblank_lo);
mode->clock = ti->pixel_clock * 10;
-
- printk(KERN_ALERT"hdisplay is %d\n", mode->hdisplay);
- printk(KERN_ALERT"vdisplay is %d\n", mode->vdisplay);
- printk(KERN_ALERT"HSS is %d\n", mode->hsync_start);
- printk(KERN_ALERT"HSE is %d\n", mode->hsync_end);
- printk(KERN_ALERT"htotal is %d\n", mode->htotal);
- printk(KERN_ALERT"VSS is %d\n", mode->vsync_start);
- printk(KERN_ALERT"VSE is %d\n", mode->vsync_end);
- printk(KERN_ALERT"vtotal is %d\n", mode->vtotal);
- printk(KERN_ALERT"clock is %d\n", mode->clock);
-
} else {
mode->htotal = 920;
mode->hdisplay = 720;
mode->vsync_start = 1296;
mode->vsync_end = 1298;
- mode->vrefresh = 40;
+ mode->vrefresh = 60;
mode->clock = mode->vrefresh * mode->vtotal *
mode->htotal / 1000;
}
+ PSB_DEBUG_ENTRY("hdisplay is %d\n", mode->hdisplay);
+ PSB_DEBUG_ENTRY("vdisplay is %d\n", mode->vdisplay);
+ PSB_DEBUG_ENTRY("HSS is %d\n", mode->hsync_start);
+ PSB_DEBUG_ENTRY("HSE is %d\n", mode->hsync_end);
+ PSB_DEBUG_ENTRY("htotal is %d\n", mode->htotal);
+ PSB_DEBUG_ENTRY("VSS is %d\n", mode->vsync_start);
+ PSB_DEBUG_ENTRY("VSE is %d\n", mode->vsync_end);
+ PSB_DEBUG_ENTRY("vtotal is %d\n", mode->vtotal);
+ PSB_DEBUG_ENTRY("clock is %d\n", mode->clock);
+
drm_mode_set_name(mode);
drm_mode_set_crtcinfo(mode, 0);
{
u32 reg_val;
struct drm_device * dev = dbi_output->dev;
- struct drm_psb_private * dev_priv = dev->dev_private;
+ struct drm_psb_private *dev_priv = dev->dev_private;
struct drm_crtc * crtc = dbi_output->base.base.crtc;
struct psb_intel_crtc * psb_crtc = (crtc) ? to_psb_intel_crtc(crtc) : NULL;
+ struct mdfld_dsi_pkg_sender *sender = NULL;
+ struct panel_funcs *p_funcs = NULL;
u32 dpll_reg = MRST_DPLL_A;
u32 pipeconf_reg = PIPEACONF;
u32 dspcntr_reg = DSPACNTR;
+ int retry;
- PSB_DEBUG_ENTRY("\n");
+ printk(KERN_INFO "\ncommand mode enter dsr\n");
if(!dbi_output)
return;
-
+
+ spin_lock(&dev_priv->dsr_lock);
+
gdbi_output = dbi_output;
- if((dbi_output->mode_flags & MODE_SETTING_ON_GOING) ||
+ if ((dbi_output->mode_flags & MODE_SETTING_IN_DSR) ||
+ (dbi_output->mode_flags & MODE_SETTING_ON_GOING) ||
(psb_crtc && psb_crtc->mode_flags & MODE_SETTING_ON_GOING))
- return;
-
+ goto fun_exit;
+
+ sender = mdfld_dsi_encoder_get_pkg_sender(&dbi_output->base);
+
+ retry = 100;
+ while (retry && !(REG_READ(sender->mipi_gen_fifo_stat_reg) & BIT27)) {
+ udelay(500);
+ retry--;
+ }
+
+ /*if DBI FIFO timeout, do not enter dsr*/
+ if (!retry) {
+ printk(KERN_INFO "can not enter dsr currently\n");
+ goto fun_exit ;
+ }
+
if(pipe == 2) {
dpll_reg = MRST_DPLL_A;
pipeconf_reg = PIPECCONF;
if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, OSPM_UHB_FORCE_POWER_ON)) {
DRM_ERROR("hw begin failed\n");
- return;
+ goto fun_exit;
}
-
+
+ p_funcs = dbi_output->p_funcs;
+ if (p_funcs && (p_funcs->esd_detection))
+ mdfld_error_detect_correct_timer_end(dev);
+
mdfld_disable_te(dev, pipe);
/*disable plane*/
enter_dsr = 1;
//pm_schedule_suspend(&dev->pdev->dev, gfxrtdelay);
}
+fun_exit:
+ spin_unlock(&dev_priv->dsr_lock);
}
#ifndef CONFIG_MDFLD_DSI_DPU
struct drm_psb_private *dev_priv = dev->dev_private;
struct drm_crtc * crtc = dbi_output->base.base.crtc;
struct psb_intel_crtc * psb_crtc = (crtc) ? to_psb_intel_crtc(crtc) : NULL;
+ struct panel_funcs *p_funcs = NULL;
u32 reg_val;
u32 dpll_reg = MRST_DPLL_A;
u32 pipeconf_reg = PIPEACONF;
u32 dspsurf_reg = DSPASURF;
u32 reg_offset = 0;
- PSB_DEBUG_ENTRY("\n");
+ printk(KERN_INFO "\ncommand mode exit dsr\n");
+
+ spin_lock(&dev_priv->dsr_lock);
/*if mode setting on-going, back off*/
- if((dbi_output->mode_flags & MODE_SETTING_ON_GOING) ||
+ if (!(dbi_output->mode_flags & MODE_SETTING_IN_DSR) ||
+ (dbi_output->mode_flags & MODE_SETTING_ON_GOING) ||
(psb_crtc && psb_crtc->mode_flags & MODE_SETTING_ON_GOING))
- return;
-
+ goto fun_exit;
+
if(pipe == 2) {
dpll_reg = MRST_DPLL_A;
pipeconf_reg = PIPECCONF;
if (check_hw_on_only) {
if (!ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND)) {
DRM_ERROR("hw begin failed\n");
- return;
+ goto fun_exit;
}
} else if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, OSPM_UHB_FORCE_POWER_ON)) {
DRM_ERROR("hw begin failed\n");
- return;
+ goto fun_exit;
}
/*enable DPLL*/
mdfld_enable_te(dev, pipe);
+ dev_priv->dsr_idle_count = 0;
+
+ p_funcs = dbi_output->p_funcs;
+
/*clean IN_DSR flag*/
dbi_output->mode_flags &= ~MODE_SETTING_IN_DSR;
+
+ if (p_funcs && (p_funcs->esd_detection))
+ mdfld_error_detect_correct_timer_start(dev);
+fun_exit:
+ spin_unlock(&dev_priv->dsr_lock);
}
int mdfld_dsi_dbi_async_check_fifo_empty(struct drm_device *dev)
{
struct mdfld_dsi_dbi_output **dbi_outputs = NULL;
struct mdfld_dsi_dbi_output *dbi_output = NULL;
struct mdfld_dsi_pkg_sender *sender = NULL;
- u32 reg = 0;
int err = 0;
dbi_outputs = dsr_info->dbi_outputs;
dbi_output = 0 ? dbi_outputs[1] : dbi_outputs[0];
if (!dbi_output)
- return;
+ return 0;
sender = mdfld_dsi_encoder_get_pkg_sender(&dbi_output->base);
/*
* use hw te to update fb
*/
-void mdfld_dsi_dbi_async_flip_fb_update(struct drm_device *dev, int pipe)
+int mdfld_dsi_dbi_async_flip_fb_update(struct drm_device *dev, int pipe)
{
struct drm_psb_private *dev_priv = dev->dev_private;
struct mdfld_dbi_dsr_info *dsr_info = dev_priv->dbi_dsr_info;
struct mdfld_dsi_dbi_output **dbi_outputs = NULL;
struct mdfld_dsi_dbi_output *dbi_output = NULL;
struct mdfld_dsi_pkg_sender *sender = NULL;
- u32 reg = 0;
+ int ret = IMG_TRUE;
+ int err = 0;
- u32 dpll_reg = MRST_DPLL_A;
- u32 dspcntr_reg = DSPACNTR;
- u32 pipeconf_reg = PIPEACONF;
u32 dsplinoff_reg = DSPALINOFF;
u32 dspsurf_reg = DSPASURF;
dbi_outputs = dsr_info->dbi_outputs;
dbi_output = pipe ? dbi_outputs[1] : dbi_outputs[0];
if (!dbi_output)
- return;
+ return IMG_FALSE;
+
+ if (!(spin_trylock(&dev_priv->dsr_lock))) {
+ printk(KERN_INFO "dsr lock busy\n");
+ return IMG_TRUE;
+ }
+
+ if (dbi_output->mode_flags & MODE_SETTING_IN_DSR) {
+ ret = IMG_FALSE;
+ goto fun_exit;
+ }
sender = mdfld_dsi_encoder_get_pkg_sender(&dbi_output->base);
REG_WRITE(dspsurf_reg, REG_READ(dspsurf_reg));
REG_READ(dspsurf_reg);
- mdfld_dsi_send_dcs(sender,
+ err = mdfld_dsi_send_dcs(sender,
write_mem_start,
NULL,
0,
CMD_DATA_SRC_PIPE,
MDFLD_DSI_SEND_PACKAGE);
- mdfld_dsi_cmds_kick_out(sender);
- return;
+ if (err) {
+ DRM_ERROR(
+ "Error returned from mdfld_dsi_send_dcs: %d\n", ret);
+ ret = IMG_FALSE;
+ goto fun_exit;
+ }
+
+fun_exit:
+ spin_unlock(&dev_priv->dsr_lock);
+ return ret;
}
/**
struct mdfld_dbi_dsr_info * dsr_info = dev_priv->dbi_dsr_info;
struct mdfld_dsi_dbi_output ** dbi_output;
int i;
-
- PSB_DEBUG_ENTRY("\n");
dbi_output = dsr_info->dbi_outputs;
}
dev_priv->dsr_fb_update |= update_src;
-
+ dev_priv->dsr_idle_count = 0;
/*start timer if A0 board*/
if ((get_panel_type(dev, 0) == GI_SONY_CMD)||(get_panel_type(dev, 0) == H8C7_CMD))
; /* mdfld_dbi_dsr_timer_start(dsr_info); */
}
/*try to enter DSR*/
- if (dbi_outputs[0]->dsr_idle_count > 1) {
+ if (dbi_outputs[0]->dsr_idle_count > 50) {
/* && dbi_outputs[1]->dsr_idle_count > 1) { */
for(i=0; i<dsr_info->dbi_output_num; i++) {
if (!mdfld_dbi_is_in_dsr(dev) && dbi_outputs[i] &&
if(pkg->transmission_type == MDFLD_DSI_HS_TRANSMISSION) {
/*wait for hs fifo empty*/
+ wait_for_dbi_fifo_empty(sender);
wait_for_hs_fifos_empty(sender);
/*send pkg*/
REG_WRITE(hs_gen_ctrl_reg, gen_ctrl_val);
} else if(pkg->transmission_type == MDFLD_DSI_LP_TRANSMISSION) {
+ wait_for_dbi_fifo_empty(sender);
wait_for_lp_fifos_empty(sender);
/*send pkg*/
if(pkg->transmission_type == MDFLD_DSI_HS_TRANSMISSION) {
/*wait for hs ctrl and data fifos to be empty*/
+ wait_for_dbi_fifo_empty(sender);
wait_for_hs_fifos_empty(sender);
dword_count = long_pkg->len / 4;
REG_WRITE(hs_gen_ctrl_reg, gen_ctrl_val);
} else if(pkg->transmission_type == MDFLD_DSI_LP_TRANSMISSION) {
+ wait_for_dbi_fifo_empty(sender);
wait_for_lp_fifos_empty(sender);
dword_count = long_pkg->len / 4;
spin_unlock_irqrestore(&sender->lock, flags);
}
-static inline void process_pkg_list(struct mdfld_dsi_pkg_sender * sender)
+static inline int process_pkg_list(struct mdfld_dsi_pkg_sender *sender)
{
struct mdfld_dsi_pkg * pkg;
unsigned long flags;
+ int ret = 0;
spin_lock_irqsave(&sender->lock, flags);
while(!list_empty(&sender->pkg_list)) {
pkg = list_first_entry(&sender->pkg_list, struct mdfld_dsi_pkg, entry);
- send_pkg(sender, pkg);
+ ret = send_pkg(sender, pkg);
+
+ if (ret) {
+ DRM_INFO("Returning eror from process_pkg_lisgt");
+ goto errorunlock;
+ }
list_del_init(&pkg->entry);
}
spin_unlock_irqrestore(&sender->lock, flags);
+ return 0;
+
+errorunlock:
+ spin_unlock_irqrestore(&sender->lock, flags);
+ return ret;
}
static int mdfld_dsi_send_mcs_long(struct mdfld_dsi_pkg_sender * sender,
REG_WRITE((MIPIA_DEVICE_READY_REG + reg_offset), 0x00000001);
}
-void mdfld_dsi_cmds_kick_out(struct mdfld_dsi_pkg_sender * sender)
+int mdfld_dsi_cmds_kick_out(struct mdfld_dsi_pkg_sender *sender)
{
- process_pkg_list(sender);
+ return process_pkg_list(sender);
}
int mdfld_dsi_check_fifo_empty(struct mdfld_dsi_pkg_sender *sender)
{
- struct mdfld_dsi_pkg dsi_pkg = { 0 };
- u32 cb_phy = sender->dbi_cb_phy;
struct drm_device *dev = sender->dev;
- u32 index = 0;
- u8 *cb = (u8 *)sender->dbi_cb_addr;
- unsigned long flags;
- int retry;
- u8 *dst = NULL;
- u8 *pSendparam = NULL;
- int err = 0;
if (!sender) {
DRM_ERROR("Invalid parameter\n");
u8 dcs, u8 * param, u32 param_num, u8 data_src,
int delay)
{
- struct mdfld_dsi_pkg dsi_pkg = { 0 };
u32 cb_phy = sender->dbi_cb_phy;
struct drm_device *dev = sender->dev;
u32 index = 0;
u8 *cb = (u8 *)sender->dbi_cb_addr;
- unsigned long flags;
int retry;
u8 *dst = NULL;
u8 *pSendparam = NULL;
/*if dcs is write_mem_start, send it directly using DSI adapter interface*/
if (dcs == write_mem_start) {
if (!spin_trylock(&sender->lock))
- return -EAGAIN;
+ return 0;
/**
* query whether DBI FIFO is empty,
/*if DBI FIFO timeout, drop this frame*/
if (!retry) {
spin_unlock(&sender->lock);
+ printk(KERN_INFO "write mem start wait fifo full\n");
return 0;
}
u32 spk_pkg);
extern int mdfld_dsi_send_dpi_spk_pkg_lp(struct mdfld_dsi_pkg_sender *sender,
u32 spk_pkg);
-extern void mdfld_dsi_cmds_kick_out(struct mdfld_dsi_pkg_sender * sender);
+extern int mdfld_dsi_cmds_kick_out(struct mdfld_dsi_pkg_sender *sender);
/*read interfaces*/
extern int mdfld_dsi_read_gen_hs(struct mdfld_dsi_pkg_sender *sender,
mutex_init(&dev_priv->gamma_csc_lock);
spin_lock_init(&dev_priv->reloc_lock);
+ spin_lock_init(&dev_priv->dsr_lock);
DRM_INIT_WAITQUEUE(&dev_priv->rel_mapped_queue);
bool b_is_in_idle;
void (*exit_idle)(struct drm_device *dev, u32 update_src, void *p_surfaceAddr, bool check_hw_on_only);
bool b_vblank_enable;
- void (*async_flip_update_fb)(struct drm_device *dev, int pipe);
+ int (*async_flip_update_fb)(struct drm_device *dev, int pipe);
int (*async_check_fifo_empty)(struct drm_device *dev);
/*
*/
}
+void mdfld_async_flip_te_handler(struct drm_device *dev, uint32_t pipe)
+{
+ struct drm_psb_private *dev_priv =
+ (struct drm_psb_private *) dev->dev_private;
+ struct mdfld_dbi_dsr_info *dsr_info = dev_priv->dbi_dsr_info;
+ struct mdfld_dsi_dbi_output **dbi_outputs;
+ struct mdfld_dsi_dbi_output *dbi_output;
+ static unsigned long cnt;
+
+ int ret = 0;
+
+ if ((dev_priv->psb_vsync_handler != NULL)) {
+ ret = (*dev_priv->psb_vsync_handler)(dev, pipe);
+ if (ret) {
+ if (dev_priv->b_dsr_enable) {
+ if (dev_priv->dsr_idle_count > 50) {
+ dev_priv->te_pipe = pipe;
+ schedule_work(&dev_priv->te_work);
+ } else
+ dev_priv->dsr_idle_count++;
+ }
+ }
+ }
+
+}
void mdfld_te_handler_work(struct work_struct *work)
{
struct drm_psb_private *dev_priv =
container_of(work, struct drm_psb_private, te_work);
int pipe = dev_priv->te_pipe;
struct drm_device *dev = dev_priv->dev;
+ struct mdfld_dbi_dsr_info *dsr_info = dev_priv->dbi_dsr_info;
+ struct mdfld_dsi_dbi_output **dbi_outputs;
+ struct mdfld_dsi_dbi_output *dbi_output;
+ dbi_outputs = dsr_info->dbi_outputs;
+ dbi_output = pipe ? dbi_outputs[1] : dbi_outputs[0];
+
+ if (!dbi_output)
+ return ;
+
+ if (dev_priv->b_async_flip_enable) {
+ mdfld_dsi_dbi_enter_dsr(dbi_output, pipe);
+ } else {
#ifdef CONFIG_MDFD_DSI_DPU
- mdfld_dpu_update_panel(dev);
+ mdfld_dpu_update_panel(dev);
#else
- mdfld_dbi_update_panel(dev, pipe);
+ mdfld_dbi_update_panel(dev, pipe);
#endif
- drm_handle_vblank(dev, pipe);
+ drm_handle_vblank(dev, pipe);
- if (dev_priv->psb_vsync_handler != NULL)
- (*dev_priv->psb_vsync_handler)(dev, pipe);
+ if (dev_priv->psb_vsync_handler != NULL)
+ (*dev_priv->psb_vsync_handler)(dev, pipe);
+ }
}
/**
* Display controller interrupt handler for pipe event.
if (pipe_stat_val & PIPE_TE_STATUS) {
if (dev_priv->b_async_flip_enable) {
- if (dev_priv->psb_vsync_handler != NULL)
- (*dev_priv->psb_vsync_handler)(dev, pipe);
+ mdfld_async_flip_te_handler(dev, pipe);
} else {
dev_priv->te_pipe = pipe;
schedule_work(&dev_priv->te_work);
void MRSTLFBEnableVSyncInterrupt(MRSTLFB_DEVINFO *psDevInfo);
void MRSTLFBDisableVSyncInterrupt(MRSTLFB_DEVINFO *psDevInfo);
-void MRSTLFBFlipToSurface(MRSTLFB_DEVINFO *psDevInfo, unsigned long uiAddr);
+IMG_BOOL MRSTLFBFlipToSurface(MRSTLFB_DEVINFO *psDevInfo,
+ unsigned long uiAddr);
void MRSTLFBSavePlaneConfig(MRSTLFB_DEVINFO *psDevInfo);
void MRSTLFBRestorePlaneConfig(MRSTLFB_DEVINFO *psDevInfo);
gpvAnchor = (void*)psDevInfo;
}
-static void MRSTLFBFlip(MRSTLFB_DEVINFO *psDevInfo, MRSTLFB_BUFFER *psBuffer)
+static IMG_BOOL MRSTLFBFlip(MRSTLFB_DEVINFO *psDevInfo,
+ MRSTLFB_BUFFER *psBuffer)
{
unsigned long ulAddr = (unsigned long)psBuffer->sDevVAddr.uiAddr;
struct fb_info *psLINFBInfo;
if (!psDevInfo->bSuspended && !psDevInfo->bLeaveVT)
{
MRSTLFBRestorePlaneConfig(psDevInfo);
- MRSTLFBFlipToSurface(psDevInfo, ulAddr);
+ if (MRSTLFBFlipToSurface(psDevInfo, ulAddr) == IMG_FALSE) {
+ DRM_INFO("returning false from MRSTLFBFlip");
+ return IMG_FALSE;
+ }
}
psDevInfo->ulLastFlipAddr = ulAddr;
memset(psDevInfo->sSystemBuffer.sCPUVAddr, 0, psDevInfo->sSystemBuffer.ui32BufferSize);
FirstCleanFlag = 0;
}
+ return IMG_TRUE;
}
static void MRSTLFBFlipOverlay(MRSTLFB_DEVINFO *psDevInfo,
}
}
-static void MRSTLFBFlipContexts(MRSTLFB_DEVINFO *psDevInfo,
+static IMG_BOOL MRSTLFBFlipContexts(MRSTLFB_DEVINFO *psDevInfo,
struct mdfld_plane_contexts *psContexts)
{
struct intel_sprite_context *psSpriteContext;
int i;
if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, MRST_FALSE))
- return;
+ return IMG_FALSE;
dev = psDevInfo->psDrmDevice;
dev_priv =
(struct drm_psb_private *)psDevInfo->psDrmDevice->dev_private;
}
}
- if (dev_priv->b_async_flip_enable && dev_priv->async_flip_update_fb)
- dev_priv->async_flip_update_fb(dev, 0);
+ if (dev_priv->b_async_flip_enable && dev_priv->async_flip_update_fb) {
+ if (dev_priv->async_flip_update_fb(dev, 0) == IMG_FALSE)
+ return IMG_FALSE;
+ }
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
+ return IMG_TRUE;
}
static void MRSTLFBRestoreLastFlip(MRSTLFB_DEVINFO *psDevInfo)
}
-static void FlushInternalVSyncQueue(MRSTLFB_SWAPCHAIN *psSwapChain, MRST_BOOL bFlip)
+static IMG_BOOL FlushInternalVSyncQueue(MRSTLFB_SWAPCHAIN *psSwapChain,
+ MRST_BOOL bFlip)
{
MRSTLFB_VSYNC_FLIP_ITEM *psFlipItem;
unsigned long ulMaxIndex;
unsigned long i;
-
+ IMG_BOOL ret = IMG_TRUE;
psFlipItem = &psSwapChain->psVSyncFlips[psSwapChain->ulRemoveIndex];
ulMaxIndex = psSwapChain->ulSwapChainLength - 1;
if (psFlipItem->bFlipped == MRST_FALSE && bFlip)
{
if (psFlipItem->psBuffer)
- MRSTLFBFlip(psSwapChain->psDevInfo,
+ ret = MRSTLFBFlip(
+ psSwapChain->psDevInfo,
psFlipItem->psBuffer);
else
- MRSTLFBFlipContexts(psSwapChain->psDevInfo,
+ ret = MRSTLFBFlipContexts(
+ psSwapChain->psDevInfo,
&psFlipItem->sPlaneContexts);
+ if (ret == IMG_FALSE) {
+ DRM_INFO(
+ "%s failed call to DRMLFBFlipBuffer2 - value %d",
+ __func__, ret);
+ return ret;
+ }
+
}
if(psFlipItem->bCmdCompleted == MRST_FALSE)
psSwapChain->ulInsertIndex = 0;
psSwapChain->ulRemoveIndex = 0;
+
+ return IMG_TRUE;
}
static int DRMLFBFifoEmpty(MRSTLFB_DEVINFO *psDevInfo)
return dev_priv->async_check_fifo_empty(dev);
}
-static void DRMLFBFlipBuffer(MRSTLFB_DEVINFO *psDevInfo, MRSTLFB_SWAPCHAIN *psSwapChain, MRSTLFB_BUFFER *psBuffer)
+static IMG_BOOL DRMLFBFlipBuffer(MRSTLFB_DEVINFO *psDevInfo,
+ MRSTLFB_SWAPCHAIN *psSwapChain,
+ MRSTLFB_BUFFER *psBuffer)
{
+ IMG_BOOL ret = IMG_TRUE;
if(psSwapChain != NULL)
{
if(psDevInfo->psCurrentSwapChain != NULL)
{
-
if(psDevInfo->psCurrentSwapChain != psSwapChain)
- FlushInternalVSyncQueue(psDevInfo->psCurrentSwapChain, MRST_FALSE);
+ ret = FlushInternalVSyncQueue(
+ psDevInfo->psCurrentSwapChain, MRST_FALSE);
+ if (ret == IMG_FALSE) {
+ DRM_INFO(
+ "returning false in %s from "
+ "FlushInternalVSyncQueue in DRMLFBFlipBuffer");
+ return ret;
+ }
}
psDevInfo->psCurrentSwapChain = psSwapChain;
psDevInfo->psCurrentBuffer = psBuffer;
}
- MRSTLFBFlip(psDevInfo, psBuffer);
+ ret = MRSTLFBFlip(psDevInfo, psBuffer);
+ if (ret != IMG_TRUE)
+ DRM_INFO(
+ "returning %d from MRSTLFBFlip in DRMLFBFlipBuffer", ret);
+
+ return ret;
+
}
-static void DRMLFBFlipBuffer2(MRSTLFB_DEVINFO *psDevInfo,
+static IMG_BOOL DRMLFBFlipBuffer2(MRSTLFB_DEVINFO *psDevInfo,
MRSTLFB_SWAPCHAIN *psSwapChain,
struct mdfld_plane_contexts *psContexts)
{
+ IMG_BOOL ret = IMG_TRUE;
+
if (!psSwapChain)
goto flip_out;
goto flip_out;
}
- if (psDevInfo->psCurrentSwapChain != psSwapChain)
- FlushInternalVSyncQueue(psDevInfo->psCurrentSwapChain,
+ if (psDevInfo->psCurrentSwapChain != psSwapChain) {
+ ret = FlushInternalVSyncQueue(psDevInfo->psCurrentSwapChain,
MRST_FALSE);
+ if (ret == IMG_FALSE) {
+ DRM_INFO("leaving with error from DRMLFBFlipBuffer2");
+ return ret;
+ }
+ }
+
flip_out:
- MRSTLFBFlipContexts(psDevInfo, psContexts);
+ ret = MRSTLFBFlipContexts(psDevInfo, psContexts);
+ if (ret != IMG_TRUE)
+ DRM_INFO(
+ "Returning %d from MRSTLFBFlipContexts in "
+ "DRMLFBFlipBuffer2", ret);
+ return ret;
}
static void SetFlushStateNoLock(MRSTLFB_DEVINFO* psDevInfo,
psDevInfo->bFlushCommands) {
#endif
/* update sprite plane context*/
- DRMLFBFlipBuffer2(psDevInfo, psSwapChain, psPlaneContexts);
+ if (DRMLFBFlipBuffer2(
+ psDevInfo,
+ psSwapChain, psPlaneContexts) == IMG_FALSE) {
+ DRM_ERROR("%s DRMLFBFlipBuffer2 failed", __func__);
+ psSwapChain->psPVRJTable->pfnPVRSRVCmdComplete(
+ hCmdCookie,
+ IMG_TRUE);
+ goto ExitErrorUnlock;
+ }
psSwapChain->psPVRJTable->pfnPVRSRVCmdComplete(hCmdCookie,
IMG_TRUE);
#if defined(MRST_USING_INTERRUPTS)
if (psSwapChain->ulInsertIndex == psSwapChain->ulRemoveIndex) {
/*update sprite plane context*/
- DRMLFBFlipBuffer2(psDevInfo, psSwapChain,
- psPlaneContexts);
+ if (DRMLFBFlipBuffer2(
+ psDevInfo,
+ psSwapChain, psPlaneContexts) == IMG_FALSE) {
+ psFlipItem->bFlipped = MRST_FALSE;
+ psSwapChain->psPVRJTable->pfnPVRSRVCmdComplete(
+ hCmdCookie,
+ IMG_TRUE);
+ goto ExitErrorUnlock;
+ }
psFlipItem->bFlipped = MRST_TRUE;
} else {
psFlipItem->bFlipped = MRST_FALSE;
goto ExitTrueUnlock;
}
-
+ExitErrorUnlock:
spin_unlock_irqrestore(&psDevInfo->sSwapChainLock, ulLockFlags);
return IMG_FALSE;
ExitTrueUnlock:
unsigned long irqflags;
struct drm_device *dev;
struct drm_psb_private *dev_priv;
+ int retry = 1000;
if(!hCmdCookie || !pvData)
return IMG_FALSE;
psSwapChain = (MRSTLFB_SWAPCHAIN*) psFlipCmd->hExtSwapChain;
if (dev_priv->b_async_flip_enable && dev_priv->async_flip_update_fb) {
- while (!DRMLFBFifoEmpty(psDevInfo))
+ while (!DRMLFBFifoEmpty(psDevInfo) && retry) {
usleep_range(500, 1000);
+ retry--;
+ }
+ if (!retry) {
+ DRM_ERROR("FIFO never emptied\n");
+ return IMG_FALSE;
+ }
}
if (!psBuffer)
if(!drm_psb_3D_vblank || psFlipCmd->ui32SwapInterval == 0 || psDevInfo->bFlushCommands)
{
#endif
- DRMLFBFlipBuffer(psDevInfo, psSwapChain, psBuffer);
-
-
+ if (DRMLFBFlipBuffer(
+ psDevInfo, psSwapChain, psBuffer) == IMG_FALSE) {
+ DRM_ERROR("%s failed call to DRMLFBFlipBuffer",
+ __func__);
+ psSwapChain->psPVRJTable->pfnPVRSRVCmdComplete(
+ hCmdCookie, IMG_TRUE);
+ goto ExitErrorUnlock;
+ }
psSwapChain->psPVRJTable->pfnPVRSRVCmdComplete(hCmdCookie, IMG_TRUE);
if(psSwapChain->ulInsertIndex == psSwapChain->ulRemoveIndex)
{
-
- DRMLFBFlipBuffer(psDevInfo, psSwapChain, psBuffer);
+ if (DRMLFBFlipBuffer(psDevInfo,
+ psSwapChain, psBuffer) == IMG_FALSE) {
+ DRM_ERROR("%s DRMFLBFlipBuffer failed",
+ __func__);
+ psFlipItem->bFlipped = MRST_FALSE;
+ psSwapChain->psPVRJTable->pfnPVRSRVCmdComplete(
+ hCmdCookie, IMG_TRUE);
+ goto ExitErrorUnlock;
+ }
psFlipItem->bFlipped = MRST_TRUE;
}
goto ExitTrueUnlock;
}
-
+ExitErrorUnlock:
spin_unlock_irqrestore(&psDevInfo->sSwapChainLock, ulLockFlags);
return IMG_FALSE;
#endif
-void MRSTLFBFlipToSurface(MRSTLFB_DEVINFO *psDevInfo, unsigned long uiAddr)
+IMG_BOOL MRSTLFBFlipToSurface(MRSTLFB_DEVINFO *psDevInfo,
+ unsigned long uiAddr)
{
int dspbase = (psDevInfo->ui32MainPipe == 0 ? DSPABASE : DSPBBASE);
int dspsurf = (psDevInfo->ui32MainPipe == 0 ? DSPASURF : DSPBSURF);
dspsurf = DSPASURF;
MRSTLFBVSyncWriteReg(psDevInfo, dspsurf, uiAddr);
if (dev_priv->b_async_flip_enable &&
- dev_priv->async_flip_update_fb)
- dev_priv->async_flip_update_fb(dev, 0);
+ dev_priv->async_flip_update_fb)
+ if (dev_priv->async_flip_update_fb(
+ dev, 0) == IMG_FALSE)
+ return IMG_FALSE;
}
#if defined(CONFIG_MDFD_DUAL_MIPI)
if (psCurrentSwapChain->ui32SwapChainPropertyFlag
MRSTLFBVSyncWriteReg(psDevInfo, dspsurf, uiAddr);
if (dev_priv->b_async_flip_enable &&
dev_priv->async_flip_update_fb)
- dev_priv->async_flip_update_fb(dev, 2);
+ if (dev_priv->async_flip_update_fb(
+ dev, 2) == IMG_FALSE)
+ return IMG_FALSE;
}
#endif
#ifdef CONFIG_MDFD_HDMI
}
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
}
+ return IMG_TRUE;
}
void MRSTLFBSavePlaneConfig(MRSTLFB_DEVINFO *psDevInfo)
projects / kernel / kernel-mfld-blackbay.git / commitdiff