drm/amdgpu: there is no vbios fb on devices with no display hw (v2)
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 11 Nov 2022 17:50:38 +0000 (12:50 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Nov 2022 18:35:16 +0000 (13:35 -0500)
If we enable virtual display functionality on parts with
no display hardware we can end up trying to check for and
reserve the vbios FB area on devices where it doesn't exist.
Check if display hardware is actually present on the hardware
before trying to reserve the memory.

v2: move the check into common code

Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

index 5a4aaf4d9ed1ac594950882c04360f55c692b60e..1f3a4d596d0d1a6d0ec43d6665dd64c37beb28e2 100644 (file)
@@ -1298,6 +1298,7 @@ void amdgpu_device_pcie_port_wreg(struct amdgpu_device *adev,
                                u32 reg, u32 v);
 struct dma_fence *amdgpu_device_switch_gang(struct amdgpu_device *adev,
                                            struct dma_fence *gang);
+bool amdgpu_device_has_display_hardware(struct amdgpu_device *adev);
 
 /* atpx handler */
 #if defined(CONFIG_VGA_SWITCHEROO)
index ee69cc3a5efd99cca6d580b72a792bf41ef2299e..31357101c70420f5a51e086240dc30299222b4fe 100644 (file)
@@ -6057,3 +6057,44 @@ struct dma_fence *amdgpu_device_switch_gang(struct amdgpu_device *adev,
        dma_fence_put(old);
        return NULL;
 }
+
+bool amdgpu_device_has_display_hardware(struct amdgpu_device *adev)
+{
+       switch (adev->asic_type) {
+#ifdef CONFIG_DRM_AMDGPU_SI
+       case CHIP_HAINAN:
+#endif
+       case CHIP_TOPAZ:
+               /* chips with no display hardware */
+               return false;
+#ifdef CONFIG_DRM_AMDGPU_SI
+       case CHIP_TAHITI:
+       case CHIP_PITCAIRN:
+       case CHIP_VERDE:
+       case CHIP_OLAND:
+#endif
+#ifdef CONFIG_DRM_AMDGPU_CIK
+       case CHIP_BONAIRE:
+       case CHIP_HAWAII:
+       case CHIP_KAVERI:
+       case CHIP_KABINI:
+       case CHIP_MULLINS:
+#endif
+       case CHIP_TONGA:
+       case CHIP_FIJI:
+       case CHIP_POLARIS10:
+       case CHIP_POLARIS11:
+       case CHIP_POLARIS12:
+       case CHIP_VEGAM:
+       case CHIP_CARRIZO:
+       case CHIP_STONEY:
+               /* chips with display hardware */
+               return true;
+       default:
+               /* IP discovery */
+               if (!adev->ip_versions[DCE_HWIP][0] ||
+                   (adev->harvest_ip_mask & AMD_HARVEST_IP_DMU_MASK))
+                       return false;
+               return true;
+       }
+}
index 9c0d9baab4e2ad04ee66e2e71116cab07973a058..4365ede42855e0016d1b28336f21e193d6c614e6 100644 (file)
@@ -657,7 +657,7 @@ void amdgpu_gmc_get_vbios_allocations(struct amdgpu_device *adev)
        }
 
        if (amdgpu_sriov_vf(adev) ||
-           !amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_DCE)) {
+           !amdgpu_device_has_display_hardware(adev)) {
                size = 0;
        } else {
                size = amdgpu_gmc_get_vbios_fb_size(adev);