Mitigation for PR target/88469 on arm-based systems bootstrapping with gcc-6/7/8

This patch, for gcc 8/9 is a mitigation patch for PR target/88469
where gcc-6/7/8 miscompile a structure whose alignment is dominated by
a 64-bit bitfield member.  Since the PCS rules for such a type must
ignore any overalignment of the base type we cannot address this by
simply adding a larger alignment to the class.  We can, however, force
the alignment of the bit-field itself and GCC will handle that as
desired.

	PR target/88469
	* profile-count.h (profile_count): On ARM systems using GCC 6/7/8
	force the alignment of m_val.

From-SVN: r268240

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 960e8da..ca6dfe6 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-01-24  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/88469
+       * profile-count.h (profile_count): On ARM systems using GCC 6/7/8
+       force the alignment of m_val.
+
 2019-01-24  Richard Biener  <rguenther@suse.de>
 
        PR lto/87187

diff --git a/gcc/profile-count.h b/gcc/profile-count.h
index 06564dd..d6de61f 100644 (file)
--- a/gcc/profile-count.h
+++ b/gcc/profile-count.h
@@ -649,7 +649,17 @@ public:
 private:
   static const uint64_t uninitialized_count = ((uint64_t) 1 << n_bits) - 1;
 
-  uint64_t m_val : n_bits;
+#if defined (__arm__) && (__GNUC__ >= 6 && __GNUC__ <= 8)
+  /* Work-around for PR88469.  A bug in the gcc-6/7/8 PCS layout code
+     incorrectly detects the alignment of a structure where the only
+     64-bit aligned object is a bit-field.  We force the alignment of
+     the entire field to mitigate this.  */
+#define UINT64_BIT_FIELD_ALIGN __attribute__ ((aligned(8)))
+#else
+#define UINT64_BIT_FIELD_ALIGN
+#endif
+  uint64_t UINT64_BIT_FIELD_ALIGN m_val : n_bits;
+#undef UINT64_BIT_FIELD_ALIGN
   enum profile_quality m_quality : 3;
 
   /* Return true if both values can meaningfully appear in single function