The CCU header is only used by the DM drivers, not any platform code.
Its current location adds an artificial dependency on CONFIG_ARM and
ARCH_SUNXI, which will be problematic when adding the CCU driver for
a RISC-V sunxi platform.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Amarula Solutions.
- * Author: Jagan Teki <jagan@amarulasolutions.com>
- */
-
-#ifndef _ASM_ARCH_CCU_H
-#define _ASM_ARCH_CCU_H
-
-#ifndef __ASSEMBLY__
-#include <linux/bitops.h>
-#endif
-
-/**
- * enum ccu_flags - ccu clock/reset flags
- *
- * @CCU_CLK_F_IS_VALID: is given clock gate is valid?
- * @CCU_RST_F_IS_VALID: is given reset control is valid?
- */
-enum ccu_flags {
- CCU_CLK_F_IS_VALID = BIT(0),
- CCU_RST_F_IS_VALID = BIT(1),
-};
-
-/**
- * struct ccu_clk_gate - ccu clock gate
- * @off: gate offset
- * @bit: gate bit
- * @flags: ccu clock gate flags
- */
-struct ccu_clk_gate {
- u16 off;
- u32 bit;
- enum ccu_flags flags;
-};
-
-#define GATE(_off, _bit) { \
- .off = _off, \
- .bit = _bit, \
- .flags = CCU_CLK_F_IS_VALID, \
-}
-
-/**
- * struct ccu_reset - ccu reset
- * @off: reset offset
- * @bit: reset bit
- * @flags: ccu reset control flags
- */
-struct ccu_reset {
- u16 off;
- u32 bit;
- enum ccu_flags flags;
-};
-
-#define RESET(_off, _bit) { \
- .off = _off, \
- .bit = _bit, \
- .flags = CCU_RST_F_IS_VALID, \
-}
-
-/**
- * struct ccu_desc - clock control unit descriptor
- *
- * @gates: clock gates
- * @resets: reset unit
- */
-struct ccu_desc {
- const struct ccu_clk_gate *gates;
- const struct ccu_reset *resets;
-};
-
-/**
- * struct ccu_priv - sunxi clock control unit
- *
- * @base: base address
- * @desc: ccu descriptor
- */
-struct ccu_priv {
- void *base;
- const struct ccu_desc *desc;
-};
-
-/**
- * sunxi_clk_probe - common sunxi clock probe
- * @dev: clock device
- */
-int sunxi_clk_probe(struct udevice *dev);
-
-extern struct clk_ops sunxi_clk_ops;
-
-/**
- * sunxi_reset_bind() - reset binding
- *
- * @dev: reset device
- * @count: reset count
- * @return 0 success, or error value
- */
-int sunxi_reset_bind(struct udevice *dev, ulong count);
-
-#endif /* _ASM_ARCH_CCU_H */
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
-#include <asm/arch/ccu.h>
+#include <clk/sunxi.h>
#include <dt-bindings/clock/sun4i-a10-ccu.h>
#include <dt-bindings/reset/sun4i-a10-ccu.h>
#include <linux/bitops.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
-#include <asm/arch/ccu.h>
+#include <clk/sunxi.h>
#include <dt-bindings/clock/sun5i-ccu.h>
#include <dt-bindings/reset/sun5i-ccu.h>
#include <linux/bitops.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
-#include <asm/arch/ccu.h>
+#include <clk/sunxi.h>
#include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
#include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
#include <linux/bitops.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
-#include <asm/arch/ccu.h>
+#include <clk/sunxi.h>
#include <dt-bindings/clock/sun6i-a31-ccu.h>
#include <dt-bindings/reset/sun6i-a31-ccu.h>
#include <linux/bitops.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
-#include <asm/arch/ccu.h>
+#include <clk/sunxi.h>
#include <dt-bindings/clock/sun50i-a64-ccu.h>
#include <dt-bindings/reset/sun50i-a64-ccu.h>
#include <linux/bitops.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
-#include <asm/arch/ccu.h>
+#include <clk/sunxi.h>
#include <dt-bindings/clock/sun9i-a80-ccu.h>
#include <dt-bindings/reset/sun9i-a80-ccu.h>
#include <linux/bitops.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
-#include <asm/arch/ccu.h>
+#include <clk/sunxi.h>
#include <dt-bindings/clock/sun8i-a83t-ccu.h>
#include <dt-bindings/reset/sun8i-a83t-ccu.h>
#include <linux/bitops.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
-#include <asm/arch/ccu.h>
+#include <clk/sunxi.h>
#include <dt-bindings/clock/sun8i-h3-ccu.h>
#include <dt-bindings/reset/sun8i-h3-ccu.h>
#include <linux/bitops.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
-#include <asm/arch/ccu.h>
+#include <clk/sunxi.h>
#include <dt-bindings/clock/sun50i-h6-ccu.h>
#include <dt-bindings/reset/sun50i-h6-ccu.h>
#include <linux/bitops.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
-#include <asm/arch/ccu.h>
+#include <clk/sunxi.h>
#include <dt-bindings/clock/sun50i-h616-ccu.h>
#include <dt-bindings/reset/sun50i-h616-ccu.h>
#include <linux/bitops.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
-#include <asm/arch/ccu.h>
+#include <clk/sunxi.h>
#include <dt-bindings/clock/sun8i-r40-ccu.h>
#include <dt-bindings/reset/sun8i-r40-ccu.h>
#include <linux/bitops.h>
#include <log.h>
#include <reset.h>
#include <asm/io.h>
-#include <asm/arch/ccu.h>
+#include <clk/sunxi.h>
#include <linux/bitops.h>
#include <linux/log2.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
-#include <asm/arch/ccu.h>
+#include <clk/sunxi.h>
#include <dt-bindings/clock/sun8i-v3s-ccu.h>
#include <dt-bindings/reset/sun8i-v3s-ccu.h>
#include <linux/bitops.h>
#include <malloc.h>
#include <reset-uclass.h>
#include <asm/io.h>
+#include <clk/sunxi.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <linux/bitops.h>
#include <linux/log2.h>
-#include <asm/arch/ccu.h>
struct sunxi_reset_priv {
void *base;
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Amarula Solutions.
+ * Author: Jagan Teki <jagan@amarulasolutions.com>
+ */
+
+#ifndef _CLK_SUNXI_H
+#define _CLK_SUNXI_H
+
+#include <linux/bitops.h>
+
+/**
+ * enum ccu_flags - ccu clock/reset flags
+ *
+ * @CCU_CLK_F_IS_VALID: is given clock gate is valid?
+ * @CCU_RST_F_IS_VALID: is given reset control is valid?
+ */
+enum ccu_flags {
+ CCU_CLK_F_IS_VALID = BIT(0),
+ CCU_RST_F_IS_VALID = BIT(1),
+};
+
+/**
+ * struct ccu_clk_gate - ccu clock gate
+ * @off: gate offset
+ * @bit: gate bit
+ * @flags: ccu clock gate flags
+ */
+struct ccu_clk_gate {
+ u16 off;
+ u32 bit;
+ enum ccu_flags flags;
+};
+
+#define GATE(_off, _bit) { \
+ .off = _off, \
+ .bit = _bit, \
+ .flags = CCU_CLK_F_IS_VALID, \
+}
+
+/**
+ * struct ccu_reset - ccu reset
+ * @off: reset offset
+ * @bit: reset bit
+ * @flags: ccu reset control flags
+ */
+struct ccu_reset {
+ u16 off;
+ u32 bit;
+ enum ccu_flags flags;
+};
+
+#define RESET(_off, _bit) { \
+ .off = _off, \
+ .bit = _bit, \
+ .flags = CCU_RST_F_IS_VALID, \
+}
+
+/**
+ * struct ccu_desc - clock control unit descriptor
+ *
+ * @gates: clock gates
+ * @resets: reset unit
+ */
+struct ccu_desc {
+ const struct ccu_clk_gate *gates;
+ const struct ccu_reset *resets;
+};
+
+/**
+ * struct ccu_priv - sunxi clock control unit
+ *
+ * @base: base address
+ * @desc: ccu descriptor
+ */
+struct ccu_priv {
+ void *base;
+ const struct ccu_desc *desc;
+};
+
+/**
+ * sunxi_clk_probe - common sunxi clock probe
+ * @dev: clock device
+ */
+int sunxi_clk_probe(struct udevice *dev);
+
+extern struct clk_ops sunxi_clk_ops;
+
+/**
+ * sunxi_reset_bind() - reset binding
+ *
+ * @dev: reset device
+ * @count: reset count
+ * @return 0 success, or error value
+ */
+int sunxi_reset_bind(struct udevice *dev, ulong count);
+
+#endif /* _CLK_SUNXI_H */