drm/amd/display: Rework registers tracepoint
authorRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Wed, 2 Sep 2020 18:29:38 +0000 (14:29 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 26 Oct 2020 17:34:08 +0000 (13:34 -0400)
amdgpu_dc_rreg and amdgpu_dc_wreg are very similar, for this reason,
this commits abstract these two events by using DECLARE_EVENT_CLASS and
create an instance of it for each one of these events.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

index 1151e03..11941c6 100644 (file)
 
 #include <linux/tracepoint.h>
 
-TRACE_EVENT(amdgpu_dc_rreg,
-       TP_PROTO(unsigned long *read_count, uint32_t reg, uint32_t value),
-       TP_ARGS(read_count, reg, value),
-       TP_STRUCT__entry(
-                       __field(uint32_t, reg)
-                       __field(uint32_t, value)
-               ),
-       TP_fast_assign(
-                       __entry->reg = reg;
-                       __entry->value = value;
-                       *read_count = *read_count + 1;
-               ),
-       TP_printk("reg=0x%08lx, value=0x%08lx",
-                       (unsigned long)__entry->reg,
-                       (unsigned long)__entry->value)
-);
+DECLARE_EVENT_CLASS(amdgpu_dc_reg_template,
+                   TP_PROTO(unsigned long *count, uint32_t reg, uint32_t value),
+                   TP_ARGS(count, reg, value),
 
-TRACE_EVENT(amdgpu_dc_wreg,
-       TP_PROTO(unsigned long *write_count, uint32_t reg, uint32_t value),
-       TP_ARGS(write_count, reg, value),
-       TP_STRUCT__entry(
-                       __field(uint32_t, reg)
-                       __field(uint32_t, value)
-               ),
-       TP_fast_assign(
-                       __entry->reg = reg;
-                       __entry->value = value;
-                       *write_count = *write_count + 1;
-               ),
-       TP_printk("reg=0x%08lx, value=0x%08lx",
-                       (unsigned long)__entry->reg,
-                       (unsigned long)__entry->value)
+                   TP_STRUCT__entry(
+                                    __field(uint32_t, reg)
+                                    __field(uint32_t, value)
+                   ),
+
+                   TP_fast_assign(
+                                  __entry->reg = reg;
+                                  __entry->value = value;
+                                  *count = *count + 1;
+                   ),
+
+                   TP_printk("reg=0x%08lx, value=0x%08lx",
+                             (unsigned long)__entry->reg,
+                             (unsigned long)__entry->value)
 );
 
+DEFINE_EVENT(amdgpu_dc_reg_template, amdgpu_dc_rreg,
+            TP_PROTO(unsigned long *count, uint32_t reg, uint32_t value),
+            TP_ARGS(count, reg, value));
+
+DEFINE_EVENT(amdgpu_dc_reg_template, amdgpu_dc_wreg,
+            TP_PROTO(unsigned long *count, uint32_t reg, uint32_t value),
+            TP_ARGS(count, reg, value));
 
 TRACE_EVENT(amdgpu_dc_performance,
        TP_PROTO(unsigned long read_count, unsigned long write_count,