case CLK_TYPE_GEN4_RPCD2:
rate = gen3_clk_get_rate64(&parent);
- value = readl(priv->base + core->offset);
+ value = readl(priv->base + CPG_RPCCKCR);
prediv = (value >> CPG_RPC_PREDIV_OFFSET) &
CPG_RPC_PREDIV_MASK;
#define DEF_GEN3_SD(_name, _id, _parent, _offset) \
DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset)
-#define DEF_GEN3_RPCD2(_name, _id, _parent, _offset) \
- DEF_BASE(_name, _id, CLK_TYPE_GEN3_RPCD2, _parent, .offset = _offset)
-
#define DEF_GEN3_MDSEL(_name, _id, _md, _parent0, _div0, _parent1, _div1) \
DEF_BASE(_name, _id, CLK_TYPE_GEN3_MDSEL, \
(_parent0) << 16 | (_parent1), \