ARM: dts: imx6sl: use tabs for code indent
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>
Fri, 26 Aug 2022 19:22:48 +0000 (21:22 +0200)
committerShawn Guo <shawnguo@kernel.org>
Mon, 5 Sep 2022 01:54:14 +0000 (09:54 +0800)
This fixes the following error:

arch/arm/boot/dts/imx6sl.dtsi:714: error: code indent should use tabs
where possible

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6sl.dtsi

index cfd6b49..01122dd 100644 (file)
                                <792000  1175000>,
                                <396000  975000>;
                        fsl,soc-operating-points =
-                               /* ARM kHz      SOC-PU uV */
-                               <996000         1225000>,
-                               <792000         1175000>,
-                               <396000         1175000>;
+                               /* ARM kHz      SOC-PU uV */
+                               <996000         1225000>,
+                               <792000         1175000>,
+                               <396000         1175000>;
                        clock-latency = <61036>; /* two CLK32 periods */
                        #cooling-cells = <2>;
                        clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>,
 
                                uart5: serial@2018000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02018000 0x4000>;
                                        interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
 
                                uart1: serial@2020000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02020000 0x4000>;
                                        interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
 
                                uart2: serial@2024000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02024000 0x4000>;
                                        interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
 
                                uart3: serial@2034000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02034000 0x4000>;
                                        interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
 
                                uart4: serial@2038000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02038000 0x4000>;
                                        interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
                                                #power-domain-cells = <0>;
                                                power-supply = <&reg_pu>;
                                                clocks = <&clks IMX6SL_CLK_GPU2D_OVG>,
-                                                        <&clks IMX6SL_CLK_GPU2D_PODF>;
+                                                        <&clks IMX6SL_CLK_GPU2D_PODF>;
                                        };
 
                                        pd_disp: power-domain@2 {