ARM64: dts: marvell: cn9310: Add missing phy-mode

The DSA framework has got more picky about always having a phy-mode
for the CPU port. The SoC Ethernet is being configured to
10gbase-r. Set the switch phy-mode based on this. Additionally, the
SoC Ethernet is using in-band signalling to determine the link speed,
so add same parameter to the switch.

Additionally, the cpu label has never actually been used in the
binding, so remove it.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
index 8e4ec24..32cfb3e 100644 (file)
--- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
@@ -282,8 +282,9 @@
 
                        port@a {
                                reg = <10>;
-                               label = "cpu";
                                ethernet = <&cp0_eth0>;
+                               phy-mode = "10gbase-r";
+                               managed = "in-band-status";
                        };
 
                };