* PHY ops
**************************************************/
-u16 bgmac_phy_read(struct bgmac *bgmac, u8 phyaddr, u8 reg)
+static u16 bgmac_phy_read(struct bgmac *bgmac, u8 phyaddr, u8 reg)
{
struct bcma_device *core;
u16 phy_access_addr;
}
/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphywr */
-void bgmac_phy_write(struct bgmac *bgmac, u8 phyaddr, u8 reg, u16 value)
+static int bgmac_phy_write(struct bgmac *bgmac, u8 phyaddr, u8 reg, u16 value)
{
struct bcma_device *core;
u16 phy_access_addr;
tmp |= value;
bcma_write32(core, phy_access_addr, tmp);
- if (!bgmac_wait_value(core, phy_access_addr, BGMAC_PA_START, 0, 1000))
+ if (!bgmac_wait_value(core, phy_access_addr, BGMAC_PA_START, 0, 1000)) {
bgmac_err(bgmac, "Writing to PHY %d register 0x%X failed\n",
phyaddr, reg);
+ return -ETIMEDOUT;
+ }
+
+ return 0;
}
/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyforce */
bgmac_maskset(bgmac, offset, ~0, set);
}
-u16 bgmac_phy_read(struct bgmac *bgmac, u8 phyaddr, u8 reg);
-void bgmac_phy_write(struct bgmac *bgmac, u8 phyaddr, u8 reg, u16 value);
-
#endif /* _BGMAC_H */