ARM: ep93xx: Replace setup_irq() by request_irq()

request_irq() is preferred over setup_irq(). Invocations of setup_irq()
occur after memory allocators are ready.

Per tglx[1], setup_irq() existed in olden days when allocators were not
ready by the time early interrupts were initialized.

Hence replace setup_irq() by request_irq().

[1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos

Link: https://lore.kernel.org/r/20200327124143.3520-1-afzal.mohd.ma@gmail.com
Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/mach-ep93xx/timer-ep93xx.c b/arch/arm/mach-ep93xx/timer-ep93xx.c
index de99883..dd4b164 100644 (file)
--- a/arch/arm/mach-ep93xx/timer-ep93xx.c
+++ b/arch/arm/mach-ep93xx/timer-ep93xx.c
@@ -117,15 +117,11 @@ static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
        return IRQ_HANDLED;
 }
 
-static struct irqaction ep93xx_timer_irq = {
-       .name           = "ep93xx timer",
-       .flags          = IRQF_TIMER | IRQF_IRQPOLL,
-       .handler        = ep93xx_timer_interrupt,
-       .dev_id         = &ep93xx_clockevent,
-};
-
 void __init ep93xx_timer_init(void)
 {
+       int irq = IRQ_EP93XX_TIMER3;
+       unsigned long flags = IRQF_TIMER | IRQF_IRQPOLL;
+
        /* Enable and register clocksource and sched_clock on timer 4 */
        writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
               EP93XX_TIMER4_VALUE_HIGH);
@@ -136,7 +132,9 @@ void __init ep93xx_timer_init(void)
                             EP93XX_TIMER4_RATE);
 
        /* Set up clockevent on timer 3 */
-       setup_irq(IRQ_EP93XX_TIMER3, &ep93xx_timer_irq);
+       if (request_irq(irq, ep93xx_timer_interrupt, flags, "ep93xx timer",
+                       &ep93xx_clockevent))
+               pr_err("Failed to request irq %d (ep93xx timer)\n", irq);
        clockevents_config_and_register(&ep93xx_clockevent,
                                        EP93XX_TIMER123_RATE,
                                        1,