ARM: exynos: fix UART address selection for DEBUG_LL 32/30632/9
authorHyungwon Hwang <human.hwang@samsung.com>
Fri, 21 Nov 2014 10:16:48 +0000 (19:16 +0900)
committerHyungwon Hwang <human.hwang@samsung.com>
Thu, 18 Dec 2014 05:29:56 +0000 (14:29 +0900)
The exynos5 SoCs using A15+A7 can boot to A15 or A7. If it boots using
A7, it can't detect right UART physical address only the part number of
CP15. It's possible to solve as checking Cluster ID additionally.

Change-Id: I1a227bf1186a988f7a8429ee3b5251528d0ee32a
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
arch/arm/include/debug/exynos.S

index b17fdb7..60bf3c2 100644 (file)
                mrc     p15, 0, \tmp, c0, c0, 0
                and     \tmp, \tmp, #0xf0
                teq     \tmp, #0xf0             @@ A15
-               ldreq   \rp, =EXYNOS5_PA_UART
+               beq     100f
+               mrc     p15, 0, \tmp, c0, c0, 5
+               and     \tmp, \tmp, #0xf00
+               teq     \tmp, #0x100            @@ A15 + A7 but boot to A7
+100:           ldreq   \rp, =EXYNOS5_PA_UART
                movne   \rp, #EXYNOS4_PA_UART   @@ EXYNOS4
                ldr     \rv, =S3C_VA_UART
 #if CONFIG_DEBUG_S3C_UART != 0