arm64: dts: ti: k3-j7200: fix main pinmux range
authorMatt Ranostay <mranostay@ti.com>
Mon, 19 Sep 2022 20:57:23 +0000 (13:57 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 26 Oct 2022 10:35:00 +0000 (12:35 +0200)
[ Upstream commit 0d0a0b4413460383331088b2203ba09a6971bc3a ]

Range size of 0x2b4 was incorrect since there isn't 173 configurable
pins for muxing. Additionally there is a non-addressable region in the
mapping which requires splitting into two ranges.

main_pmx0 -> 67 pins
main_pmx1 -> 3 pins

Fixes: d361ed88455f ("arm64: dts: ti: Add support for J7200 SoC")
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20220919205723.8342-1-mranostay@ti.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi

index d14f3c1..c3406e7 100644 (file)
                >;
        };
 
-       main_usbss0_pins_default: main-usbss0-pins-default {
+       vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
                pinctrl-single,pins = <
-                       J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
+                       J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
                >;
        };
+};
 
-       vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
+&main_pmx1 {
+       main_usbss0_pins_default: main-usbss0-pins-default {
                pinctrl-single,pins = <
-                       J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
+                       J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
                >;
        };
 };
index 000b573..b1df175 100644 (file)
        main_pmx0: pinctrl@11c000 {
                compatible = "pinctrl-single";
                /* Proxy 0 addressing */
-               reg = <0x00 0x11c000 0x00 0x2b4>;
+               reg = <0x00 0x11c000 0x00 0x10c>;
+               #pinctrl-cells = <1>;
+               pinctrl-single,register-width = <32>;
+               pinctrl-single,function-mask = <0xffffffff>;
+       };
+
+       main_pmx1: pinctrl@11c11c {
+               compatible = "pinctrl-single";
+               /* Proxy 0 addressing */
+               reg = <0x00 0x11c11c 0x00 0xc>;
                #pinctrl-cells = <1>;
                pinctrl-single,register-width = <32>;
                pinctrl-single,function-mask = <0xffffffff>;