ARM64: use 64-bit constant even on 32-bit machines

Another existing bot failure so no tests.

llvm-svn: 205093

diff --git a/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp b/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp
index bfc91f98b6766ac0313b751b23e656c1796e30b1..76096088dfd450200b5b8f40b3c2ea8ca7f5f1d1 100644 (file)
--- a/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp
+++ b/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp
@@ -5158,7 +5158,7 @@ SDValue ARM64TargetLowering::LowerBUILD_VECTOR(SDValue Op,
       // and NEG) are passed through unmodified.  This allows codegen patterns
       // for these operations to match.  Special-purpose patterns will lower
       // these immediates to MOVIs if it proves necessary.
-      if (VT.isInteger() && (CnstVal == 0 || CnstVal == ~0UL))
+      if (VT.isInteger() && (CnstVal == 0 || CnstVal == ~0ULL))
         return Op;
 
       // The many faces of MOVI...