riscv: k210: Use AI as the parent clock of aisram, not PLL1

Testing showed that disabling AI while leaving PLL1 enabled disabled the
aisram. This suggests that AI is a more appropriate clock for that ram
bank.

Signed-off-by: Sean Anderson <seanga2@gmail.com>

diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 2032f1e..75e1015 100644 (file)
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -89,7 +89,7 @@
                reg-names = "sram0", "sram1", "aisram";
                clocks = <&sysclk K210_CLK_SRAM0>,
                         <&sysclk K210_CLK_SRAM1>,
-                        <&sysclk K210_CLK_PLL1>;
+                        <&sysclk K210_CLK_AI>;
                clock-names = "sram0", "sram1", "aisram";
                u-boot,dm-pre-reloc;
        };