#define APCI3120_10_GAIN 0x30
#define APCI3120_SEQ_RAM_ADDRESS 0x06
#define APCI3120_RESET_FIFO 0x0c
-#define APCI3120_ENABLE_TIMER0 0x1000
/* nWrMode_Select */
#define APCI3120_ENABLE_SCAN 0x8
#define APCI3120_WATCHDOG 2
#define APCI3120_TIMER_DISABLE 0
#define APCI3120_TIMER_ENABLE 1
-#define APCI3120_ENABLE_TIMER2 0x4000
#define APCI3120_ENABLE_TIMER_INT 0x04
#define APCI3120_DISABLE_TIMER_INT (~APCI3120_ENABLE_TIMER_INT)
#define APCI3120_WRITE_MODE_SELECT 0x0e
#define APCI3120_ENABLE_TIMER_COUNTER 0x10
#define APCI3120_DISABLE_TIMER_COUNTER (~APCI3120_ENABLE_TIMER_COUNTER)
#define APCI3120_FC_TIMER 0x1000
-#define APCI3120_ENABLE_TIMER0 0x1000
-#define APCI3120_ENABLE_TIMER1 0x2000
-#define APCI3120_ENABLE_TIMER2 0x4000
#define APCI3120_TIMER2_SELECT_EOS 0xc0
#define APCI3120_COUNTER 3
dev->iobase + APCI3120_WRITE_MODE_SELECT);
/* Sets gate 0 */
- devpriv->ctrl |= APCI3120_ENABLE_TIMER0;
+ devpriv->ctrl |= APCI3120_CTRL_GATE(0);
outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS);
/* Set the conversion time */
inw(dev->iobase + APCI3120_RD_STATUS);
/* Sets gate 0 */
- devpriv->ctrl |= APCI3120_ENABLE_TIMER0;
+ devpriv->ctrl |= APCI3120_CTRL_GATE(0);
outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS);
/* Start conversion */
if (devpriv->us_UseDma == APCI3120_DISABLE &&
cmd->stop_src == TRIG_COUNT) {
/* set gate 2 to start conversion */
- devpriv->ctrl |= APCI3120_ENABLE_TIMER2;
+ devpriv->ctrl |= APCI3120_CTRL_GATE(2);
outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS);
}
switch (mode) {
case 1:
/* set gate 0 to start conversion */
- devpriv->ctrl |= APCI3120_ENABLE_TIMER0;
+ devpriv->ctrl |= APCI3120_CTRL_GATE(0);
outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS);
break;
case 2:
/* set gate 0 and gate 1 */
- devpriv->ctrl |= APCI3120_ENABLE_TIMER1 |
- APCI3120_ENABLE_TIMER0;
+ devpriv->ctrl |= APCI3120_CTRL_GATE(1) |
+ APCI3120_CTRL_GATE(0);
outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS);
break;
} else {
/* Stops the Timer */
outw(devpriv->ctrl &
- ~APCI3120_ENABLE_TIMER0 &
- ~APCI3120_ENABLE_TIMER1,
+ ~APCI3120_CTRL_GATE(0) &
+ ~APCI3120_CTRL_GATE(1),
dev->iobase + APCI3120_WR_ADDRESS);
}
divisor = apci3120_ns_to_timer(dev, 2, data[1], CMDF_ROUND_DOWN);
/* Reset gate 2 of Timer 2 to disable it (Set Bit D14 to 0) */
- devpriv->ctrl &= ~APCI3120_ENABLE_TIMER2;
+ devpriv->ctrl &= ~APCI3120_CTRL_GATE(2);
outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS);
/* Disable TIMER Interrupt */
if (devpriv->b_Timer2Mode == APCI3120_TIMER) { /* start timer */
/* For Timer mode is Gate2 must be activated timer started */
- devpriv->ctrl |= APCI3120_ENABLE_TIMER2;
+ devpriv->ctrl |= APCI3120_CTRL_GATE(2);
outw(devpriv->ctrl, dev->iobase + APCI3120_WR_ADDRESS);
}