* lib/target-supports.exp (check_effective_target_vect_no_int_max):

        Rename from check_effective_target_vect_no_max.
        (check_effective_target_vect_no_int_add): New.
        * gcc.dg/vect/vect-13.c: Use vect_no_int_max.
        * gcc.dg/vect/vect-91.c: Use vect_no_int_add.
        * gcc.dg/vect/vect-reduc-3.c: Likewise.
        * gcc.dg/vect/vect-reduc-1.c: Use both.
        * gcc.dg/vect/vect-reduc-2.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@101435 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 10b2817..0c5663f 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,16 @@
 2005-05-29  Richard Henderson  <rth@redhat.com>
 
+       * lib/target-supports.exp (check_effective_target_vect_no_int_max):
+       Rename from check_effective_target_vect_no_max.
+       (check_effective_target_vect_no_int_add): New.
+       * gcc.dg/vect/vect-13.c: Use vect_no_int_max.
+       * gcc.dg/vect/vect-91.c: Use vect_no_int_add.
+       * gcc.dg/vect/vect-reduc-3.c: Likewise.
+       * gcc.dg/vect/vect-reduc-1.c: Use both.
+       * gcc.dg/vect/vect-reduc-2.c: Likewise.
+
+2005-05-29  Richard Henderson  <rth@redhat.com>
+
        * lib/target-supports.exp (check_effective_target_vect_no_max): 
        Remove i386 and x86_64.
 

diff --git a/gcc/testsuite/gcc.dg/vect/vect-13.c b/gcc/testsuite/gcc.dg/vect/vect-13.c
index 9e6f4f9..dcafcaf 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/vect-13.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-13.c
@@ -36,6 +36,6 @@ int main (void)
   return main1 ();
 }
 
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_max } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_int_max } } } */
 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */

diff --git a/gcc/testsuite/gcc.dg/vect/vect-91.c b/gcc/testsuite/gcc.dg/vect/vect-91.c
index 80afd69..96099f4 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/vect-91.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-91.c
@@ -63,7 +63,7 @@ main3 ()
 /* Currently only the loops in main2 and main3 get vectorized. After the merge 
    of the datarefs-analysis cleanups from autovect-branch to mainline, the loop
    in main1 will also be vectorized.  */ 
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail vect_no_int_add } } } */
 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
 /* { dg-final { scan-tree-dump-times "accesses have the same alignment." 2 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" } } */

diff --git a/gcc/testsuite/gcc.dg/vect/vect-reduc-1.c b/gcc/testsuite/gcc.dg/vect/vect-reduc-1.c
index a582579..660c2df 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/vect-reduc-1.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-reduc-1.c
@@ -50,5 +50,5 @@ int main (void)
   return 0;
 }
 
-/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail i?86-*-* x86_64-*-* } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail { vect_no_int_add || vect_no_int_max } } } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */

diff --git a/gcc/testsuite/gcc.dg/vect/vect-reduc-2.c b/gcc/testsuite/gcc.dg/vect/vect-reduc-2.c
index ef4499f..37635ea 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/vect-reduc-2.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-reduc-2.c
@@ -47,5 +47,5 @@ int main (void)
   return 0;
 }
 
-/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail i?86-*-* x86_64-*-* } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail { vect_no_int_add || vect_no_int_max } } } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */

diff --git a/gcc/testsuite/gcc.dg/vect/vect-reduc-3.c b/gcc/testsuite/gcc.dg/vect/vect-reduc-3.c
index 0011837..486ac53 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/vect-reduc-3.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-reduc-3.c
@@ -36,5 +36,5 @@ int main (void)
   return 0;
 }
 
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_int_add } } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index d00850a..7605114 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -962,24 +962,45 @@ proc check_effective_target_vect_double { } {
 }
 
 # Return 1 if the target plus current options does not support a vector
-# max instruction, 0 otherwise.
+# max instruction on "int", 0 otherwise.
 #
 # This won't change for different subtargets so cache the result.
 
-proc check_effective_target_vect_no_max { } {
-    global et_vect_no_max_saved
+proc check_effective_target_vect_no_int_max { } {
+    global et_vect_no_int_max_saved
 
-    if [info exists et_vect_no_max_saved] {
-       verbose "check_effective_target_vect_no_max: using cached result" 2
+    if [info exists et_vect_no_int_max_saved] {
+       verbose "check_effective_target_vect_no_int_max: using cached result" 2
     } else {
-       set et_vect_no_max_saved 0
+       set et_vect_no_int_max_saved 0
        if { [istarget sparc*-*-*]
             || [istarget alpha*-*-*] } {
-           set et_vect_no_max_saved 1
+           set et_vect_no_int_max_saved 1
        }
     }
-    verbose "check_effective_target_vect_no_max: returning $et_vect_no_max_saved" 2
-    return $et_vect_no_max_saved
+    verbose "check_effective_target_vect_no_int_max: returning $et_vect_no_int_max_saved" 2
+    return $et_vect_no_int_max_saved
+}
+
+# Return 1 if the target plus current options does not support a vector
+# add instruction on "int", 0 otherwise.
+#
+# This won't change for different subtargets so cache the result.
+
+proc check_effective_target_vect_no_int_add { } {
+    global et_vect_no_int_add_saved
+
+    if [info exists et_vect_no_int_add_saved] {
+       verbose "check_effective_target_vect_no_int_add: using cached result" 2
+    } else {
+       set et_vect_no_int_add_saved 0
+       # Alpha only supports vector add on V8QI and V4HI.
+       if { [istarget alpha*-*-*] } {
+           set et_vect_no_int_add_saved 1
+       }
+    }
+    verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
+    return $et_vect_no_int_add_saved
 }
 
 # Return 1 if the target plus current options does not support vector