Add the initial support for GEN8
authorZhao Yakui <yakui.zhao@intel.com>
Mon, 7 Jan 2013 05:18:47 +0000 (13:18 +0800)
committerXiang, Haihao <haihao.xiang@intel.com>
Thu, 27 Feb 2014 01:51:36 +0000 (09:51 +0800)
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
[Haihao: fix conflict when rebasing]
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
src/i965_defines.h
src/i965_drv_video.c
src/i965_post_processing.c
src/i965_render.c
src/intel_batchbuffer.c

index c7163ae..58a73d7 100755 (executable)
 #define SUBSAMPLE_RGBX          6
 
 #define URB_SIZE(intel)         (IS_GEN7(intel->device_id) ? 4096 :     \
+                                 IS_GEN8(intel->device_id) ? 4096 :     \
                                  IS_GEN6(intel->device_id) ? 1024 :     \
                                  IS_IRONLAKE(intel->device_id) ? 1024 : \
                                  IS_G4X(intel->device_id) ? 384 : 256)
index fb7dc16..c9ed624 100755 (executable)
@@ -318,6 +318,26 @@ static struct hw_codec_info gen75_hw_codec_info = {
     },
 };
 
+/* TODO: Add the separate call back function for Gen8 */
+static struct hw_codec_info gen8_hw_codec_info = {
+    .dec_hw_context_init = gen75_dec_hw_context_init,
+    .enc_hw_context_init = gen75_enc_hw_context_init,
+    .proc_hw_context_init = gen75_proc_context_init,
+    .max_width = 4096,
+    .max_height = 4096,
+
+    .has_mpeg2_decoding = 1,
+    .has_mpeg2_encoding = 1,
+    .has_h264_decoding = 1,
+    .has_h264_encoding = 1,
+    .has_vc1_decoding = 1,
+    .has_jpeg_decoding = 1,
+    .has_vpp = 1,
+    .has_accelerated_getimage = 1,
+    .has_accelerated_putimage = 1,
+    .has_tiled_surface = 1,
+};
+
 #define I965_PACKED_HEADER_BASE         0
 #define I965_PACKED_MISC_HEADER_BASE    3
 
@@ -358,7 +378,6 @@ va_enc_packed_type_to_idx(int packed_type)
     return idx;
 }
 
-
 VAStatus 
 i965_QueryConfigProfiles(VADriverContextP ctx,
                          VAProfile *profile_list,       /* out */
@@ -1497,7 +1516,7 @@ i965_CreateContext(VADriverContextP ctx,
         render_state->interleaved_uv = 1;
         break;
     default:
-        render_state->interleaved_uv = !!(IS_GEN6(i965->intel.device_id) || IS_GEN7(i965->intel.device_id));
+        render_state->interleaved_uv = !!(IS_GEN6(i965->intel.device_id) || IS_GEN7(i965->intel.device_id) || IS_GEN8(i965->intel.device_id));
         break;
     }
 
@@ -4823,7 +4842,9 @@ i965_driver_data_init(VADriverContextP ctx)
 {
     struct i965_driver_data *i965 = i965_driver_data(ctx); 
 
-    if (IS_HASWELL(i965->intel.device_id))
+    if (IS_GEN8(i965->intel.device_id))
+        i965->codec_info = &gen8_hw_codec_info;
+    else if (IS_HASWELL(i965->intel.device_id))
        i965->codec_info = &gen75_hw_codec_info;
     else if (IS_G4X(i965->intel.device_id))
         i965->codec_info = &g4x_hw_codec_info;
index 015e11c..0353044 100755 (executable)
@@ -42,7 +42,8 @@
 
 #define HAS_PP(ctx) (IS_IRONLAKE((ctx)->intel.device_id) ||     \
                      IS_GEN6((ctx)->intel.device_id) ||         \
-                     IS_GEN7((ctx)->intel.device_id))
+                     IS_GEN7((ctx)->intel.device_id) ||         \
+                     IS_GEN8((ctx)->intel.device_id))
 
 #define SURFACE_STATE_PADDED_SIZE_0_I965        ALIGN(sizeof(struct i965_surface_state), 32)
 #define SURFACE_STATE_PADDED_SIZE_1_I965        ALIGN(sizeof(struct i965_surface_state2), 32)
@@ -4306,7 +4307,8 @@ gen6_pp_initialize(
     assert(bo);
     pp_context->vfe_state.bo = bo;
     
-    if (IS_GEN7(i965->intel.device_id)) {
+    if (IS_GEN7(i965->intel.device_id) ||
+        IS_GEN8(i965->intel.device_id)) {
         static_param_size = sizeof(struct gen7_pp_static_parameter);
         inline_param_size = sizeof(struct gen7_pp_inline_parameter);
     } else {
@@ -4361,7 +4363,8 @@ gen6_pp_interface_descriptor_table(VADriverContextP   ctx,
     desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET >> 5);
     desc->desc4.constant_urb_entry_read_offset = 0;
 
-    if (IS_GEN7(i965->intel.device_id))
+    if (IS_GEN7(i965->intel.device_id) ||
+        IS_GEN8(i965->intel.device_id))
         desc->desc4.constant_urb_entry_read_length = 6; /* grf 1-6 */
     else
         desc->desc4.constant_urb_entry_read_length = 4; /* grf 1-4 */
@@ -4393,7 +4396,8 @@ gen6_pp_upload_constants(VADriverContextP ctx,
     assert(sizeof(struct pp_static_parameter) == 128);
     assert(sizeof(struct gen7_pp_static_parameter) == 192);
 
-    if (IS_GEN7(i965->intel.device_id))
+    if (IS_GEN7(i965->intel.device_id) ||
+        IS_GEN8(i965->intel.device_id))
         param_size = sizeof(struct gen7_pp_static_parameter);
     else
         param_size = sizeof(struct pp_static_parameter);
@@ -4555,7 +4559,8 @@ gen6_pp_object_walker(VADriverContextP ctx,
     dri_bo *command_buffer;
     unsigned int *command_ptr;
 
-    if (IS_GEN7(i965->intel.device_id))
+    if (IS_GEN7(i965->intel.device_id) ||
+        IS_GEN8(i965->intel.device_id))
         param_size = sizeof(struct gen7_pp_inline_parameter);
     else
         param_size = sizeof(struct pp_inline_parameter);
@@ -4680,7 +4685,8 @@ i965_post_processing_internal(
     struct i965_driver_data *i965 = i965_driver_data(ctx);
 
     if (IS_GEN6(i965->intel.device_id) ||
-        IS_GEN7(i965->intel.device_id))
+        IS_GEN7(i965->intel.device_id) ||
+       IS_GEN8(i965->intel.device_id))
         va_status = gen6_post_processing(ctx, pp_context, src_surface, src_rect, dst_surface, dst_rect, pp_index, filter_param);
     else
         va_status = ironlake_post_processing(ctx, pp_context, src_surface, src_rect, dst_surface, dst_rect, pp_index, filter_param);
@@ -4743,7 +4749,8 @@ i965_vpp_clear_surface(VADriverContextP ctx,
     br13 |= pitch;
 
     if (IS_GEN6(i965->intel.device_id) ||
-        IS_GEN7(i965->intel.device_id)) {
+        IS_GEN7(i965->intel.device_id) ||
+        IS_GEN8(i965->intel.device_id)) {
         intel_batchbuffer_start_atomic_blt(batch, 48);
         BEGIN_BLT_BATCH(batch, 12);
     } else {
@@ -5391,7 +5398,9 @@ i965_post_processing_context_init(VADriverContextP ctx,
     assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen7));
     assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen75));
 
-    if (IS_HASWELL(i965->intel.device_id))
+    if (IS_GEN8(i965->intel.device_id))
+        memcpy(pp_context->pp_modules, pp_modules_gen7, sizeof(pp_context->pp_modules));
+    else if (IS_HASWELL(i965->intel.device_id))
         memcpy(pp_context->pp_modules, pp_modules_gen75, sizeof(pp_context->pp_modules));
     else if (IS_GEN7(i965->intel.device_id))
         memcpy(pp_context->pp_modules, pp_modules_gen7, sizeof(pp_context->pp_modules));
@@ -5416,7 +5425,8 @@ i965_post_processing_context_init(VADriverContextP ctx,
     }
 
     /* static & inline parameters */
-    if (IS_GEN7(i965->intel.device_id)) {
+    if (IS_GEN7(i965->intel.device_id) ||
+        IS_GEN8(i965->intel.device_id)) {
         pp_context->pp_static_parameter = calloc(sizeof(struct gen7_pp_static_parameter), 1);
         pp_context->pp_inline_parameter = calloc(sizeof(struct gen7_pp_inline_parameter), 1);
     } else {
index a902fcb..1161fb6 100644 (file)
@@ -827,7 +827,8 @@ i965_render_src_surface_state(
     assert(ss_bo->virtual);
     ss = (char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index);
 
-    if (IS_GEN7(i965->intel.device_id)) {
+    if (IS_GEN7(i965->intel.device_id) ||
+               IS_GEN8(i965->intel.device_id)) {
         gen7_render_set_surface_state(ss,
                                       region, offset,
                                       w, h,
@@ -942,7 +943,8 @@ i965_render_dest_surface_state(VADriverContextP ctx, int index)
     assert(ss_bo->virtual);
     ss = (char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index);
 
-    if (IS_GEN7(i965->intel.device_id)) {
+    if (IS_GEN7(i965->intel.device_id) ||
+               IS_GEN8(i965->intel.device_id)) {
         gen7_render_set_surface_state(ss,
                                       dest_region->bo, 0,
                                       dest_region->width, dest_region->height,
@@ -1536,7 +1538,8 @@ i965_clear_dest_region(VADriverContextP ctx)
     br13 |= pitch;
 
     if (IS_GEN6(i965->intel.device_id) ||
-        IS_GEN7(i965->intel.device_id)) {
+        IS_GEN7(i965->intel.device_id) ||
+        IS_GEN8(i965->intel.device_id)) {
         intel_batchbuffer_start_atomic_blt(batch, 24);
         BEGIN_BLT_BATCH(batch, 6);
     } else {
@@ -3107,7 +3110,8 @@ intel_render_put_surface(
             src_rect = dst_rect;
     }
 
-    if (IS_GEN7(i965->intel.device_id))
+    if (IS_GEN7(i965->intel.device_id) ||
+        IS_GEN8(i965->intel.device_id))
         gen7_render_put_surface(ctx, obj_surface, src_rect, dst_rect, flags);
     else if (IS_GEN6(i965->intel.device_id))
         gen6_render_put_surface(ctx, obj_surface, src_rect, dst_rect, flags);
@@ -3128,7 +3132,8 @@ intel_render_put_subpicture(
 {
     struct i965_driver_data *i965 = i965_driver_data(ctx);
 
-    if (IS_GEN7(i965->intel.device_id))
+    if (IS_GEN7(i965->intel.device_id) ||
+        IS_GEN8(i965->intel.device_id))
         gen7_render_put_subpicture(ctx, obj_surface, src_rect, dst_rect);
     else if (IS_GEN6(i965->intel.device_id))
         gen6_render_put_subpicture(ctx, obj_surface, src_rect, dst_rect);
@@ -3149,7 +3154,8 @@ i965_render_init(VADriverContextP ctx)
     assert(NUM_RENDER_KERNEL == (sizeof(render_kernels_gen6) / 
                                  sizeof(render_kernels_gen6[0])));
 
-    if (IS_GEN7(i965->intel.device_id))
+    if (IS_GEN7(i965->intel.device_id) ||
+               IS_GEN8(i965->intel.device_id))
         memcpy(render_state->render_kernels,
                (IS_HASWELL(i965->intel.device_id) ? render_kernels_gen7_haswell : render_kernels_gen7),
                sizeof(render_state->render_kernels));
index 8b35744..e1f5a5e 100644 (file)
@@ -184,7 +184,8 @@ intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch)
     struct intel_driver_data *intel = batch->intel; 
 
     if (IS_GEN6(intel->device_id) ||
-        IS_GEN7(intel->device_id)) {
+        IS_GEN7(intel->device_id) ||
+        IS_GEN8(intel->device_id)) {
         if (batch->flag == I915_EXEC_RENDER) {
             if (IS_GEN6(intel->device_id)) {
                 assert(batch->wa_render_bo);