This has been shown to help performance on TGL and DG1. This could be
applied to gen9+, but we still need to show if it helps with those
platforms.
Rework:
* Make change in src/intel/vulkan/genX_cmd_buffer.c too. (Ken)
* Keep mask as 3 for gen < 12
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6684>
iris_emit_cmd(batch, GENX(PIPELINE_SELECT), sel) {
#if GEN_GEN >= 9
- sel.MaskBits = 3;
+ sel.MaskBits = GEN_GEN >= 12 ? 0x13 : 3;
+ sel.MediaSamplerDOPClockGateEnable = GEN_GEN >= 12;
#endif
sel.PipelineSelection = pipeline;
}
anv_batch_emit(&cmd_buffer->batch, GENX(PIPELINE_SELECT), ps) {
#if GEN_GEN >= 9
- ps.MaskBits = 3;
+ ps.MaskBits = GEN_GEN >= 12 ? 0x13 : 3;
+ ps.MediaSamplerDOPClockGateEnable = GEN_GEN >= 12;
#endif
ps.PipelineSelection = pipeline;
}
anv_batch_emit(&batch, GENX(PIPELINE_SELECT), ps) {
#if GEN_GEN >= 9
- ps.MaskBits = 3;
+ ps.MaskBits = GEN_GEN >= 12 ? 0x13 : 3;
+ ps.MediaSamplerDOPClockGateEnable = GEN_GEN >= 12;
#endif
ps.PipelineSelection = _3D;
}