anv, iris: Set MediaSamplerDOPClockGateEnable for gen12+
authorJordan Justen <jordan.l.justen@intel.com>
Sun, 29 Mar 2020 09:16:06 +0000 (02:16 -0700)
committerJordan Justen <jordan.l.justen@intel.com>
Sat, 12 Sep 2020 00:40:03 +0000 (17:40 -0700)
This has been shown to help performance on TGL and DG1. This could be
applied to gen9+, but we still need to show if it helps with those
platforms.

Rework:
 * Make change in src/intel/vulkan/genX_cmd_buffer.c too. (Ken)
 * Keep mask as 3 for gen < 12

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6684>

src/gallium/drivers/iris/iris_state.c
src/intel/vulkan/genX_cmd_buffer.c
src/intel/vulkan/genX_state.c

index cf36dfa..29c0bf9 100644 (file)
@@ -667,7 +667,8 @@ emit_pipeline_select(struct iris_batch *batch, uint32_t pipeline)
 
    iris_emit_cmd(batch, GENX(PIPELINE_SELECT), sel) {
 #if GEN_GEN >= 9
-      sel.MaskBits = 3;
+      sel.MaskBits = GEN_GEN >= 12 ? 0x13 : 3;
+      sel.MediaSamplerDOPClockGateEnable = GEN_GEN >= 12;
 #endif
       sel.PipelineSelection = pipeline;
    }
index 8bcb4f4..09b0b42 100644 (file)
@@ -4651,7 +4651,8 @@ genX(flush_pipeline_select)(struct anv_cmd_buffer *cmd_buffer,
 
    anv_batch_emit(&cmd_buffer->batch, GENX(PIPELINE_SELECT), ps) {
 #if GEN_GEN >= 9
-      ps.MaskBits = 3;
+      ps.MaskBits = GEN_GEN >= 12 ? 0x13 : 3;
+      ps.MediaSamplerDOPClockGateEnable = GEN_GEN >= 12;
 #endif
       ps.PipelineSelection = pipeline;
    }
index 908c676..a29938e 100644 (file)
@@ -120,7 +120,8 @@ genX(init_device_state)(struct anv_device *device)
 
    anv_batch_emit(&batch, GENX(PIPELINE_SELECT), ps) {
 #if GEN_GEN >= 9
-      ps.MaskBits = 3;
+      ps.MaskBits = GEN_GEN >= 12 ? 0x13 : 3;
+      ps.MediaSamplerDOPClockGateEnable = GEN_GEN >= 12;
 #endif
       ps.PipelineSelection = _3D;
    }