altivec.md (*movv4si_internal): At least one operand must be altivec_register_operand.
authorDorit Naishlos <dorit@il.ibm.com>
Thu, 5 Feb 2004 18:07:39 +0000 (18:07 +0000)
committerDavid Edelsohn <dje@gcc.gnu.org>
Thu, 5 Feb 2004 18:07:39 +0000 (13:07 -0500)
2004-02-05  Dorit Naishlos  <dorit@il.ibm.com>

        * config/rs6000/altivec.md (*movv4si_internal): At least one
        operand must be altivec_register_operand.
        (*movv8hi_internal1): Likewise.
        (*movv16qi_internal1): Likewise.
        (*movv4sf_internal1): Likewise.

From-SVN: r77326

gcc/ChangeLog
gcc/config/rs6000/altivec.md

index 4419728..e9a5477 100644 (file)
@@ -1,3 +1,11 @@
+2004-02-05  Dorit Naishlos  <dorit@il.ibm.com>
+
+       * config/rs6000/altivec.md (*movv4si_internal): At least one
+       operand must be altivec_register_operand.
+       (*movv8hi_internal1): Likewise.
+       (*movv16qi_internal1): Likewise.
+       (*movv4sf_internal1): Likewise.
+
 2004-02-05  David Edelsohn  <edelsohn@gnu.org>
 
        * configure.ac (gcc_cv_as_powerpc_mfcrf): Correct test for mfcr.
index 3554d3f..7eb6323 100644 (file)
@@ -93,7 +93,9 @@
 (define_insn "*movv4si_internal"
   [(set (match_operand:V4SI 0 "nonimmediate_operand" "=m,v,v,o,r,r,v")
        (match_operand:V4SI 1 "input_operand" "v,m,v,r,o,r,W"))]
-  "TARGET_ALTIVEC"
+  "TARGET_ALTIVEC 
+   && (altivec_register_operand (operands[0], V4SImode) 
+       || altivec_register_operand (operands[1], V4SImode))"
   "*
 {
   switch (which_alternative)
 (define_insn "*movv8hi_internal1"
   [(set (match_operand:V8HI 0 "nonimmediate_operand" "=m,v,v,o,r,r,v")
        (match_operand:V8HI 1 "input_operand" "v,m,v,r,o,r,W"))]
-  "TARGET_ALTIVEC"
+  "TARGET_ALTIVEC 
+   && (altivec_register_operand (operands[0], V8HImode) 
+       || altivec_register_operand (operands[1], V8HImode))"
   "*
 {
    switch (which_alternative)
 (define_insn "*movv16qi_internal1"
   [(set (match_operand:V16QI 0 "nonimmediate_operand" "=m,v,v,o,r,r,v")
        (match_operand:V16QI 1 "input_operand" "v,m,v,r,o,r,W"))]
-  "TARGET_ALTIVEC"
+  "TARGET_ALTIVEC
+   && (altivec_register_operand (operands[0], V16QImode)
+       || altivec_register_operand (operands[1], V16QImode))"
   "*
 {
   switch (which_alternative)
 (define_insn "*movv4sf_internal1"
   [(set (match_operand:V4SF 0 "nonimmediate_operand" "=m,v,v,o,r,r,v")
        (match_operand:V4SF 1 "input_operand" "v,m,v,r,o,r,W"))]
-  "TARGET_ALTIVEC"
+  "TARGET_ALTIVEC
+   && (altivec_register_operand (operands[0], V4SFmode)
+       || altivec_register_operand (operands[1], V4SFmode))"
   "*
 {
   switch (which_alternative)