clk: qcom: Add SDX65 APCS clock controller support

Update APCS Kconfig to reflect support for SDX65
APCS clock controller.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1645505785-2271-6-git-send-email-quic_rohiagar@quicinc.com

diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index a4ede4a..204438c 100644 (file)
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -55,13 +55,13 @@ config QCOM_CLK_APCC_MSM8996
          drivers for dynamic power management.
 
 config QCOM_CLK_APCS_SDX55
-       tristate "SDX55 APCS Clock Controller"
+       tristate "SDX55 and SDX65 APCS Clock Controller"
        depends on QCOM_APCS_IPC || COMPILE_TEST
        help
-         Support for the APCS Clock Controller on SDX55 platform. The
+         Support for the APCS Clock Controller on SDX55, SDX65 platforms. The
          APCS is managing the mux and divider which feeds the CPUs.
          Say Y if you want to support CPU frequency scaling on devices
-         such as SDX55.
+         such as SDX55, SDX65.
 
 config QCOM_CLK_RPM
        tristate "RPM based Clock Controller"