[llvm][AArch64] Fix "+all" feature for sysreg aliases
authorDavid Spickett <david.spickett@linaro.org>
Tue, 5 Jul 2022 16:14:24 +0000 (16:14 +0000)
committerDavid Spickett <david.spickett@linaro.org>
Wed, 6 Jul 2022 08:41:53 +0000 (08:41 +0000)
For example the predres extension adds one instruction that
is a sys alias. Previously this wasn't disassembled properly
with "+all".

This was because a check for "+all" was added to haveFeatures
in AArch64SysReg but not in SysAlias.

Reviewed By: MaskRay, lenary

Differential Revision: https://reviews.llvm.org/D129147

llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
llvm/test/MC/Disassembler/AArch64/mattr-all.txt

index 7130361..cf8891c 100644 (file)
@@ -343,7 +343,8 @@ struct SysAlias {
       : Name(N), Encoding(E), FeaturesRequired(F) {}
 
   bool haveFeatures(FeatureBitset ActiveFeatures) const {
-    return (FeaturesRequired & ActiveFeatures) == FeaturesRequired;
+    return ActiveFeatures[llvm::AArch64::FeatureAll] ||
+           (FeaturesRequired & ActiveFeatures) == FeaturesRequired;
   }
 
   FeatureBitset getRequiredFeatures() const { return FeaturesRequired; }
index 0d3f13f..87dc73a 100644 (file)
@@ -35,3 +35,7 @@
 ## armv9a rme
 # CHECK: mrs x0, MFAR_EL3
 [0xa0,0x60,0x3e,0xd5]
+
+## predres (to make sure sysreg aliases work)
+# CHECK: cfp rctx, x0
+[0x80,0x73,0x0b,0xd5]