drm/i915: Move DP M/N setup from update_pll to mode_set for gmch platforms
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 31 Mar 2014 15:21:25 +0000 (18:21 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 3 Apr 2014 09:26:56 +0000 (11:26 +0200)
There's no point in hiding the DP M/N setup in the update_pll functions.
Just move it to the mode_set function.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c

index 571589d..f0c8446 100644 (file)
@@ -5218,9 +5218,6 @@ static void vlv_update_pll(struct intel_crtc *crtc)
                << DPLL_MD_UDI_MULTIPLIER_SHIFT;
        crtc->config.dpll_hw_state.dpll_md = dpll_md;
 
-       if (crtc->config.has_dp_encoder)
-               intel_dp_set_m_n(crtc);
-
        mutex_unlock(&dev_priv->dpio_lock);
 }
 
@@ -5298,9 +5295,6 @@ static void i9xx_update_pll(struct intel_crtc *crtc,
                        << DPLL_MD_UDI_MULTIPLIER_SHIFT;
                crtc->config.dpll_hw_state.dpll_md = dpll_md;
        }
-
-       if (crtc->config.has_dp_encoder)
-               intel_dp_set_m_n(crtc);
 }
 
 static void i8xx_update_pll(struct intel_crtc *crtc,
@@ -5629,6 +5623,9 @@ skip_dpll:
                        dspcntr |= DISPPLANE_SEL_PIPE_B;
        }
 
+       if (intel_crtc->config.has_dp_encoder)
+               intel_dp_set_m_n(intel_crtc);
+
        intel_set_pipe_timings(intel_crtc);
 
        /* pipesrc and dspsize control the size that is scaled from,