Enable COMPlus_JitDisasmWithGC with SuperPMI asm diffs (#46966)
authorBruce Forstall <brucefo@microsoft.com>
Mon, 25 Jan 2021 18:17:37 +0000 (08:17 -1000)
committerGitHub <noreply@github.com>
Mon, 25 Jan 2021 18:17:37 +0000 (10:17 -0800)
All SPMI asm diffs (generated using superpmi.py) will
display interleaved GC info.

Note that you can also pass the `--gcinfo` option
to get traditional end-of-code asm dump, but that also
requires adding per-instruction offset output, which can lead
to excessive textual diffs.

src/coreclr/scripts/superpmi.py

index 634018d..ed395cf 100755 (executable)
@@ -1323,6 +1323,7 @@ class SuperPMIReplayAsmDiffs:
             "COMPlus_JitEnableNoWayAssert": "1",
             "COMPlus_JitNoForceFallback": "1",
             "COMPlus_JitRequired": "1",
+            "COMPlus_JitDisasmWithGC": "1",
             "COMPlus_TieredCompilation": "0" }
 
         if self.coreclr_args.gcinfo: