* Fix warnings due to "strlen return type is size_t" in src/jit/emitarm.cpp src/jit/unwindarm.cpp
* Use ptrdiff_t disp in emitter::emitOutputInstr in src/jit/emitarm.cpp
* Compiler::gtHashValue should depend on host-bitness in src/jit/gentree.cpp
* Simplify checking using ImmedValNeedsReloc() in src/jit/lowerarmarch.cpp
* Use target_ssize_t immVal in Lowering::IsContainableImmed in src/jit/lowerarmarch.cpp
* Remove int offs and use BYTE* addr and %p specifier in emitter::emitDispInsHelp in IF_T2_J3 case in src/jit/emitarm.cpp
* Cast gtIconVal to target_size_t in CodeGen::genLclHeap in src/jit/codegenarm.cpp
* Use int argSize in CodeGen::genEmitCall in src/jit/codegen.h src/jit/codegenlinear.cpp
* Use ssize_t disp in emitter::emitIns_Call in src/jit/emitarm.cpp src/jit/emitarm.h
* Use int argSize in emitter::emitIns_Call in src/jit/emitarm.cpp src/jit/emitarm.h
* Use target_size_t return type in Compiler::eeGetPageSize Compiler::getVeryLargeFrameSize in src/jit/codegencommon.cpp src/jit/compiler.h
* Cast gtIconVal to unsigned in CodeGen::genCodeForShift CodeGen::genCodeForShiftLong in src/jit/codegenarm.cpp src/jit/codegenarmarch.cpp
* Cast gtIconVal to unsigned in DecomposeLongs::DecomposeRotate in src/jit/decomposelongs.cpp
* Use unsigned size in CodeGen::genConsumePutStructArgStk in src/jit/codegenlinear.cpp
* Use target_ssize_t stmImm in cast in CodeGen::genZeroInitFrame in src/jit/codegencommon.cpp
* Cast to target_ssize_t in Compiler::gtSetEvalOrder in src/jit/gentree.cpp
* Address PR feedbask - use dspPtr(addr) in src/jit/emitarm.cpp
Commit migrated from https://github.com/dotnet/coreclr/commit/
38d416dd613ad10ac69e624096615a18214b5e53
CORINFO_METHOD_HANDLE methHnd,
INDEBUG_LDISASM_COMMA(CORINFO_SIG_INFO* sigInfo)
void* addr
- X86_ARG(ssize_t argSize),
+ X86_ARG(int argSize),
emitAttr retSize
MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(emitAttr secondRetSize),
IL_OFFSETX ilOffset,
CORINFO_METHOD_HANDLE methHnd,
INDEBUG_LDISASM_COMMA(CORINFO_SIG_INFO* sigInfo)
GenTreeIndir* indir
- X86_ARG(ssize_t argSize),
+ X86_ARG(int argSize),
emitAttr retSize
MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(emitAttr secondRetSize),
IL_OFFSETX ilOffset);
if (size->IsCnsIntOrI())
{
// 'amount' is the total number of bytes to localloc to properly STACK_ALIGN
- size_t amount = size->gtIntCon.gtIconVal;
- amount = AlignUp(amount, STACK_ALIGN);
+ target_size_t amount = (target_size_t)size->gtIntCon.gtIconVal;
+ amount = AlignUp(amount, STACK_ALIGN);
// For small allocations we will generate up to four push instructions (either 2 or 4, exactly,
// since STACK_ALIGN is 8, and REGSIZE_BYTES is 4).
static_assert_no_msg(STACK_ALIGN == (REGSIZE_BYTES * 2));
assert(amount % REGSIZE_BYTES == 0);
- size_t pushCount = amount / REGSIZE_BYTES;
+ target_size_t pushCount = amount / REGSIZE_BYTES;
if (pushCount <= 4)
{
instGen_Set_Reg_To_Zero(EA_PTRSIZE, regCnt);
assert(shiftBy->isContainedIntOrIImmed());
- unsigned int count = shiftBy->AsIntConCommon()->IconValue();
+ unsigned count = (unsigned)shiftBy->AsIntConCommon()->IconValue();
regNumber regResult = (oper == GT_LSH_HI) ? regHi : regLo;
else
{
unsigned immWidth = emitter::getBitWidth(size); // For ARM64, immWidth will be set to 32 or 64
- ssize_t shiftByImm = shiftBy->gtIntCon.gtIconVal & (immWidth - 1);
+ unsigned shiftByImm = (unsigned)shiftBy->gtIntCon.gtIconVal & (immWidth - 1);
getEmitter()->emitIns_R_R_I(ins, size, tree->gtRegNum, operand->gtRegNum, shiftByImm);
}
return;
}
- const size_t pageSize = compiler->eeGetPageSize();
+ const target_size_t pageSize = compiler->eeGetPageSize();
#ifdef _TARGET_ARM_
assert(!compiler->info.compPublishStubParam || (REG_SECRET_STUB_PARAM != initReg));
#if defined(_TARGET_ARM_)
rZero1 = genGetZeroReg(initReg, pInitRegZeroed);
instGen_Set_Reg_To_Zero(EA_PTRSIZE, rZero2);
- ssize_t stmImm = (ssize_t)(genRegMask(rZero1) | genRegMask(rZero2));
+ target_ssize_t stmImm = (target_ssize_t)(genRegMask(rZero1) | genRegMask(rZero2));
#endif // _TARGET_ARM_
if (!useLoop)
assert((src->gtOper == GT_OBJ) || ((src->gtOper == GT_IND && varTypeIsSIMD(src))));
GenTree* srcAddr = src->gtGetOp1();
- size_t size = putArgNode->getArgSize();
+ unsigned int size = putArgNode->getArgSize();
assert(dstReg != REG_NA);
assert(srcReg != REG_NA);
CORINFO_METHOD_HANDLE methHnd,
INDEBUG_LDISASM_COMMA(CORINFO_SIG_INFO* sigInfo)
void* addr
- X86_ARG(ssize_t argSize),
+ X86_ARG(int argSize),
emitAttr retSize
MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(emitAttr secondRetSize),
IL_OFFSETX ilOffset,
bool isNoGC)
{
#if !defined(_TARGET_X86_)
- ssize_t argSize = 0;
+ int argSize = 0;
#endif // !defined(_TARGET_X86_)
getEmitter()->emitIns_Call(emitter::EmitCallType(callType),
methHnd,
CORINFO_METHOD_HANDLE methHnd,
INDEBUG_LDISASM_COMMA(CORINFO_SIG_INFO* sigInfo)
GenTreeIndir* indir
- X86_ARG(ssize_t argSize),
+ X86_ARG(int argSize),
emitAttr retSize
MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(emitAttr secondRetSize),
IL_OFFSETX ilOffset)
{
#if !defined(_TARGET_X86_)
- ssize_t argSize = 0;
+ int argSize = 0;
#endif // !defined(_TARGET_X86_)
genConsumeAddress(indir->Addr());
GenTree* eeGetPInvokeCookie(CORINFO_SIG_INFO* szMetaSig);
// Returns the page size for the target machine as reported by the EE.
- inline size_t eeGetPageSize()
+ inline target_size_t eeGetPageSize()
{
- return eeGetEEInfo()->osPageSize;
+ return (target_size_t)eeGetEEInfo()->osPageSize;
}
// Returns the frame size at which we will generate a loop to probe the stack.
- inline size_t getVeryLargeFrameSize()
+ inline target_size_t getVeryLargeFrameSize()
{
#ifdef _TARGET_ARM_
// The looping probe code is 40 bytes, whereas the straight-line probing for
oper = GT_RSH_LO;
}
- unsigned int count = rotateByOp->gtIntCon.gtIconVal;
+ unsigned count = (unsigned)rotateByOp->gtIntCon.gtIconVal;
Range().Remove(rotateByOp);
// Make sure the rotate amount is between 0 and 63.
CORINFO_METHOD_HANDLE methHnd, // used for pretty printing
INDEBUG_LDISASM_COMMA(CORINFO_SIG_INFO* sigInfo) // used to report call sites to the EE
void* addr,
- ssize_t argSize,
+ int argSize,
emitAttr retSize,
VARSET_VALARG_TP ptrVars,
regMaskTP gcrefRegs,
regNumber ireg /* = REG_NA */,
regNumber xreg /* = REG_NA */,
unsigned xmul /* = 0 */,
- int disp /* = 0 */,
+ ssize_t disp /* = 0 */,
bool isJump /* = false */,
bool isNoGC /* = false */,
bool isProfLeaveCB /* = false */)
}
#endif
- assert(argSize % (int)REGSIZE_BYTES == 0);
- argCnt = argSize / (int)REGSIZE_BYTES;
+ assert(argSize % REGSIZE_BYTES == 0);
+ argCnt = argSize / REGSIZE_BYTES;
/* Managed RetVal: emit sequence point for the call */
if (emitComp->opts.compDbgInfo && ilOffset != BAD_IL_OFFSET)
addr = (BYTE*)((size_t)addr & ~1); // Clear the lowest bit from target address
/* Calculate PC relative displacement */
- int disp = addr - (dst + 4);
- bool S = (disp < 0);
- bool I1 = ((disp & 0x00800000) == 0);
- bool I2 = ((disp & 0x00400000) == 0);
+ ptrdiff_t disp = addr - (dst + 4);
+ bool S = (disp < 0);
+ bool I1 = ((disp & 0x00800000) == 0);
+ bool I2 = ((disp & 0x00400000) == 0);
if (S)
code |= (1 << 26); // S bit
void emitter::emitDispInst(instruction ins, insFlags flags)
{
const char* insstr = codeGen->genInsName(ins);
- int len = strlen(insstr);
+ size_t len = strlen(insstr);
/* Display the instruction name */
switch (fmt)
{
int imm;
- int offs;
const char* methodName;
case IF_T1_A: // None
break;
case IF_T2_J3:
+ {
+ BYTE* addr;
if (id->idIsCallAddr())
{
- offs = (ssize_t)id->idAddr()->iiaAddr;
+ addr = id->idAddr()->iiaAddr;
methodName = "";
}
else
{
- offs = 0;
+ addr = nullptr;
methodName = emitComp->eeGetMethodFullName((CORINFO_METHOD_HANDLE)id->idDebugOnlyInfo()->idMemCookie);
}
- if (offs)
+ if (addr)
{
if (id->idIsDspReloc())
printf("reloc ");
- printf("%08X", offs);
+ printf("%p", dspPtr(addr));
}
else
{
printf("%s", methodName);
}
-
- break;
+ }
+ break;
default:
printf("unexpected format %s", emitIfName(id->idInsFmt()));
CORINFO_METHOD_HANDLE methHnd, // used for pretty printing
INDEBUG_LDISASM_COMMA(CORINFO_SIG_INFO* sigInfo) // used to report call sites to the EE
void* addr,
- ssize_t argSize,
+ int argSize,
emitAttr retSize,
VARSET_VALARG_TP ptrVars,
regMaskTP gcrefRegs,
regNumber ireg = REG_NA,
regNumber xreg = REG_NA,
unsigned xmul = 0,
- int disp = 0,
+ ssize_t disp = 0,
bool isJump = false,
bool isNoGC = false,
bool isProfLeaveCB = false);
break;
case GT_CNS_LNG:
bits = (UINT64)tree->gtLngCon.gtLconVal;
-#ifdef _TARGET_64BIT_
+#ifdef _HOST_64BIT_
add = bits;
-#else // 32-bit target
+#else // 32-bit host
add = genTreeHashAdd(uhi32(bits), ulo32(bits));
#endif
break;
case GT_CNS_DBL:
bits = *(UINT64*)(&tree->gtDblCon.gtDconVal);
-#ifdef _TARGET_64BIT_
+#ifdef _HOST_64BIT_
add = bits;
-#else // 32-bit target
+#else // 32-bit host
add = genTreeHashAdd(uhi32(bits), ulo32(bits));
#endif
break;
// clang-format off
// narrow 'add' into a 32-bit 'val'
unsigned val;
-#ifdef _TARGET_64BIT_
+#ifdef _HOST_64BIT_
val = genTreeHashAdd(uhi32(add), ulo32(add));
-#else // 32-bit target
+#else // 32-bit host
val = add;
#endif
// clang-format on
//
GenTreeIntConCommon* con = tree->AsIntConCommon();
- if (con->ImmedValNeedsReloc(this) || !codeGen->validImmForInstr(INS_mov, tree->gtIntCon.gtIconVal))
+ if (con->ImmedValNeedsReloc(this) ||
+ !codeGen->validImmForInstr(INS_mov, (target_ssize_t)tree->gtIntCon.gtIconVal))
{
// Uses movw/movt
costSz = 7;
// Make sure we have an actual immediate
if (!childNode->IsCnsIntOrI())
return false;
- if (childNode->IsIconHandle() && comp->opts.compReloc)
+ if (childNode->gtIntCon.ImmedValNeedsReloc(comp))
return false;
- ssize_t immVal = childNode->gtIntCon.gtIconVal;
- emitAttr attr = emitActualTypeSize(childNode->TypeGet());
- emitAttr size = EA_SIZE(attr);
+ // TODO-CrossBitness: we wouldn't need the cast below if GenTreeIntCon::gtIconVal had target_ssize_t type.
+ target_ssize_t immVal = (target_ssize_t)childNode->gtIntCon.gtIconVal;
+ emitAttr attr = emitActualTypeSize(childNode->TypeGet());
+ emitAttr size = EA_SIZE(attr);
#ifdef _TARGET_ARM_
insFlags flags = parentNode->gtSetFlags() ? INS_FLAGS_SET : INS_FLAGS_DONT_CARE;
#endif
{
assert(start <= end);
DWORD printed = 0;
- DWORD rtypeLen = strlen(rtype);
+ DWORD rtypeLen = (DWORD)strlen(rtype);
printf("{");
++printed;