[PATCH] PPC4xx start.S: Fix for processor errata

Fixed cpu/ppc4xx/start.S for 440EPx Errata: further corrects PPC440EPx
errata 1.12: 440_33 by moving patch up in code.

Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index 3fe13da..8e000d3 100644 (file)
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -204,6 +204,18 @@ _start_440:
        mfspr   r1,mcsr
        mtspr   mcsr,r1
 #endif
+
+       /*----------------------------------------------------------------*/
+       /* CCR0 init */
+       /*----------------------------------------------------------------*/
+       /* Disable store gathering & broadcast, guarantee inst/data
+       * cache block touch, force load/store alignment
+       * (see errata 1.12: 440_33)
+       */
+       lis     r1,0x0030       /* store gathering & broadcast disable */
+       ori     r1,r1,0x6000    /* cache touch */
+       mtspr   ccr0,r1
+
        /*----------------------------------------------------------------*/
        /* Initialize debug */
        /*----------------------------------------------------------------*/
@@ -225,17 +237,6 @@ _start_440:
        mtspr   dbsr,r1         /* Clear all valid bits */
 skip_debug_init:
 
-       /*----------------------------------------------------------------*/
-       /* CCR0 init */
-       /*----------------------------------------------------------------*/
-       /* Disable store gathering & broadcast, guarantee inst/data
-       * cache block touch, force load/store alignment
-       * (see errata 1.12: 440_33)
-       */
-       lis     r1,0x0030       /* store gathering & broadcast disable */
-       ori     r1,r1,0x6000    /* cache touch */
-       mtspr   ccr0,r1
-
 #if defined (CONFIG_440SPE)
        /*----------------------------------------------------------------+
        | Initialize Core Configuration Reg1.