drm/amd/display: wait for vblank during pipe programming
authorHaiyi Zhou <Haiyi.Zhou@amd.com>
Thu, 20 Oct 2022 15:46:54 +0000 (11:46 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 27 Oct 2022 18:44:10 +0000 (14:44 -0400)
[WHY]
Skipping vblank during global sync update request can result in
underflow on certain displays.

[HOW]
Roll back to the previous behavior where DC waits for vblank during pipe
programming.

Fixes: 5d3e14421410 ("drm/amd/display: do not wait for vblank during pipe programming")
Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Haiyi Zhou <Haiyi.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

index 1ac0ed5..feff834 100644 (file)
@@ -1640,10 +1640,8 @@ static void dcn20_program_pipe(
                                pipe_ctx->pipe_dlg_param.vupdate_width);
 
                if (pipe_ctx->stream->mall_stream_config.type != SUBVP_PHANTOM) {
-                       pipe_ctx->stream_res.tg->funcs->wait_for_state(
-                               pipe_ctx->stream_res.tg, CRTC_STATE_VBLANK);
-                       pipe_ctx->stream_res.tg->funcs->wait_for_state(
-                               pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE);
+                       pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VBLANK);
+                       pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE);
                }
 
                pipe_ctx->stream_res.tg->funcs->set_vtg_params(