drm/amd/display: increasing DRAM BW percent for DCN315
authorSung Joon Kim <sungkim@amd.com>
Tue, 8 Feb 2022 22:13:57 +0000 (17:13 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 23 Feb 2022 19:26:36 +0000 (14:26 -0500)
[why]
DML validation fails when we connect two or
more displays with HDR. Need to increase
DRAM BW to make the validation passing.
Following the value from DCN31.

[how]
Change the max DRAM BW DML field to 60%.

Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Sung Joon Kim <sungkim@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c

index 46b170e..a710734 100644 (file)
@@ -273,7 +273,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_15_soc = {
        .pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm = 60.0,
        .pct_ideal_dram_sdp_bw_after_urgent_vm_only = 30.0,
        .max_avg_sdp_bw_use_normal_percent = 60.0,
-       .max_avg_dram_bw_use_normal_percent = 30.0,
+       .max_avg_dram_bw_use_normal_percent = 60.0,
        .fabric_datapath_to_dcn_data_return_bytes = 32,
        .return_bus_width_bytes = 64,
        .downspread_percent = 0.38,