* config/alpha/alpha.md (divmodsi_internal_er): Generate lituse

        sequence number for the literal.
        (divmoddi_internal_er): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@49110 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 27c112d..2e8690f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+<<<<<<< ChangeLog
+
+       * config/alpha/alpha.md (divmodsi_internal_er): Generate lituse
+       sequence number for the literal.
+       (divmoddi_internal_er): Likewise.
+
 2002-01-22  Craig Rodrigues  <rodrigc@gcc.gnu.org>
 
        PR java/4972

diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index fe256b6..94aeec6 100644 (file)
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -1212,6 +1212,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
   [(parallel [(set (match_dup 0)
                   (sign_extend:DI (match_dup 3)))
              (use (match_dup 0))
+             (use (match_dup 4))
              (clobber (reg:DI 23))
              (clobber (reg:DI 28))])]
 {
@@ -1233,7 +1234,10 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
     default:
       abort ();
     }
-  emit_move_insn (operands[0], gen_rtx_SYMBOL_REF (DImode, str));
+  operands[4] = GEN_INT (alpha_next_sequence_number++);
+  emit_insn (gen_movdi_er_high_g (operands[0], pic_offset_table_rtx,
+                                 gen_rtx_SYMBOL_REF (DImode, str),
+                                 operands[4]));
 }
   [(set_attr "type" "jsr")
    (set_attr "length" "8")])
@@ -1244,10 +1248,11 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
                         [(match_operand:DI 1 "register_operand" "a")
                          (match_operand:DI 2 "register_operand" "b")])))
    (use (match_operand:DI 4 "register_operand" "c"))
+   (use (match_operand 5 "const_int_operand" ""))
    (clobber (reg:DI 23))
    (clobber (reg:DI 28))]
   "TARGET_EXPLICIT_RELOCS && ! TARGET_ABI_OPEN_VMS"
-  "jsr $23,($27),__%E3"
+  "jsr $23,($27),__%E3%J5"
   [(set_attr "type" "jsr")
    (set_attr "length" "4")])
 
@@ -1275,6 +1280,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
   "&& reload_completed"
   [(parallel [(set (match_dup 0) (match_dup 3))
              (use (match_dup 0))
+             (use (match_dup 4))
              (clobber (reg:DI 23))
              (clobber (reg:DI 28))])]
 {
@@ -1296,7 +1302,10 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
     default:
       abort ();
     }
-  emit_move_insn (operands[0], gen_rtx_SYMBOL_REF (DImode, str));
+  operands[4] = GEN_INT (alpha_next_sequence_number++);
+  emit_insn (gen_movdi_er_high_g (operands[0], pic_offset_table_rtx,
+                                 gen_rtx_SYMBOL_REF (DImode, str),
+                                 operands[4]));
 }
   [(set_attr "type" "jsr")
    (set_attr "length" "8")])
@@ -1307,10 +1316,11 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
                         [(match_operand:DI 1 "register_operand" "a")
                          (match_operand:DI 2 "register_operand" "b")]))
    (use (match_operand:DI 4 "register_operand" "c"))
+   (use (match_operand 5 "const_int_operand" ""))
    (clobber (reg:DI 23))
    (clobber (reg:DI 28))]
   "TARGET_EXPLICIT_RELOCS && ! TARGET_ABI_OPEN_VMS"
-  "jsr $23,($27),__%E3"
+  "jsr $23,($27),__%E3%J5"
   [(set_attr "type" "jsr")
    (set_attr "length" "4")])