ARM: dts: socfpga: add timer resets for SoCFPGA platform
authorDinh Nguyen <dinguyen@kernel.org>
Mon, 10 Sep 2018 14:12:08 +0000 (09:12 -0500)
committerDinh Nguyen <dinguyen@kernel.org>
Mon, 17 Sep 2018 15:11:28 +0000 (10:11 -0500)
Add the resets property for all the timers on the Cyclone5/Arria5/Arria10
platforms.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
arch/arm/boot/dts/socfpga.dtsi
arch/arm/boot/dts/socfpga_arria10.dtsi

index daf249e..b3ff5a8 100644 (file)
                        reg = <0xffc08000 0x1000>;
                        clocks = <&l4_sp_clk>;
                        clock-names = "timer";
+                       resets = <&rst SPTIMER0_RESET>;
+                       reset-names = "timer";
                };
 
                timer1: timer1@ffc09000 {
                        reg = <0xffc09000 0x1000>;
                        clocks = <&l4_sp_clk>;
                        clock-names = "timer";
+                       resets = <&rst SPTIMER1_RESET>;
+                       reset-names = "timer";
                };
 
                timer2: timer2@ffd00000 {
                        reg = <0xffd00000 0x1000>;
                        clocks = <&osc1>;
                        clock-names = "timer";
+                       resets = <&rst OSC1TIMER0_RESET>;
+                       reset-names = "timer";
                };
 
                timer3: timer3@ffd01000 {
                        reg = <0xffd01000 0x1000>;
                        clocks = <&osc1>;
                        clock-names = "timer";
+                       resets = <&rst OSC1TIMER1_RESET>;
+                       reset-names = "timer";
                };
 
                uart0: serial0@ffc02000 {
index 266c678..4e0c264 100644 (file)
                        reg = <0xffc02700 0x100>;
                        clocks = <&l4_sp_clk>;
                        clock-names = "timer";
+                       resets = <&rst SPTIMER0_RESET>;
+                       reset-names = "timer";
                };
 
                timer1: timer1@ffc02800 {
                        reg = <0xffc02800 0x100>;
                        clocks = <&l4_sp_clk>;
                        clock-names = "timer";
+                       resets = <&rst SPTIMER1_RESET>;
+                       reset-names = "timer";
                };
 
                timer2: timer2@ffd00000 {
                        reg = <0xffd00000 0x100>;
                        clocks = <&l4_sys_free_clk>;
                        clock-names = "timer";
+                       resets = <&rst L4SYSTIMER0_RESET>;
+                       reset-names = "timer";
                };
 
                timer3: timer3@ffd00100 {
                        reg = <0xffd01000 0x100>;
                        clocks = <&l4_sys_free_clk>;
                        clock-names = "timer";
+                       resets = <&rst L4SYSTIMER1_RESET>;
+                       reset-names = "timer";
                };
 
                uart0: serial0@ffc02000 {